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SpectreRF Workshop
Power Amplifier Design Using SpectreRF

MMSIM 7.2.0

January 2010

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Contents

Power Amplifier Design Using SpectreRF......................................................................... 3

Purpose............................................................................................................................ 3
Audience ......................................................................................................................... 3
Overview......................................................................................................................... 3
Introduction to Power Amplifiers ....................................................................................... 3
The Design Example........................................................................................................... 4
Three Testbenches for PA Measurements ...................................................................... 4
Example Measurements Using SpectreRF.......................................................................... 6
Lab 1: Power Related Measurement (Swept hb) ............................................................ 6
Lab 2: Linearity Measurement (Swept hb with hbac) .................................................. 18
Lab 3: Stability and S-Parameter Measurements (PSS and PSP)................................. 29
Lab 4: Large Signal S-Parameter Measurement (LSSP Wizard).................................. 43
Lab 5: Load-Pull Measurements (Swept hb) ................................................................ 51
Lab 6: Envelope Following Analysis (ENVLP and ACPR Wizard) ............................ 69
Using the ACPR Wizard........................................................................................... 85
Conclusion ........................................................................................................................ 91
Reference .......................................................................................................................... 91

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Power Amplifier Design Using SpectreRF

Purpose
This workshop describes how to use SpectreRF, which includes the new hb analysis, in
the Virtuoso Analog Design Environment to measure parameters that are important in
design verification of Power Amplifiers (PAs).

The hb analysis is one new GUI for the harmonic balance analysis, and has the similar
features with the harmonic balance engine in PSS and QPSS analyses.

Note: The procedures described in this workshop have been kept broad and generic. Your
specific design might require procedures that are slightly different from those described here.

Audience
Users of SpectreRF in the Virtuoso Analog Design Environment.

Overview
This workshop describes a basic set of the most useful measurements for PAs.

Introduction to Power Amplifiers

Power amplifiers are a part of the transmitter front-end used to amplify the transmitted
signal so the signal can be received and decoded within a fixed geographical area. The
main PA performance parameter is the output power level the PA can achieve, depending
on the targeted application, linearity, and efficiency.

Power amplifiers can be categorized several ways depending on whether they are
broadband or narrowband, and whether they are intended for linear operation (Class A, B,
AB and C) or constant-envelope operation (Class D, E and F). This workshop focuses on
the design of narrowband and linear PAs.

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The Design Example

The PA measurements described in this workshop are calculated using SpectreRF in the
Virtuoso Analog Design Environment. The design example used to conduct the
measurements described in this workshop is the two-stage power amplifier, EF_PA_istg
and EF_PA_ostg, shown below:

The supply voltage is 5 V. There is a simple output matching network in the sub circuit
EF_PA_ostg. The power amplifier is designed to be driven by CDMA I/Q channel
baseband signals, modulated using QPSK schemes with a carrier frequency of 1 GHz.

Typical PA performance metrics are listed in the following table:

Measurement Acceptable Value

Output Power +20 to +30 dBm
Efficiency 30% to 60%
Supply Voltage 2.8 to 5.8 V
Gain 20 to 30 dB
Harmonic Output (2f, 3f ,4f) -30 to -50 dBc
Stability Factor >1

Three Testbenches for PA Measurements

Testbench One

The first testbench drives the PA by sinusoidal sources. In this workshop, you use this
testbench to make general measurements, including:

■ Power related measurements (input power, output power, supply voltage, supply
current, power gain, and power dissipation)

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■ Efficiency measurements (drain efficiency and power added efficiency)
■ Linearity measurements (1 dB compression point, IIP3, and OIP3)
■ Noise measurements (NF or F)
■ Stability measurements (K-factors, B1f, and S-parameter)
■ Large signal S-Parameter measurements

You use a Periodic Steady State (PSS) or hb analysis followed by a Periodic Small Signal
(PAC/PSP/PNOISE, or hbac/hbnoise) analyses to make these measurements. (For details,
see Labs 1 to 4 on pages 6-43).

Testbench Two

The second testbench drives the PA by a sinusoidal source with a port adapter added at
the output power amplifier. You use this testbench to generate

■ Load-pull contours
■ Reflection contours

You use the swept hb analysis combined with the parametric analysis tools to measure
load pull. (For details, see Lab 5 on page 51).

Testbench Three

The third testbench drives the PA by modulation signals. You use this testbench to
generate

■ ACPR plots
■ Input and output trajectory plots

You use the Envelope following (envlp) analysis to make these measurements. (For
details, see Lab 6 on page 69).

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Example Measurements Using SpectreRF

To achieve optimal circuit performance, you should measure and evaluate several PA
characteristics or parameters under varying conditions. The most important trade-off in
PA design is between efficiency and linearity.

Begin the examination of the flow by bringing up the Cadence Design Framework II
environment to look at a full view of the reference design:

Action P-1: cd to ./rfworkshop directory.

Action P-2: Run tool virtuoso&.

Action P-3: In the CIW window, choose Tools — Library Manager….

Lab 1: Power Related Measurement (Swept hb)

Power related measurements include input power, output power, supply voltage, supply
current, power gain, and power dissipation. To make these measurements, you use a
swept PSS analysis to sweep the input power level.

Action 1-1: Open the schematic view of the design EF_example_simple in the library
RFworkshop.

Action 1-2: Select the PORT1 source. Choose Edit — Properties — Objects and
ensure that the port properties are set as described below:

Parameter Value
Resistance 50 ohm
Port Number 1
DC voltage (blank)

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Source type sine
Frequency name 1 RF
Frequency 1 fin
Amplitude 1 (dBm) pin

Action 1-3: Select the PORT2 source. Choose Edit — Properties — Objects and
ensure that the port properties are set as described below:

Parameter Value
Resistance 50 ohm
Port Number 2
DC voltage (blank)
Source type dc

Action 1-4: Check and save the schematic.

Action 1-5: In the Virtuoso Schematic Editing window, choose Launch — ADE L.

Action 1-6: (Optional) Choose Session — Load State in the Virtuoso Analog Design
Environment window, select Cellview in Load State Option and load
state “Lab1_Power_hb”, then skip to Action 1-12.

Action 1-7: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 1-8: In the Choosing Analyses window, select hb in the Analysis

field of the window. Set up the form as follows:

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Note: The hb analysis is one new GUI for the harmonic balance analysis, and has the
similar features with the harmonic balance engine in PSS and QPSS analyses.

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For the hams/maxharms parameter, 5-8 is enough usually. More harms/maxharms will be
used for the strong non-linear signal.

By default, the tstab method is used for Harmonic Balance Homotopy Method.

Action 1-9: Make sure that Enabled is selected. Click OK in the Choosing Analyses
form.

Action 1-10: In the Virtuoso Analog Design Environment window, choose Outputs —
To be Saved — Select on Schematic.

Action 1-11: In the schematic, select the positive terminals of PORT2, and PORT1.
Press the ESC key to end the selection process.

The Virtuoso Analog Design Environment window looks like this:

Action 1-12: Choose Simulation — Netlist and Run to start the simulation or click the
netlist and Run icon in the Virtuoso Analog Design Environment
window. After the simulation finishes, use the next actions to plot the
simulation results.

Action 1-13: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

The Direct Plot form appears.

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Action 1-14: In the Direct Plot Form window, choose hb as the Analysis type. Choose
Power in the Function field. Choose 1G in the Output Harmonic list
box.

Action 1-15: Select Port2 on the schematic.

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The waveform window shows the output power versus input power.

For the design example given, when the input power level is -5 dBm, the output power
level is close to 20 dBm. Thus, -5 dBm is assumed to be the normal operating condition.
All subsequent plots are based on this assumption.

Action 1-16: In the Direct Plot form, change the Plotting Mode to Replace and set up
the form as follows:

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Action 1-17: Click Port2 to show the output Power Spectrum.

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Action 1-18: In the Direct Plot form, click Power Gain in the Function field and set up
the form as follows:

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Action 1-19: In the schematic, click the positive and negative terminals of Port2, and
then click the positive and negative terminals of VCC.

The following plot shows the drain efficiency of the PA.

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Action 1-20: In the waveform window, click the Add Sub window icon.

Action 1-21: In the Direct Plot form, set the Plotting Mode to New SubWin. Select
Power Added Eff. in the Function field. Select the Output Harmonic as
1GHz.

To use the Power Added Efficiency (PAE) function, you only need to select the output
terminal, input terminal, and DC terminal in turn. The result is a plot of the power added
efficiency versus the input power level.

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Action 1-22: In the schematic, select the positive terminals of PORT2, PORT1 and
VCC in turn.

The waveform window updates.

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Notice that for a PA with high gain, the PAE is nearly equal to the drain efficiency. You
find that the efficiency of the PA around the nominal operating condition is only about
20%.

Action 1-23: Close the waveform window, the Direct Plot form, and the Virtuoso
Analog Design Environment window.

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Lab 2: Linearity Measurement (Swept hb with hbac)
The 1 dB compression point is defined as the input signal level that causes the small
signal gain to drop by 1 dB. The suggested approach to measuring the 1 dB compression
point is to set up a swept PSS analysis that sweeps the input power level.

When the circuit is driven by two RF tones ( f in and f in 2 ), the third order intercept point
is the intercept point of the first order fundamental power term ( f in , f in 2 ) and the third
order intermodulation power term ( 2 × f in − f in 2 , 2 × f in 2 − f in ) expressed in decibel form.

There are at least four ways to measure IIP3 and OIP3 using SpectreRF:

1. PSS/hb analysis with two large tones

2. QPSS/hb analysis with one large tone and one moderate tone

3. Swept PSS/hb and PAC/hbac analyses

4. Rapid IP3 using AC or PAC/hbac analysis

The recommended approach is method 4, rapid IP3 using AC or PAC/hbac analysis,

because it is faster and more accurate than the other approaches.

Action 2-1: If it is not already open, open the schematic view of the design
EF_example_simple in the library RFworkshop.

Action 2-2: Select the PORT1 source. Choose Edit — Properties — Objects and
ensure that the port properties are set as described below:

Parameter Value
Resistance 50 ohm
Port Number 1
DC voltage (blank)
Source type sine
Frequency name 1 RF
Frequency 1 fin
Amplitude 1 (dBm) pin
PAC magnitude (dBm) pin

Action 2-3: Check and save the schematic.

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Action 2-4: From the EF_example_simple schematic, choose Launch — ADE L to

start the Virtuoso Analog Design Environment.

Action 2-5: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load state “Lab2_IP3_hbac,” and skip to Action 2-12.

Action 2-6: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 2-7: In the Choosing Analyses window, select hb in the Analysis field of the
window.

Action 2-8: Set up a swept hb analysis as follows:

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Note: Some specific points are added to get smooth curve and more accurate P1dB result.
During sweep analysis, the default value of restart will be no, which means only the first
pss simulation will run tstab to get initial condition. For the other pss run, the initial
condition will be the previous pss result and tstab will not be run. In the complicated PA
design, the simulation will be very difficult to converge at high input power.

In this case, the user can try the following methods:

1. Use more harms in the simulation, or use oversample factor.
2. If it is single point simulation, hbhomotopy=source can be used when input power
level is high.
3. In a sweep analysis, If any specific power level failed to converge, one or two
specific points can be added before this power level to help convergence.

Action 2-9: Make sure Enabled is selected, and click Apply in the Choosing Analyses
form.

Action 2-10: In the Choosing Analyses window, select hbac in the Analysis field. Set
up the form as follows:

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Action 2-11: Make sure Enabled is selected, and click OK in the Choosing Analyses
form.

The Virtuoso Analog Design Environment window looks like this:

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Action 2-12: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

When the simulation ends, use the following actions to plot the P1dB and IP3 curves.

Action 2-13: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 2-14: In the Direct Plot Form, select hb and set up the form like this:

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Action 2-15: Click PORT2 to plot the 1 dB compression point.

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The output referred 1dB compression point, which is 19.92dBm in this case, is more
meaningful for PA design.

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Action 2-16: In the Direct Plot Form, set Plotting Mode to Replace. Select hbac and
set up the form like this:

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Action 2-17: Click PORT2 to plot the Output Referred IP3.

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Action 2-18: Close the waveform window. Click Cancel in the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab 3: Stability and S-Parameter Measurements (PSS and PSP)
As pointed out by Gonzalez in [4], stability is guaranteed for the following conditions

Kf >1, ∆ <1

Kf > 1, B1 f = 1 + S11 − S 22 − ∆2 >0

2 2

To analyze stability for a PA, set up PSS and PSP analyses. The PSP analysis is a
periodic small-signal analysis, so the S-parameter and VSWR results it generates apply
only to the small signal. In some PA data sheets, the S-parameter and VSWR values
specified are large signal characteristics. SpectreRF currently supports large signal SP
(LSSP) analysis as demonstrated in Lab 4.

Action 3-1: If it is not already open, open the schematic view of the design
EF_example_simple in the library RFworkshop

Action 3-2: Select the PORT1 source. Choose Edit — Properties — Objects and
ensure that the port properties are set as described below:

Parameter Value
Resistance 50 ohm
Port Number 1
DC voltage (blank)
Source type sine
Frequency name 1 RF
Frequency 1 fin
Amplitude 1 (dBm) pin

Action 3-3: From the EF_example_simple schematic, choose Launch — ADE L to

start the Virtuoso Analog Design Environment.

Action 3-4: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load state “Lab3_Stability_HBPSP,” and skip to Action 3-
10.

Action 3-5: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 3-6: In the Choosing Analyses window, select pss in the Analysis field of the
window and set up the form as follows:

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Action 3-7: Make sure Enabled is selected, and click Apply in the Choosing Analyses
form.

Action 3-8: In the Choosing Analyses window, select psp in the Analysis field of the
window and set up the form as follows:

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Action 3-9: Make sure Enabled is selected, and click OK in the Choosing Analyses
form.

The Virtuoso Analog Design Environment window looks like this:

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Action 3-10: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

Action 3-11: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 3-12: In the Direct Plot Form, select psp and click Kf in the Function field. The
form looks like this:

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Action 3-13: Click Plot.

The following plot appears.

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Action 3-14: In the Direct Plot Form, set Plotting Mode to Replace. In the Analysis
field, select psp, and click B1f in the Function field.

The form looks like this:

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Action 3-15: Click Plot.

The following plot appears.

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Action 3-16: Close the waveform window.

Action 3-17: In the Direct Plot Form, set Plotting Mode to Append. In the Analysis
field, select psp. In the Function field, select SP. In the Plot Type field,
select Rectangular. In the Modifier field, select dB20.

The form looks like this:

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Action 3-18: Click S11, S12, S21, and S22.

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Action 3-19: In the waveform window, click Strip Chart Mode.

Action 3-19: Close the waveform window.

Action 3-20: In the Direct Plot Form window, set Plotting Mode to Append. In the
Analysis field, select psp. In the Function field, select SP. In the Plot
Type field, select Z-Smith.

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Action 3-21: Click S11. A waveform window appears.

Action 3-22: In the waveform window, click New Subwindow.

Action 3-23: In the Direct Plot form, click S22.

S11 and S22 are plotted in the form of Smith Charts.

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Action 3-24: Close the waveform window.

Action 3-25: In the Direct Plot Form, in the Function field, choose VSWR (Voltage
standing-wave ratio). In the Modifier field, select dB20. Click VSWR1,
then VSWR2.

You get the following waveforms:

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Action 3-26: Close the waveform window. Click Cancel in the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab 4: Large Signal S-Parameter Measurement (LSSP Wizard)
The small-signal S-parameter characterization of an RF circuit is well established.
However, for circuits with either large nonlinearity or frequency translations, small-signal
S-parameters are not sufficient for design purposes. This is especially true for designs
such as those that use power amplifiers and mixers.

As a natural extension of small-signal S-parameters, large-signal S-parameters can be

defined as the ratio of reflected (or transmitted) waves to incident waves. Because small-
signal S-parameters are based on the simulation of a linearized circuit, small-signal S-
parameters are independent of input power.

Large-signal S-parameters are based on large-signal steady state simulation techniques

such as the SpectreRF PSS analysis with its shooting Newton method or harmonic
balance simulators. Large-signal S-parameters are sensitive to input power levels.

Action 4-1: If it is not already open, open the schematic view of the design
EF_example_LSSP in the library RFworkshop.

Action 4-2: Select the PORT1 source. Choose Edit — Properties — Objects and
ensure that the port properties are set as described below:

Parameter Value
Resistance 50 ohm
Port Number 1
DC voltage (blank)
Source type sine
Frequency name 1 RF
Frequency 1 fin
Amplitude 1 (dBm) pin

Action 4-3: Select the PORT2 source. Choose Edit — Properties — Objects and
ensure that the port properties are set as described below:

Parameter Value
Resistance 50 ohm
Port Number 2
DC voltage (blank)
Source type sine

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Frequency name 1 RFout
Frequency 1 fout
Amplitude 1 (dBm) pout

Make sure you are using PORT. SpectreRF currently only supports PORT
for LSSP simulation.

Action 4-4: Check and save the schematic.

Action 4-5: From the EF_example_LSSP schematic, choose Launch — ADE L to

start the Virtuoso Analog Design Environment.

Action 4-6: In the Virtuoso Analog Design Environment window, choose Tools —
RF — LSSP …

Action 4-7: In the Large Signal S-Parameter Wizard window, select Port1 in the
Define Input/Output field.

Action 4-8: Change Type to Input.

Action 4-9: Select Port2 and change type to Output.

Action 4-10: In the Large Signal S-Parameter Wizard window, choose Amplitude in
Sweep field.

Action 4-11: Set up the form as follows:

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Action 4-12: In the Large Signal S-Parameter Wizard window, click OK to close the
window.

The Virtuoso Analog Design Environment window looks like this:

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Action 4-13: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

After the simulation ends, the waveform window appears.

Action 4-14: In the waveform window, place a marker in curve mag(S21) at Pin=-5
dBm by choosing Marker — Place — Trace marker. It shows that
S21=23.29dB at Pin=-5 dBm.

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Action 4-15: In the Virtuoso Analog Design Environment window, choose Variable —
Edit. The Editing Design Variable window appears.

Action 4-16: In the Editing Design Variable window, click pin -10, change its value
to -5. Click Change.

Action 4-17: In the Editing Design Variable window, click pout 10, change its value to
18.29. Click Change.

The PA output is -5+23.29=18.29 dBm when pin=5dBm.

Action 4-18: Click OK in the Editing Design Variable window.

Action 4-19: In the Virtuoso Analog Design Environment window, choose Tools — RF
— LSSP ...

Action 4-20: Set up the Large Signal S-Parameter Wizard form as follows:

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Action 4-21: In the Large Signal S-Parameter Wizard window, click OK to close the
window.

The Virtuoso Analog Design Environment window looks like this:

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Action 4-22: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

After the simulation ends, the waveform window appears.

Note: If it does not happen by default, you might want to change the graph to strip mode
to get individual graphs in each sub window.

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Action 4-23: Close the waveform window. Click Cancel in the Direct Plot form. Close
the Virtuoso Analog Design Environment window. Close the
EF_example_LSSP schematic.

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Lab 5: Load-Pull Measurements (Swept hb)
A load pull analysis is a systematic way to measure large signal impedance matching. In
a load pull analysis, the output reflection coefficients are swept; SpectreRF measures the
output power and plots it as a function of the complex load seen by the transistor.
Because the complex load requires two axes, the results are plotted as constant power
contours on a Smith chart. The contours show how the output power increases as the load
impedance reaches its optimum value, Zopt.

Keep in mind that you are sweeping output reflection coefficients by changing a linear
load. The large signal output reflection coefficients computed in this manner equal the
small-signal, or incrementally computed, load reflection coefficients. However, for input
reflection coefficients, this is no longer true. You are actually computing the large signal
reflection coefficients at the fundamental frequency.

You might not always be able to achieve the optimal output power due to other design
goals, such as stability concerns. Those goals are generally posed as constraints in the
reflection coefficients. SpectreRF allows you to overlay the reflection coefficients on top
of the constant power contours to facilitate your design choices.

However, a constant power contour does not equal a constant power gain contour. You
should plot the input power contours both to verify that the input impedance of the PA
does not change significantly as the load impedance changes and to ensure that you have
achieved a reasonable power gain.

Action 5-1: Open the schematic view of the design EF_example_loadpull in the
library RFworkshop.

The following figure shows the modified EF_example_simple schematic for frequency
pull calculations.

The input port in the above testbench has the following parameters:

Parameter Value

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Resistance 50 ohm
Port Number 1
DC voltage (blank)
Source type sine
Frequency name 1 RF
Frequency 1 fin
Amplitude 1 (dBm) pin

The output port is set up with the following parameter values:

Parameter Value
Resistance 50 ohm
Port Number 2
DC voltage (blank)
Source type dc

An instance of a PortAdaptor is connected to the load. The PortAdaptor is set to have the
following properties:

Frequency 1G
Phase of Gamma theta
Mag of Gamma mag
r0 (this value must be equal
Reference Resistance
to the load)

Action 5-2: From the EF_example-loadpull schematic, choose Launch — ADE L to

start the Virtuoso Analog Design.

Action 5-3: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load state “Lab5_LoadPull_hb” then skip to Action 5-11.

Action 5-4: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 5-5: In the Choosing Analyses window, select hb in the Analysis field of the
window.

Action 5-6: In the hb form, set up the form for sweep 1 and 2 as follows,

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Since MMSIM711, the multi-level sweep is supported. The maximum number of the
sweep is 3.

Action 5-7: Make sure that Sweep 1 and Sweep 2 are selected.

In the Sweep from inner to outer tab, two variables; theta and mag will be seen,
indicating that these will be swept. The Choosing Analyses form looks like this:

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Action 5-8: Make sure Enabled is selected, and click OK in the Choosing Analyses
form.

Action 5-9: In the Virtuosos Analog Design Environment window, choose Outputs —
To be Saved — Select on Schematic.

Action 5-10: In the schematic, select the input terminals of PORT1 and portAdapter.
Press the ESC key to end the selection process.

The Virtuoso Analog Design Environment window looks like this:

Action 5-11: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

Action 5-12: After the simulation runs, in the Virtuoso Analog Design Environment
window, choose Results — Direct Plot — Main Form.

Action 5-13: In the Direct Plot Form, select hb, and choose the Power Contours
function. Make sure Select is toggled to Single Power/Refl Terminal,
select fundamental (harmonic 1) as the output harmonic. The form looks
like this:

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Action 5-14: In the schematic window, select the portAdapter input terminal. If you
want, click Close contours. The plot shows the contours of constant
output power.

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From the above plot, the most power of 0.72mW is dissipated near the center of the
smallest constant power contour.

You might want to maximize load power subject to a constraint on the magnitude of the
amplifier’s input reflection coefficient. Such a constraint can prevent unstable
interactions with the preceding stage.

You can overlay load-pull contours with contours of constant input reflection coefficient
magnitude. The optimal load corresponds to the reflection coefficient that lies on the
largest power load-pull contour and also lies on a constant input reflection coefficient
contour that is within the constraint. Here, largest power means the contour
corresponding to the largest amount of power delivered to the load.

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Action 5-15: In the hb Direct Plot form, choose the Reflection Contours function, then
toggle Select to Separate Refl and RefRefl Terminals. Select the input
port (PORT1) of the PA first, and then select the portAdapter input
terminal. This plots the constant input reflection contours in the Smith
chart of the output reflection coefficients.

The Direct Plot form looks like this:

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The following plot shows the constant input reflection coefficient contours overlaying the
output power contour:

Action 5-16: Change the Plotting Mode to Replace, choose the Power Contours
function, and select the terminal of the input port to plot the input power
contour. If the contour shows that the input power does not vary
significantly over the output reflection coefficient sweep, then the constant
power contour is very close to the constant gain contour.

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Action 5-17: Close the waveform window. Click Cancel in the Direct Plot form.

To draw the load pull contour for the compression points, three variables; power, phase
and magnitude need to be swept. The power sweep is necessary to obtain the
compression points for the specified phase and magnitude.

Action 5-18: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose …

Action 5-19: In the Choosing Analyses window, select hb in the Analysis

field of the window. Set up the form for sweep 1, 2, and 3 as follows:

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Action 5-20: Make sure that Sweep 1, Sweep 2, and Sweep 3 are selected.

In the Sweep from inner to outer tab, three variables; pin, theta, and mag will be seen,
indicating that these will be swept. The Choosing Analyses form looks like this:

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Action 5-21: Click OK in the Choosing Analyses form.

The Virtuoso Analog Design Environment window looks like this:

Action 5-22: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

Action 5-23: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 5-24: Select Compression Point for Function. Select Points for Plot. Select 1
for Gain Compression (dB). Select 1 for 1st Order Harmonic. Enable
Add to Outputs.

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Action 5-25: In the schematic window, click the PORTT2 port.

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Action 5-26: In the Virtuoso Analog Design Environment window, choose Tools —
Calculator …, select the load pull function. Copy the following
expression to the Signal form.

compressionVRI((v("/RFOUT" ?result "hb_fd") - 0.0) '1 ?rport

resultParam("PORT2:r" ?result "hb_fd") ?gcomp 1)

Action 5-27: In the Calculator window, click OK and plot the load pull contour for the
compression points.

Action 5-28: In the Graph Window, choose Graph — Display Type — Impedance

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Close the Virtuoso Analog Design Environment window.

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Lab 6: Envelope Following Analysis (ENVLP and ACPR Wizard)
The envlp analysis is designed to generate an efficient and accurate prediction of the
envelope transient response of circuits to different modulation schemes. The circuits are
generally clocked at a frequency with a period that is orders of magnitude smaller than
the baseband modulation signal. A classical transient approach is too expensive, and
neither PSS nor QPSS work because the modulation signal is neither periodic nor quasi-
periodic.

Envelope following analysis reduces simulation time without compromising accuracy,

exploiting the behavior of circuits to a fixed high frequency clock. In particular, the
envelope of the high-frequency clock can be followed by accurately computing the circuit
behavior over occasional cycles. This accurately captures the fast transient behavior. The
slow varying modulation cycle is accurately followed by a piecewise polynomial.

To do envlp analysis, you can use either the shooting engine or the harmonic balance
engine. This lab shows you how to use the Virtuoso® Spectre® RF Envelope with the
harmonic balance engine to design and analyze transmitters.

Action 6-1: Open the schematic view of the design EF_example_envlp_acpr in the
library Rfworkshop.

The power amplifier is driven by modulation signals. CDMA I/Q baseband chip streams
are fed into an ideal QPSK modulator.

Action 6-2: View the object properties of I36. ACPR_source, which is available in
rflib starting from IC5141ISR141 and IC613ISR17, is a behavioral
modulator that allows users to specify I/Q PWL files, carrrier frequency

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and input power level in one single instance thus greatly simplify the
ACPR simulation setup.

Action 6-3: Check and save the schematic.

Action 6-4: From the schematic window, choose Launch — ADE L to start the
Virtuoso Analog Design Environment.

Action 6-5: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load state “Lab6_ENVLP_hb,” then skip to Action 6-12.

Action 6-6: In the Virtuoso Analog Design Environment window, click the Choose
Analyses icon.

In this lab, the following function is used to plot ACPR spectrum,

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************************************************************
db10((NORM_FACTOR * psdbb(real(harmonic(v("/RFOUT" ?result 'envlp_fd) 1))
imag(harmonic(v("/RFOUT" ?result 'envlp_fd) 1)) START_TIME STOP_TIME
TOTAL_POINTS ?windowSize NFFT ?windowName "Cosine4" ?detrending "none")))
************************************************************
The psdbb( ) function calculates the baseband PSD of the "RFOUT" node. The time
domain waveform is taken from time START_TIME to time STOP_TIME with total
sample points TOTAL_POINTS. NFFT is window size and it should be a power of 2.
FFT is repeated N times and the PSD is the average value of these results, where N is the
integer part of TOTAL_POINTS/NFFT.

The sample period Ts is (STOP_TIME - START_TIME) / (TOTAL_POINTS-1) and the

frequency resolution Fres is 1 / (NFFT*Ts). The NORM_FACTOR parameter is Fres.

Generally for ACPR simulation, the envlp analysis output is strobed. If Ts is set
appropriately, it should be consistent with the envlp output strobe period T_STROBE,
and the sample aliasing in psdbb ( ) calculation can be eliminated to a great extent.

Often, the input baseband signal (I and Q signal) is also sampled and the sample
frequency is generally larger than two times of channel bandwidth. In this lab, input
baseband signals have been sampled at 4.9152M ( and the “strobeperiod” in envlp
analysis is set to 1/4.9152M (T_STROBE =1/4.9152M) to eliminate the aliasing between
the input sample and simulation strobe.

Once the envlp analysis strobe period T_STROBE is determined, other parameters in
psdbb ( ) function can be deduced. Suppose we take NFFT=1024, which means the
frequency resolution is 4800Hz (Fres= 1 / (NFFT* T_STROBE)). NFFT can be changed
according to the concerned Fres. If FFT is repeated 8 times, the TOTAL_POINTS should
be 1024*8=8192. Note that in real simulation, TOTAL_POINTS can be slightly different.
The simulation time should be 1.666667m (TOTAL_POINTS* T_STROBE). We should
choose the stop time larger than 1.666667m. In this example, we choosed 1.667m.

Action 6-7: In the Choosing Analyses form, select the envlp analysis and choose the
harmonic balance engine. Set Stop Time to 1.667m, Fund Frequency to
1G, and Number of harmonics to 3.

3 harmonics are enough in this case. If the circuit is strongly nonlinear, more harmonics
are needed. In cases where the circuit has a square carrier, nine harmonics are sufficient.
But for some cases, twenty or more harmonics may be required.

Action 6-8: Set the Time Step Control field to Fixed and set Step Period to
2.03451e-7

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The Step Period paramter is equal to the sample interal of the baseband data (I/Q data in
instance I36). If you check the PWL files cdma_2ms_idata and cdma_2ms_qdata, the
sample interval of these data is 0.203451us, i.e. the sample frequency is 4.9152MHz. To
achieve better accuracy and better simulation speed, the Step Period parameter should be
set to the sample interval of these data.

Action 6-9: Set the Accuracy Defaults (errpreset) field to moderate.

Action 6-10: Click OK in the Envelope Following Options form and then click OK in
the Choosing Analyses form.

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The Virtuoso Analog Design Environment window looks like this:

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Action 6-11: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

Notice the output log file when the simulation ends. The speed-up factor in this case is
203.

.
Action 6-12: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 6-13: Select Voltage for Function. Select time for Sweep.

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Action 6-14: In the schematic window, click the RFOUT net.

The voltage waveform appears in the waveform window.

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Action 6-15: In the waveform window, double click the X-axis and set the Min and Max
values as shown below. Click OK.

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The waveform window appears as follows.

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The plot displays a number of vertical lines with a wavy line running through them. The
vertical lines are the points at which detailed calculations are performed and the wavy
line connects these points. The simulation runs much faster than a Virtuoso Spectre
Transient Analysis simulation (as envelope following skips carrier cycles whenever
possible) and still satisfy numerical tolerances.

Action 6-16: To get a closer look, zoom in on any one of the vertical lines.

You can see the detailed simulation for one complete cycle.

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The modulation riding on the RF carrier is the baseband signal - the information to be
transmitted. The baseband signal determines the amplitude and phase of the RF carrier,
and can be extracted at any point in the design. It is important to determine how the
transmitter might alter the baseband signal.

Action 6-17: In the Direct Plot form, set these options:

a. Select Replace for Plotting Mode.
b. Select Voltage for Function.
c. Select harmonic time for Sweep.
d. Select Real for Modifier.
e. Select 1 for Harmonic Number.

Action 6-18: In the schematic, click the adder output.

A plot for the real portion appears in the Waveform window.

Action 6-19: In the Direct Plot form, select Append for Plotting Mode and Imaginary
for Modifier.

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Action 6-20: In the schematic, click the adder output.

A plot for the imaginary portion is added to the waveform window.

Action 6-21: In the waveform window, click the Strip Chart Mode icon .

Action 6-22: Set the X Axis to 45u to 57u so that you can see both the real and
imaginary parts clearly.

The baseband waveforms recovered from the modulated RF carrier (as displayed in the
figures above) do not directly reveal much about how the transmitter affects them. The
steps below indicate how to display the associated trajectory, which is the plot of one
waveform against the other. The trajectory reveals much more about the kind of
distortion introduced by the transmitter. The steps below first display the input baseband
trajectory and then the output baseband trajectory. A comparison of the two trajectories
reveals whether the power amplifiers in this example are really distorting the signal.

Action 6-23: In the waveform window, double click the X Axis and set the Range to
Auto.

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Action 6-24: In the Plot vs. field (at the bottom of the form), select h = 1; v /net64;
envlp re(V), and click OK.

The plot below appears in the waveform window. This is the input baseband trajectory,
undistorted by the power amplifiers.

Action 6-25: Close the Waveform window, then repeat the steps that you used to
display the plot for /net 64, but substitute the /RFOUT net for /net64.

The plot you create in the waveform window looks like this.

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The entire trajectory is scaled linearly and rotated. The output baseband signal is the
input baseband signal, multiplied by a complex constant. The input and output
waveforms look different because of the rotation, not because of non-linear distortion. A
common non-linear distortion, such as saturation, makes the outer edges of the trajectory
lie on a circle.

The adjacent channel power ratio (ACPR) is a common index of how much power a
transmitter emits outside its allotted frequency band. To measure ACPR, first obtain the
power spectral density of the transmitted signal. This section describes how to plot the
transmitted power spectral density.

To estimate ACPR, drive the transmitter with realistic baseband signals. In most cases,
the baseband signals come from digital filters. The digital filters constrain the spectrum
of the input baseband signal. Distortion in the transmitter causes the spectrum to grow
where it should not. This growth is why you need an ACPR measurement.

The “uncategorized” part of rfLib contains three sets of stored baseband waveforms,
cdma, dqpsk, and gsm.

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These waveforms were created with the baseband signal generators in the testbench
category of the rfLib. The ppwlf sources also read the System Processing Worksystem
(SPW) format. Therefore, these files can be generated using input baseband waveforms
obtained through SPW.

Action 6-26: In the Direct Plot form, set these options:

a. Select Replace for Plotting Mode.
b. Select ACPR for Function.
c. Select 1 for Harmonic Number.
d. Select IS-95 for Method.
e. Select 0 for From.
f. Select 2.03451e-7 for Strobe Period.
g. Select 1024 for Window Size.
h. Select 8 for Repetitions.

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Action 6-27: In the schematic window, click the RFOUT net.

The ACPR waveform appears in the waveform window.

Note: The PSD plot is the normalized result for ACPR. If you use IC 5.1.41 USR6, the
normalized PSD is plotted, while the un-normalized PSD is plotted when using IC 5.1.41
USR5 or before.

The lower ACPR is -66.32dB, and the upper ACPR is -65.46dB.

Action 6-28: Close the waveform window.

Using the ACPR Wizard

In this quick exercise, you rerun the previous ACPR demonstration using the Spectre RF
ACPR Wizard.

Action 6-29: Open the ACPR Wizard in one of two ways.

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• In the Simulation window, choose Tools - RF – ACPR …
or
• In the envlp Choosing Analyses form, press Start ACPR Wizard.
In either case, the ACPR Wizard displays.

Action 6-30: Click on Update From Hierarchy to get Clock Name from the testbench.
Set the following:

Net /RFOUT
Channel Definitions IS-95
Symbol Start (Sec) 0
Strobe Period 2.03451e-7
Window Size 1024
Repetitions 8

The Strobe Period paramter is related to the sample rate of the baseband data (I/Q data
in PORT0 or PORT1). If you check the PWL files cdma_2ms_idata and
cdma_2ms_qdata, the sample interval of these data is 0.203451us, i.e. the sample
frequency is 4.9152MHz. To obtain the real values on these sample points, the Strobe
Period parameter should be set to the sample interval of these data.

The number of repetitions is set to 8, which gives a reasonable simulation time and
accuracy. Increasing the number of repetitions provides better accuracy at the cost of a
longer simulation time.

The ACPR Wizard form looks like this:

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Action 6-31: In the ACPR Wizard form, click Apply.

This action loads the output section of the ADE window with your selected values.

The ADE window now looks like this:

Action 6-32: In the Virtuoso Analog Design Environment window, choose

Simulation — Netlist and Run or click the Netlist and Run icon to start
the simulation.

The waveform window automatically opens after simulation and you can read ACPR
number in the Output session in the Analog Design Enviorment.

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Now the Virtuoso Analog Design Environment window looks like this:

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Action 6-33: Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Conclusion
This workshop describes how to use SpectreRF for RF power amplifier designs. The
workshop

• Presents the typical PA design parameters and describes how to build testbenches
and perform measurements within the Virtuoso Analog Design Environment.
• Covers in detail how to set up SpectreRF analyses and perform measurements
related to PA design.
• Displays and interprets the simulation results.

Reference
[1] B. Razavi, RF Microelectronics, Prentice Hall, 1998.

[2] T. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge
University Press, 1998.

[3] Ken Kundert, “Predicting the Phase Noise and Jitter of PLL-Based Frequency
Synthesizers”, The Designer’s Guide, www.designers-guide.com, 2005

[4] M. Hella, RF CMOS Power Amplifiers: Theory, Design and Implementation,

Kluwer Academic Publishers, 2002.

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