MUTHAYAMMAL ENGINEERING COLLEGE

(An Autonomous Institution)

(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-1
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Review of Semiconductor physics

Introduction: Semiconductors are materials which have a conductivity between conductors (generally
metals) and nonconductors or insulators (such as most ceramics). Semiconductors can be pure
elements, such as silicon or germanium, or compounds such as gallium arsenide or cadmium selenide.
Prerequisite knowledge for Complete understanding and learning of Topic:
Atomic structure, Energy band diagram, conductor and insulator
Detailed content of the Lecture:

 In an atom, electrons in the innermost orbits, which are filled, are called Valence electrons. On
the other hand, electrons in the outer orbits that do not fill the shell completely are called
Conduction electrons.
 The energy band which includes the energy levels of the valence electrons is called Valence
band. Also, the energy band above it is called Conduction band.
 In case of metallic conductors, conduction band overlaps on the electrons in the valence band.
 In insulators, there is a large gap between both these bands. Hence, the electrons in the valence
band remain bound and no free electrons are available in the conduction band.
 Semiconductors have a small gap between both these bands. Some valence electrons gain
energy from external sources and cross the gap between the valence and conduction bands.

 Solids can be classified as metals, semiconductors or insulators based on conductivity or

resistivity and energy bands in electronics.
 Semiconductors are materials which have a conductivity between conductors (generally metals)
and nonconductors or insulators (such as most ceramics).
  Semiconductors can be pure elements, such as silicon or germanium, or compounds such as
gallium arsenide or cadmium selenide.
 Semiconductors can be broadly classified into Intrinsic and Extrinsic Semiconductors.
 An Intrinsic Semiconductor is the purest form of a semiconductor, elemental, without any
impurities.
 Extrinsic Semiconductors are semiconductors which conduct even at room temperature. This is
achieved by adding impurities to the pure semiconductor.
 Doping is the process of adding impurities to intrinsic semiconductors to alter their properties.
 Crystals of Silicon and Germanium are doped using two types of dopants:

Pentavalent (valency 5); like Arsenic (As), Antimony (Sb), Phosphorous (P), etc.
Trivalent (valency 3); like Indium (In), Boron (B), Aluminium (Al), etc.

 An n-type semiconductor is created when pure semiconductors, like Si and Ge, are doped with
pentavalent elements.

 A p-type semiconductor is created when trivalent elements are used to dope pure
semiconductors, like Si and Ge.

 The P stands for Positive, which means the semiconductor is rich in holes or Positive charged
ions. The N stands for Negative, which means the semiconductor is rich in electrons or
Negative charged ions.

Video Content / Details of website for further learning (if any):

1. http://community.wvu.edu/~dwgraham/classes/ee551/slides/semiconductor_overview.pdf
2. https://www.toppr.com/guides/physics/semiconductor-electronics-materials-device-and-simple-
circuits/extrinsic-semiconductor/
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, Jacob Millman, Christos Halkias, McGraw Hill, Third
Edition, 2001. (1-7)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-2
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Drift and diffusion currents, Continuity Equation

Introduction: Drift current and diffusion current are the two types of currents flowing through
the PN junction. Diffusion current flows due to the movement of particles from the region of high
concentration towards the region of low concentration. Drift current is the flow of current due to the
application of external field.
Prerequisite knowledge for Complete understanding and learning of Topic:
Energy band diagram, PN junction, Barrier potential

Detailed content of the Lecture:

Drift Current

 Drift Current: The applied electric field will accelerate the carrier and produce a net movement
of charges. This movement of charge carrier due to the applied electric field is called Drift
current.
P N

Let P be the charge density and Vd be the drift velocity.

Then, Drift volume current density due to holes is given by

Jp (drift ) = PVdp
Where, P = qp
q = charge of electron = 1.602 × 10 -19 coulomb.
p = Number of holes per cubic cm.
Vdp = Average drift velocity of holes = µpE,
where µp = mobility of hole
Similarly, charge density due to electron is given by,
Jn (drift) = q µnnE
Therefore,
Total drift current J (drift) = q (µnn + µpP) E
Diffusion Current

 Diffusion is the process of flow of particles from the region of high concentration towards the
region of low concentration. This movement of charge particles will results in the diffusion
current.
n(x)

n (+l)

n (0)

n (-l)

x = -l x = 0 x = +l x

 The above graph depicts the variation of electron concentration with respect to distance.

 Diffusion current due to electron and holes are given by,

dn
J n  diffusion    q Dn
dx
dp
J p  diffusion    q Dp
dx

 The total current density in the semiconductor is due to the sum of the drift and diffusion
current density.
dp
For holes, J p  q p PE  q Dp
dx
dn
For electron, J n  q n nE  q Dn
dx

Video Content / Details of website for further learning (if any):

1. http://www.sciencecampus.com/engineering/electronics/semiconductor_theory
2. https://www.tutorialspoint.com/electronic_circuits
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (84-86)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-3
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Theory of PN Junction Diode, Diode Current Equation

Introduction: Diode is a semiconductor device that allows the current to pass through it in one
direction and will not allow in other direction. It is formed by joining the P type and N type
semiconductor together. The current that is flowing through the diode is governed by the diode current
equation.
knowledge for Complete understanding and learning of Topic:
Atomic structure, Energy band diagram, P type and N type semiconductor
Detailed content of the Lecture:
PN junction Diode
 Diode is a semiconductor device that allows the current to pass through it in one direction and
will not allow in other direction.
 The diode which is formed by doping one half by P type impurity and other half by N – type
impurity is called PN junction diode.

Structure of PN junction Diode Symbol

P N A
Anode Cathode C

PN junction (or) metallurgical junction

 The interface that separate N and P region is referred to as the PN junction (or) metallurgical
junction.
 Electron in the N region will try to move towards P region and holes in the P region will try to
move towards N region, which result in the diffuse of electron on P – side and diffuse of holes
on N – side. This process is called Diffusion.
 Thus, the movement of the mobile charge carriers to the junction due to the difference in the
concentration resulting in a region called depletion region.
 The depletion region (or) space region (or) transition region which is formed near the junction
will restricts the movement of electrons and holes towards P region and N region
 An electrostatic potential difference is created near the metallurgical junction which is known as
potential barrier, junction barrier, diffusion potential (or) contact potential (VB).
 This is due of the diffused oppositely charged ions present on both sides of PN junction.
 Depletion region is of 0.5 µm thickness and the magnitude of contact potential, potential barrier ,
junction barrier (or) diffusion potential Vo is of 0.3 v for Ge and 0.7 v for Si.
PN junction diode and formation of depletion region

P N
Holes (+) Electrons (-)

Depletion region

Potential barrier Voltage V

Heigh
(v0)
t

Width Distance
 Forward biasing: If the positive terminal of the voltage source is connected to the P type side
and negative terminal of the voltage source is connected to the N type of the junction diode.
Then the biasing is known as forward biasing.

 Reverse biasing: If the positive terminal of the voltage source is connected to the N side and
negative terminal of the voltage source is connected to the P – side of the junction diode. Then
the biasing is known as Reverse Biasing.

 Peak inverse voltage: It is the maximum reverse voltage that can be applied to the PN junction
without damage to the junction.

Diode current equation

The diode current equation relating the voltage V and current I is given by

I = I0 * [exp (qV / n*k*T) –1]

Where,
I – diode current
I0 – diode reverse saturation current at room temperature
q – charge of electron (1.6x10^-19 C)
V – external voltage applied to the diode
K – Boltzmann’s constant (1.38066x10^-23 J/K)
T – temperature of the diode junction
n - n is a junction constant (typically around 2 for diodes, 1 for transistors)

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/electronic_circuits
2. https://www.electronicshub.org/characteristics-and-working-of-p-n-junction-diode
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (84-98)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-4
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:
Topic of Lecture: Current Voltage Characteristics
Introduction: The current-voltage or VI characteristic of a PN diode is the graphical
representation of how the diode behalves in the forward and reverse bias condition.
Prerequisite knowledge for Complete understanding and learning of Topic:
PN Diode, Depletion Region, Biasing
Detailed content of the Lecture:
 Applying external voltage of proper magnitude is known as Biasing.
(i) Forward Bias
 If the positive terminal of the voltage source is connected to the P type side and negative
terminal of the voltage source is connected to the N type side of the junction diode. Then the
biasing is known as forward biasing.

 Positive potential which is applied to the P type side repels the holes towards the junction.
 Negative potential which is applied to the N type side repels the electrons towards the
junction.
Current (mA)
Depletion Region (v) (mA)
P region N

Ge Si

W
Holes flow Electron flow
VP

Voltage
0.3v 0.7v (v)
Characteristics of forward bias

 When the applied potential (VP) is less than Potential Barrier (VB), the potential barrier prevents
the holes and electrons to move on opposite side. Hence there will be no increases in current till
threshold voltage.
 When the applied potential (VP) is greater than Potential Barrier (VB), the potential barrier
disappears completely makes the electron to move towards positive terminal and holes towards
negative potential results in large current flow.
(ii) Reverse Bias

 If the positive terminal of the voltage source is connected to the N type side and negative
terminal of the voltage source is connected to the P type side of the junction diode. Then the
biasing is known as Reverse Biasing.
Increased Forward current (mA)
P depletion region N
Breakdown
voltage
Reverse Forward
voltage voltage
W (v) (v)
Holes Electron
s Breakdown

Characteristics of reverse bias Reverse current (A)

 Negative potential which is applied to the P- type side attract the holes towards the negative
terminal.
 Positive potential which is applied to the N type side attract the electrons towards the positive
terminal.
 This results in the increases in the depletion region
 When the Reverse bias is increased. The depletion region increases. Therefore this offers high
resistivity in the region.
 Theoretically there is no current flow, but practically a small microampere current flows due to
minority carrier this is known as reverse saturation currents.
 The minority carrier obtains enough kinetic energy to break the junction and hence a large
reverse current flows after the particular Voltage.
 This is due to the breakdown at the junction and this voltage is known as Breakdown Voltage.

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/electronic_circuits
2. https://www.electronicshub.org/characteristics-and-working-of-p-n-junction-diode
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, Jacob Millman, Christos Halkias, McGraw Hill, Third
Edition, 2001, (124-126)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-5
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Effect of Temperature on PN Junction diodes

Introduction: PN junction diode parameters like reverse saturation current, bias current, reverse
breakdown voltage and barrier voltage are dependent on temperature. With the increase in temperature,
the intrinsic carrier concentration increases. Therefore, the barrier potential is decreased and in turn the
current conduction starts at earlier stage.

Prerequisite knowledge for Complete understanding and learning of Topic:

PN diode, Barrier potential, Diode Characteristic
Detailed content of the Lecture:
Forward Bias
 With the increase in temperature, the intrinsic carrier concentration increases.
 This pushes the fermi level closer to the intrinsic fermi level (the middle of the band gap).
 The fermi level in each region moves closer to the middle of the gap, and the built-on potential
is decreased.
Reverse Bias
 Intrinsic concentration would increase with increase in temperature and hence minority charges
also increase with increase in temperature.
 The reverse current depends on minority carriers. Hence as the number of minority charge
carriers increase, the reverse current would also increase with temperature
 PN junction diode parameters like reverse saturation current, bias current, reverse breakdown
voltage and barrier voltage are dependent on temperature.
 Mathematically diode current is given by

I = I0 * [exp (qV / n*k*T) –1]

Where,

I – diode current
I0 – diode reverse saturation current at room temperature
q – charge of electron (1.6x10^-19 C)
V – external voltage applied to the diode
K – Boltzmann’s constant (1.38066x10^-23 J/K)
T – temperature of the diode junction
n - n is a junction constant (typically around 2 for diodes, 1 for transistors)
  Hence, the current should decrease with increase in temperature but exactly opposite occurs.
There are two reasons:
• Rise in temperature generates more electron-hole pair thus conductivity increases and
thus increase in current
• Increase in reverse saturation current with temperature offsets the effect of rise in
temperature
 Reverse saturation current (IS) of diode increases with increase in the temperature. The rise is
7ºC for both germanium and silicon and approximately doubles for every 10ºC rise in
temperature.
 Thus if we kept the voltage constant, as we increase temperature the current increases.
 Barrier voltage is also dependent on temperature and it decreases by 2mV/ºC for germanium
and silicon.
 Reverse breakdown voltage (VR) also increases with the increase in temperature.

Video Content / Details of website for further learning (if any):

1. https://www.electronicshub.org/characteristics-and-working-of-p-n-junction-diode/
2. https://www.tutorialspoint.com/electronic_circuits/electronic_positive_clipper_circuits.htm
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata

McGraw Hill, 2nd Edition, 2008. (111-112)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-6
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Diffusion Capacitance, Applications of diode

Introduction: Diffusion capacitance occurs in a forward biased p-n junction diode. Diffusion
capacitance is also referred as storage capacitance. The diffusion capacitance occurs due to stored
charge of minority electrons and minority holes near the depletion region. In a forward biased diode,
diffusion capacitance is much larger than the transition capacitance.

Prerequisite knowledge for Complete understanding and learning of Topic:

Energy band diagram, Barrier region, PN diode, Biasing
Detailed content of the Lecture:

 In a p-n junction diode, two types of capacitance take place. They are,
• Transition capacitance (CT)
• Diffusion capacitance (CD)

Transition capacitance (CT)

 The amount of capacitance changed with increase in voltage is called transition capacitance.
The transition capacitance is also known as depletion region capacitance, junction capacitance
or barrier capacitance.
 Transition capacitance is denoted as CT.
 Just like the capacitors, a reverse biased p-n junction diode also stores electric charge at the
depletion region.
 The depletion region is made of immobile positive and negative ions.
 In a reverse biased p-n junction diode, the p-type and n-type regions have low resistance.
 Hence, p-type and n-type regions act like the electrodes or conducting plates of the capacitor.
 The depletion region of the p-n junction diode has high resistance.
 Hence, the depletion region acts like the dielectric or insulating material.
 Thus, p-n junction diode can be considered as a parallel plate capacitor.

Diffusion capacitance (CD)

 Diffusion Capacitance is the capacitance due to transport of charge carriers between two
terminals of a device, for example, the diffusion of carriers from anode to cathode in forward
bias mode of a diode
 In the forward biased diode, the potential barrier at the junction gets lowered.
  As a result, holes get injected from the P-side to the N-side and electron get injected from the
N-side to the P-side.
 These injected charges get stored near the junction just outside the depletion layer, holes in the
N-region and electrons in the P-region.
 Due to charge storage, the voltage lags behind the current producing the capacitance effect.
 Such a capacitance is called diffusion capacitance or storage capacitance [CD].
 In a general case, diffusion constant CD is caused by diffusion of both the holes in the n-regions
and electrons in the P-region
 The diffusion capacitance CD may be defined as the rate of change of injected charge with
voltage.
CD = dQ / dV
Where,
CD = Diffusion capacitance
dQ = Change in number of minority carriers stored outside the depletion region
dV = Change in voltage applied across diode

 Diffusion capacitance is always smaller than transition capacitance, both are few tens of pico
farads.
 In a forward biased diode, the transition capacitance exist. However, the transition capacitance
is very small compared to the diffusion capacitance. Hence, transition capacitance is neglected
in forward biased diode.

PN Junction diode application:

1. Switching element in logical circuit.
2. In power supplies, it is used as rectifier and voltage regulator.
3. LED and LASER, a form PN junction diode is commonly used in optical communication.
4. It is used as an oscillator in microwave circuit and tuning element in receiver circuit.

Video Content / Details of website for further learning (if any):

1. https://www.physics-and-radio-electronics.com/electronic-devices-and-circuits/semiconductor-
diodes/junctioncapacitance-transitioncapacitance-diffusioncapacitance.html
2. https://bestengineeringprojects.com/transition-capacitance-and-diffusion-capacitance-of-diode/
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (109-110)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L – 7A

ECE I / II
Course Name with Code : 19GES11 - ELECTRONIC DEVICES
Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Rectifiers

Introduction: An alternating current has the property to change its state continuously. But during the
process of rectification, this alternating current is changed into direct current DC. The wave which
flows in both positive and negative direction then will get its direction restricted only to positive
direction, when converted to DC.
Prerequisite knowledge for Complete understanding and learning of Topic:
PN Diode, Biasing, Transformer
Detailed content of the Lecture:
Rectifier
 Rectifier is a circuit which converts an alternating current into a direct current.
 There are two main types of rectifier circuits, depending upon their output. They are
• Half-wave Rectifier and • Full-wave Rectifier
 A Half-wave rectifier circuit rectifies only positive half cycles of the input supply whereas a
Full-wave rectifier circuit rectifies both positive and negative half cycles of the input supply.
Half-wave Rectifier
 The name half-wave rectifier itself states that the rectification is done only for half of the
cycle.
 The AC signal is given through an input transformer which steps up or down according to the
usage. Mostly a step down transformer is used in rectifier circuits, so as to reduce the input
voltage.
Input Waveform Rectifier Circuit Output Waveform

 The input signal is given to the transformer which reduces the voltage levels.
 The output from the transformer is given to the diode which acts as a rectifier.
 This diode gets ON and conducts for positive half cycles of input signal.
 Hence a current flows in the circuit and there will be a voltage drop across the load resistor.
 The diode gets OFF and does not conduct for negative half cycles.
 Hence, the output for negative half cycles will be, iD = 0 and Vo = 0.
Full-Wave Rectifier
 A Rectifier circuit that rectifies both the positive and negative half cycles can be termed as a
full wave rectifier as it rectifies the complete cycle.
 The construction of a full wave rectifier can be made in two types. They are
(i) Center-tapped Full wave rectifier
(ii) Bridge full wave rectifier
(i) Center-tapped full wave rectifier
 A rectifier circuit whose transformer secondary is tapped to get the desired output voltage,
using two diodes alternatively, to rectify the complete cycle is called as a Center-tapped Full
wave rectifier circuit.
Rectifier Circuit Input Waveform

 When the positive half cycle of the input voltage is applied, the point M at the transformer
secondary becomes positive with respect to the point N.
 This makes the diode D1 forward biased. Hence current i1 flows through the load resistor from
A to B. Therefore, positive half cycles flows to the output.
 When the negative half cycle of the input voltage is applied, the point M at the transformer
secondary becomes negative with respect to the point N.
 This makes the diode D2 forward biased. Hence current i2 flows through the load resistor from
A to B. Therefore, the positive half cycles flows in the output, even during the negative half
cycles of the input.

Disadvantages
 Location of center-tapping is difficult
 The dc output voltage is small
 PIV of the diodes should be high

(ii) Bridge Full-Wave Rectifier

 This is such a full wave rectifier circuit which utilizes four diodes connected in bridge form.
 There is no need of any center-tapping of the transformer in this circuit.
 Four diodes called D1, D2, D3 and D4 are used in constructing a bridge type network so that
two of the diodes conduct for one half cycle and two conduct for the other half cycle of the
input supply.
  When the positive half cycle of the input supply is given, point P becomes positive with
respect to the point Q.
 This makes the diode D1 and D3 forward biased while D2 and D4 reverse biased.
 Hence the diodes D1 and D3 conduct during the positive half cycle of the input supply to
produce the output along the load resistor.
 As two diodes work in order to produce the output, the voltage will be twice the output voltage
of the center tapped full wave rectifier.
 When the negative half cycle of the input supply is given, point P becomes negative with
respect to the point Q.
 This makes the diode D1 and D3 reverse biased while D2 and D4 forward biased.
 The current flows through the load in the same direction as during the positive half cycle of the
input.

Advantages
 No need of center-tapping.
 The dc output voltage is twice that of the center-tapper FWR.
 PIV of the diodes is of the half value that of the center-tapper FWR.
 The design of the circuit is easier with better output.
Video Content / Details of website for further learning (if any):
1. https://www.tutorialspoint.com/electronic_circuits
2. https://www.electronicshub.org
3. https://nptel.ac.in/courses/117103063

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (619-628)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L – 7B
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Clippers

Introduction: A Clipper circuit is a circuit that rejects the part of the input wave specified while
allowing the remaining portion. The portion of the wave above or below the cut off voltage determined
is clipped off or cut off. The clipping circuits consist of linear and non-linear elements like resistors
and diodes but not energy storage elements like capacitors.
Prerequisite knowledge for Complete understanding and learning of Topic:
PN Diode, Biasing
Detailed content of the Lecture:
Clipper Circuits
 A Clipper circuit is a circuit that rejects the part of the input wave specified while allowing the
remaining portion.
 The main advantage of clipping circuits is to eliminate the unwanted noise present in the
amplitudes.
 These can work as square wave converters, as they can convert sine waves into square waves
by clipping.
 The amplitude of the desired wave can be maintained at a constant leve
(i) Positive Series Clipper
 A Clipper circuit in which the diode is connected in series to the input signal and that
attenuates the positive portions of the waveform, is termed as Positive Series Clipper.

Positive Cycle of the Input

 When the input voltage is applied, the positive cycle of the input makes the point A in the
circuit positive with respect to the point B.
 This makes the diode reverse biased and hence it behaves like an open switch.
 Thus the voltage across the load resistor becomes zero as no current flows through it and
hence V0 will be zero.
 Negative Cycle of the Input
 The negative cycle of the input makes the point A in the circuit negative with respect to the
point B. This makes the diode forward biased and hence it conducts like a closed switch.
 Thus the voltage across the load resistor will be equal to the applied input voltage as it
completely appears at the output V0.

(ii)Positive Shunt Clipper

(iii)Negative Series Clipper

 The Clipper circuit that is intended to attenuate negative portions of the input signal can be
termed as a Negative Clipper.
 A Clipper circuit in which the diode is connected in series to the input signal and that
attenuates the negative portions of the waveform, is termed as Negative Series Clipper.

Positive Cycle of the Input

 When the input voltage is applied, the positive cycle of the input makes the point A in the
circuit positive with respect to the point B.
 This makes the diode forward biased and hence it acts like a closed switch. Thus the input
voltage completely appears across the load resistor to produce the output V0.
Negative Cycle of the Input
 The negative cycle of the input makes the point A in the circuit negative with respect to the
point B.
 This makes the diode reverse biased and hence it acts like an open switch. Thus the voltage
across the load resistor will be zero making V0 zero.

(iv)Negative Shunt Clipper

 A Clipper circuit in which the diode is connected in shunt to the input signal and that
attenuates the negative portions of the waveform, is termed as Negative Shunt Clipper.
(v)Biased Clipper : Positive Clipper with negative Vr

(vi)Biased Clipper : Positive Clipper with positive Vr

(vii)Negative Series Clipper with positive Vr

(viii)Negative Series Clipper with negative Vr

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/electronic_circuits
2. https://www.electronicshub.org
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (619-628)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-8
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Clampers, Avalanche Breakdown Mechanism

Introduction: A Clamper Circuit is a circuit that adds a DC level to an AC signal. Actually, the
positive and negative peaks of the signals can be placed at desired levels using the clamping circuits.
As the DC level gets shifted, a clamper circuit is called as a Level Shifter.
Prerequisite knowledge for Complete understanding and learning of Topic:
PN diode, Capacitor, Biasing
Detailed content of the Lecture:
Clamper circuit
 Clamper circuits consist of energy storage elements like capacitors.
 A simple clamper circuit comprises of a capacitor, a diode, a resistor and a dc battery if
required.
 A Clamper circuit can be defined as the circuit that shifts the waveform to a desired DC level
without changing the actual appearance of the applied signal.
 In order to maintain the time period of the wave form, the Ʈ must be greater than, half the time
period of the capacitor. [ Ʈ = RC ]
 The time constant of charge and discharge of the capacitor determines the output of a clamper
circuit.
 The DC component present in the input is rejected when a capacitor coupled network is used as
a capacitor blocks dc as a capacitor blocks dc. Hence when dc needs to be restored, clamping
circuit is used.

Positive Clamper Circuit

 When a negative peak of the signal is raised above to the zero level, then the signal is said to
be positively clamped.
 A Positive Clamper circuit is one that consists of a diode, a resistor and a capacitor and that
shifts the output signal to the positive portion of the input signal.
  Initially when the input is given, the capacitor is not yet charged and the diode is reverse
biased.
 During the negative half cycle, at the peak value, the capacitor gets charged with negative on
one plate and positive on the other.
 The capacitor is now charged to its peak value Vm. The diode is forward biased and conducts
heavily.
 During the next positive half cycle, the capacitor is charged to positive Vm while the diode
gets reverse biased and gets open circuited.
 The output of the circuit at this moment will be V0 = Vi + Vm
 Hence the signal is positively clamped as shown in the figure.
 The output signal changes according to the changes in the input, but shifts the level according
to the charge on the capacitor, as it adds the input voltage.

Positive Clamper with Positive Vr

 A Positive clamper circuit if biased with some positive reference voltage, that voltage will be
added to the output to raise the clamped level.

Positive Clamper with Negative Vr

 A Positive clamper circuit if biased with some negative reference voltage, that voltage will be
added to the output to raise the clamped level.

Negative Clamper
 A Negative Clamper circuit is one that consists of a diode, a resistor and a capacitor and that
shifts the output signal to the negative portion of the input signal.
 During the positive half cycle, the capacitor gets charged to its peak value Vm. The diode is
forward biased and conducts.

 During the negative half cycle, the diode gets reverse biased and gets open circuited. The
output of the circuit at this moment will be V0 =Vi + Vm
 Hence the signal is negatively clamped as shown in the figure.
Avalanche Breakdown

 Avalanche Breakdown occurs due to avalanche multiplication.

 It occurs when the doping concentration is less of order 1 to 10 8.
 Under Reverse bias, the thermally generated carrier crosses the depletion region and acquires
Kinetic energy from the applied voltage. This carrier collides with the crystal and disrupts the
covalent band. This is known as Impact Ionization.
 The new electron hole pair will be created apart from original carrier. The new carrier in turn
collide with another crystal by acquiring enough energy from applied field will create electron
hole pair.
 This process continues result in avalanche multiplication. This causes Breakdown known as
avalanche Breakdown.

Zener Breakdown

 This breakdown occurs in the heavily doped P and N region.

 When the strong electric field is applied, the direct rupture of covalent bond takes place
produce new electron hale pair.
 The new electron hale pair so created will increases the reverse current.
 This reverse current increase at almost 6 volts for heavily doped diode at the field of order
2×107 v/m.
 This kind of breakdown occurs in heavily doped PN region is known as zener breakdown.
 Zener Breakdown occur less than 6 V where as Avalanche Breakdown occur greater than 6V.

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/electronic_circuits
2. https://www.physics-and-radio-electronics.com/electronic-devices-and-circuits
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (560-563)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-9
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit I : SEMICONDUCTOR DIODES Date of Lecture:

Topic of Lecture: Zener Diode as a Voltage Regulator

Introduction: Zener diode is a special purpose semiconductor PN junction device made of
silicon, which is designed to operate in reverse biased condition by varying the doping
concentration.
Prerequisite knowledge for Complete understanding and learning of Topic:
PN junction, Diode, Doping , Biasing
Detailed content of the Lecture:
Zener Diode:
 The doping concentration of the Zener diode is high than the ordinary diode.
 The silicon high power dissipation characteristic and doping concentration of the zener diode
makes the diode to prefer for Reverse bias condition.
 When the breakdown occur, the current increases whereas the voltage remain Constant (very
small change). This phenomenon makes the Zener diode to work as voltage Regulator.
 The forward bias characteristics of the zener diode will be similar to the PN junction diode when
the cut in voltage reaches, the current starts to increases with respect to the voltage.
 In the Reverse bias condition, because of high doping concentration the breakdown occurs very
quickly and once the breakdown occur the current rises sharply whereas the voltage remains
more (or) less constant.
Characteristics of Zener Diode

Applications: Zener Diode is used as Voltage Regulator, Waveform clipper, Voltage shifter and
Reference voltage in electronic circuits.

Voltage Regulator: Voltage Regulator is an electronic circuit which provides constant voltage level
independent of the current in the load.
  Line Regulator − A regulator which regulates the output voltage to be constant, in spite of
input line variations, it is called as Line regulator.
 Load Regulator − A regulator which regulates the output voltage to be constant, in spite of the
variations in load at the output, it is called as Load regulator.
Zener Regulator - Working of Zener Voltage Regulator

 If the applied input voltage Vi is increased

beyond the Zener voltage Vz, then the Zener diode
operates in the breakdown region and maintains
constant voltage across the load.
 The series limiting resistor Rs limits the
input current.

Case 1 − If the load current IL increases, then the current through the Zener diode IZ decreases in
order to maintain the current through the series resistor RS constant. The output voltage Vo depends
upon the input voltage Vi and voltage across the series resistor RS.
Vo = Vin – Is Rs
Where Is is constant. Therefore, Vo also remains constant.
Case 2 − If the load current IL decreases, then the current through the Zener diode IZ increases, as the
current IS through RS series resistor remains constant. Though the current IZ through Zener diode
increases it maintains a constant output voltage VZ, which maintains the load voltage constant.
Case 3 − If the input voltage Vi increases, then the current IS through the series resistor RS increases.
This increases the voltage drop across the resistor, i.e. VS increases. Though the current through Zener
diode IZ increases with this, the voltage across Zener diode VZ remains constant, keeping the output
load voltage constant.
Case 4 − If the input voltage decreases, the current through the series resistor decreases which makes
the current through Zener diode IZ decreases. But the Zener diode maintains output voltage constant
due to its property.

Limitations of Zener Voltage Regulator

 It is less efficient for heavy load currents.
 The Zener impedance slightly affects the output voltage.
Video Content / Details of website for further learning (if any):
1. https://www.tutorialspoint.com/electronic_circuits
2. https://www.physics-and-radio-electronics.com/electronic-devices-and-circuits
3. https://nptel.ac.in/courses/117103063/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata
McGraw Hill, 2nd Edition, 2008. (123-125)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 10
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:
Lecture

Topic of Lecture: Bipolar Junction Transistor

T Operation
Introduction: Transistor is a three terminal semiconductor devices (Base, emitter and collector) that
can be used to switch and amplify plify electronic signals such aass radio and television signals. The
amplification in the transistor is achieved by passing input current from a region of low resistance to a
region of high resistance, hence it is known as Transfer – resistor (Transistor)

Prerequisite knowledge for Complete understanding and learning of Topic:

 Atomic structure
 Energy band diagram
 Diode
Bipolar Junction Transistor Operation

TYPES OF TRANSISTORS
There are two basic types of transistors

(i) Unipolar Junction Transistor:

In this type, the
he current conduction is due to one type of carrier that is majority carrier.
carrier

(ii) Bipolar junction Transistor:

In this type, the current conduction is due to both types of charge carriers that is majority
major as
well as minority carrier.

The Bipolar junction transistors are of two types

(a) PNP transistor

(b) NPN transistor

CONSTRUCTION OF PNP AND NPN TRANSISTOR

(a) PNP Transistor:

When the transistor is formed by sandwiching a single nn-region

region between two p - region, then it
is known as PNP transistor.
 PNP transistor
Emitter Collecto
E P N P r
C

B
Base

Symbol Two diode transistor

version
E
C B C

B
B
(b) NPN Transistor:
When the transistor is formed by sandwiching a single p – region between two n – region then
it is known as NPN transistor.
NPN transistor
Emitter Collecto
E N P N r
C

B
Base

Symbol Two diode transistor version

E C E C

B
B
From the above figures, we can understand that the
 Transistor has two junctions
One junction is formed between Emitter and base, and it is called Emitter – Base junction.
Other junction is formed between Base and Collector, and it is called Collector – Base junction.
 It has three terminals.

Emitter:
The emitter is heavily doped. The main function of the emitter is to inject a large number of
charge carriers into the base. The arrow head is always at the collector which indicates the
conventional direction of current flow.
Base:
The Base is lightly doped middle region and very thin. The main function of the base is to pass
most of the injected charge carriers into the collector.
Collector:
The collector is moderately doped. The main function of the collector is to collect the charge
carriers. Since it dissipate more power, it is physically larger than emitter region.
BIASING
Applying external voltage of correct polarity and magnitude to the two junction of the transistor
is called Biasing
Transistor Biasing
Based on the external voltage polarity, the transistor will be operated in three different regions.
That is
(i) Active region
(ii) Cutoff region and
(iii) Saturation region

Emitter Base Collector Base

Region junction junction Application
Active Forward biased Reverse biased Amplifier
Cut off Reverse biased Reverse biased Open switch
Suration Forward biased Forward biased closed switch

OPERATION OF AN NPN TRANSISTOR

Normally the transistor will be biased in active region. Hence Emitter base is forward biased
and collector base is reverse biased.
Biasing the NPN Transistor
E C
N P N
B

– + – +
VEB VEB

 The applied forward bias causes the lot of electrons from the emitter region to enter into the base
region and this causes the forward current flow due to majority carrier electrons.

 Since the base is lightly doped with P – type impurity, the injected electron from the emitter
Combines with the holes in the P – type region to Constitute a base current (IB)

 Few electron combines with holes and the remaining electrons (more than 95%) crossover the
base region into collector region to Contribute Collector Current(IC)

 Collector is reverse biased and hence they collects the diffused electrons which enters the
collector junction.

 The magnitude of emitter current IE = IB + IC

OPERATION OF AN PNP TRANSISTOR

Biasing the PNP Transistor

E C
P N P
B

+ – + –

 The applied forward bias causes lot of holes from the emitter region to enter into the base
region and this causes the forward current flow due to majority carrier holes.

 Since the base is lightly doped with n type impurity, the injected holes from the emitter
 combines with the electrons in the n type region to constitute a base current(IB)

 Few holes combines with electron and the remaining holes (more than 95%) cross over the base
region into collector region to Contribute Collector Current

 Collector is reverse biased and hence they collects the diffused holes which enters the collector
junction(IC)

 The magnitude of emitter Current IE = IB + I

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 11
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Common Base Configuration

Introduction:

 In this configuration, the input is given between emitter and base and output is taken between
collector and base

 The emitter base junction is forward biased and collector base junction is reversed biased.

 Hence IE (Emitter Current) flows in the input circuit and IC (collector Current) flows in the
output circuit.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Diode operation
 Transistor Operation
Common Base Configuration

Characteristics
cteristics of CB Configuration:
The performance of the transistor Configuration can be determined from the static
characteristics curves, which relates the different dc currents and voltage of the transistor.
Circuit to determine CB static characteristics (Input and Output characteristics)
IE (mA) IC (mA)
E C A
_ A _
+ +
B
_ +
_ IB +
VEE V V VCC
VCB _ _
+ + VEB

Input Characteristics:

The input characteristics of the CB configuration is determined by increasing the emitter

current IE from zero by increasing VEB, keeping VCB constant. The input curve is obtained are shown
 Input characteristics curve
IE(mA)

VCB> VCB=0
4 1 v

VEB(v)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
 For the given value of VCB and increase in the VEB, the emitter base junction is forward biased.
The value of IE increases when the values of VEB increase similar to forward biased diode.

 When VCB increased, the width of the base region will decrease which result in increases in the
value of IE much earlier for increases in VEB. This makes the curve to shift left.

Output characteristics:
The output characteristics of the CB configuration is determined by increasing the collector
current IC by increasing VCB, keeping IE constant at a suitable value by adjusting VEB. This step is
repeated for various fixed values of IE. The curves obtained are shown below.
Output characteristics curve
IC Active
(mA) region

Saturation
region IE=2mA

IE=1m
A
IB=0mA
VCB(v)
Cutoff region
Two important characteristics can be observed from the output graph.
(i) For a constant value of IE, Ic is independent of VCB and the curves are parallel to the axis of
the VCB.
(ii) IC flows even when VCB = 0, the majority carrier electron from the emitter base forward
biased junction will injected into the collector base junction due to internal potential barrier
at the reversed biased collector base junction.

Early effect (or) Base width Modulation

When the collector voltage is increased, the width of the depletion region increases as the
reverse bias voltage increases. This increase in the depletion region decreases the width of the Base.
This phenomenon of variation in the Base width with respect to the variation of collector voltage is
known as Base width modulation (or) Early effect. The value of  increases for large value of VCC (or)
early effect.
Punch Through
When the value of collector voltage is extremely large, the effective base width will reduces to
zero leads to the voltage breakdown in the transistor. This phenomenon is known as Punch through.
Transistor equation
If there is no ac signal, then the ratio of IC to IE is known as dc amplification factor
I
 dc  C
IE
 (Since IC flows into transistor & IE flows out of transistor)
The ratio of charge in collector current to the change in emitter current is known as current
amplification factor (α).
IC
 ac  , VCB Constant
I E
The collector current depends upon two factors
(i) amplified emitter current (IE)

(ii) leakage current due to movement of minority carrier across output (ICBO)

Hence Collector Current IC  I E  ICBO

We know that IE = IB + IC
Hence IB = IE – IC ----------- (1)
Sub IC in (1) IB = IE – (IE + ICBO)
IB = IE –  IE - ICBO
IB = IE (1-)-ICBO
Transistor Parameters:
Four transistor parameters can be determined from CB characteristics curve, they are known as
common base hybrid parameters (or) h parameters.
(a) Input Impedance (hib):
It is the ratio of the change in emitter voltage to the change in emitter current, keeping VCB
constant.
V
hib  EB , VCB Constant
IE
(b) Output admittance (hob):
It is the ratio of the change in collector current to the change in the collector voltage, keeping IE
constant.
I C
hob  , IE Constant
VCB
(c) Forward current gain (hfb):
It is the ratio of the change in the collector current to the change in the Emitter Current keeping V CB
constant
I
hfb  C , VCB Constant
I E
(d) Reverse Voltage gain (hrb):
If is the ratio of the change in the Emitter voltage to the change in the collector voltage, keeping
IE constant.
V
hrb  EB , I E Constant
VCB
Video Content / Details of website for further learning (if any):
1. https://www.elprocus.com/using-transistor-as-a-switch/
2. https://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty Verified by HOD

 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 12
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Common Emitter Configuration

Introduction

 Hence IB (Base In this configuration, the input is given between emitter and base and output
is taken between collector and emitter.

 Emitter base junction is forward biased, whereas the emitter collector junction is reversed
biased

 current) flows in the input circuit and IC (Collector current) flows in the output circuit.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Diode operation
 Transistor Operation
Common Emitter Configuration
Characteristics of CE Configuration
The circuit diagram for CE configuration is given below
Circuit to determine CE static characteristics (Input and Output characteristics)
I (mA)
_C +
A
C
IB(A)
A B
+ _
E
+ +
+ +
VBB V V
_ _ V IE VCE _ _ VCC
BE

The performance of the CE configuration can be determined from the static characteristic
curve.
Input characteristics:-
The input characteristics of CE configuration are determined by increasing the base current IB
from zero by increasing VEB, keeping VCE constant. This step is repeated for various fixed values of
VCE .The input curve obtained are shown below
Input characteristics curve
 IE(A)

VCE=0v VCE>0v
200

150

100

50

VBE(v)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

 For the given value of VCE and increasing the value of VBE, the base current IB increased,
Input characteristics of the CE configuration is similar to CB configuration, where the
Emitter base is forward biased . Hence increases in VBE increases IB.

 But when VCE is increased, the width of the depletion region increases due to reverse bias
which makes the effective width of the base to decreases which in turn decreases IE.
Therefore the curve shifts to the right.

Output characteristics:
The output characteristics of the CE configuration is determined by increasing the collector
current IC by increasing VCE, keeping IB constant at a suitable value by adjusting VCB. This step is
repeated for various fixed values of IB. The curves obtained are shown below.
Output characteristics curve
IC
(mA)
Saturation
region IB=60A

IB=40A

IB=20A
IB=0A
VCE(v)
Cutoff region
The output characteristics have three regions namely
(i) Active region:
In this region, curves are uniform in spacing increases in the collector voltage increases I C here
for large value of IB, IC is larger than IB. Thus current gain is greater than unity makes the transistor to
be uses as an amplifier.
(ii) Saturation region:
For low values of VCE, the transistor operates in this region. Increase in the base current IB does
not cause a corresponding change in IC.
(iii)Cutoff Region:
In this region, the collector current becomes almost zero and small amount of collector current
flows even when IB=0. This is called ICEO.
Transistor equation
The ratio of change in collector current to change in base current is known as current
amplification factor .
I
  C , VCE Constant
I B
We know that IE = IB+IC
IC =IE + ICBO ------------ (1)
Sub IE in eqn (1)  IC = (IB +IC) + ICBO
 = IB +IC + ICBO
IC - IC =  IB + ICBO
IC (1- ) =  IB + ICBO
 1-on both sides
 I
IC  IB  CBO ------------ (2)
1- 1 
We already know
IC IB  ICEO ----------- (3)
Hence comparing (2) & (3)
 I
 and I CEO  CBO
1- 1 
 I C  I B  (  1)I CBO
Transistor Parameters
Four transistor parameters can be determined from CE configuration curve. They are known as
common emitter hybrid parameters (or) h parameters.
(a) Input Impedance (hie)
It is the ratio of the change in base voltage to the change in Base current, keeping VCE constant.
V
h ie  BE , VCE Constant
I B
(b) Output admittance (hoe)
It is the ratio of the change in collector current to the change in collector voltage keeping base
current constant.
I C
h oe  , I B Constant
VCE
(c) Forward current gain (hfe)
It is the ratio of the change in collector current to the change in the base current, keeping VCE
constant.
I
h fe  C , VCE Constant
I B
(d) Reverse Voltage gain (hre)
It is the ratio of the change in the base voltage to the change in the collector Voltage, keeping IB
constant.
V
h re  BE , I B Constant
VCE

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (172-174)
2 “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty Verified by HOD

 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 13
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Common Collector Configuration, Current components

Introduction

 In this configuration, the input is given between base and collector and output is taken between
collector and emitter.

 The base – Collector

ollector is forward biased, whereas the emitter collector junction is reversed biased

 Hence IB (Base current) flows in the input circuit and IE (Emitter current) flows in the output
circuit.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Diode operation
 Transistor Operation
Common Collector Configuration
Characteristics
acteristics of CC configuration
The circuit diagram for CC Configuration is given below
Circuit to determine CC static characteristics (Input and Output characteristics)
IE (mA)
IC + A _
IB (A) E
B
A
+ _
C
+ _
+ _
VBB VBC V V VEC
_ _ IE VEE
+ +

lle
The performance of CC configuration can be determined from the static characteristic curve.
Input characteristics:
The input characteristics of CC configuration are determined by increasing the base current IB
from zero by increasing VBC keeping VEC constant. This step is repeated for various fixed values of
VEC. The curves obtained are shown below.
 Input characteristics curve
100
IB (A)
80

VEC = 2V

VEC = 4V
60
40
20

1 2 3 4 5 6
VCB
The characteristics curve of CC is similar to the CE configuration except the VBC in increased instead
of VBE.
Output Characteristics:
The output characteristics of the CC configuration is determined by increasing the Emitter
current (IE) by increasing VEC, keeping IB constant at a suitable value by adjusting VBC. This step is
repeated for various fixed values of IB. The curves obtained are shown below.
Output Characteristics curve
IE
(mA)

4 IB=60A

3
IB=40A

2 IB=20A
1 IB=0A
1 2 3 4 5 6 VEC(v)

Transistor equation
The ratio of change in Emitter Current to the change in Base current is known as Current
amplification factor (γ)
I
 dc  E , Keeping VCE constant
I B
The Collector Current IC =  IE + ICBO
Here, IE = IB + IC -------- (1)
sub IC in (1) IE = IB +  IE + ICBO
IE (1-) = IB + ICBO
IE (1-) = IB +ICBO
I I
I E  B  CBO
1  1 
(a) Relationship between  and :
I I C
WKT,   C  [since IE = IB + IC]
I E I C  I B
IC
& 
I B
1 I C  IB 1 1 
Hence  1 
 I C  


1 
(b)Relationship between,  and  :-
 I E I E
Current gain  =  (since IE =IB + IC)
I B I E  I C
Dividing numerator & Denominator by IC
I E
IC

I E
1
IC
1
1
I
WKT   C      
I E 1 1 1 


1
   1
1 
COMPARISON OF TRANSISTOR CONFIGURATIONS
Characteristic Common Base Common emitter Common Collector
Input Resistance Very low (20) Low (1 k ) High (400 k )
Output Resistance Very high (400k) High (45 k ) Low (30)
Input Current IE IB IB

Output Current IC IC IE

Input voltage Emitter Base Base Emitter Base collector

applied
output voltage Collector Base Collector emitter Emitter collector
taken
voltage gain About 150 About 500 Less than 1
Current gain Unity Current gain High Very high
Current I I I
amplification factor  dc  C dc  C  dc  E
IE IB IB
Application
high frequency Audio frequency Impedance
circuit circuits matching circuit
Video Content / Details of website for further learning (if any):
1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 14
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Ebermoll’s model

Introduction

 When the collector voltage is increased, the width of the depletion region increases as the
reverse bias voltage increases.
 This increase in the depletion region decreases the width of the B Brase.
ase. This phenomenon of
variation in the Base width with respect to the variation of collector voltage is known as Base
width modulation (or) early effect.
 The value of  increases for large value of VCC (or) early effect.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Transistor Operation
 Configuration
Eber’s moll model
Eber’s moll model is commonly used for large signal analysis and switching application
It is the steady state model helps to analyze the conduction of the various model of the transistor
Current direction and Voltage polarity direction for Ebers moll model

E circuit: C
Basic Eber’s moll equivalent circuit:-
RI FIF

IE IC
E C
VB VB
– + + –

IF IR

  eVkTBE 1    eVkTBC  1 

I F  I ES exp   I R  ICS exp  
   
B
According to the current equation referred by Kirchhoff’s current law
l
I E + I B + IC = 0 ------- (1)
&I =-I –I
The collector current is given as
IC = FIF – IR ------- (2)
qVBE
Where If =IES [ e kT
-1]
qVBC
and IR = ICS [ e kT -1]
Hence sub IF& IR in eqn (2), we get
 qVBC 
I C   F I ES  e kT  1  I CS  e kT  1
qVBE
------- (3)
   
ly The Emitter Current is given as
R = Common base
IE = RIR – IF ------- (4)
current in Reverse active
Sub IF & IR in equ (4), we get
mode
 qVBC kT   qVBE kT 
I E   R ICS e  1  I ES  e  1 ------- (5)
   
Equation (3) & (5) are classic Ebers moll – equations
Eber’s moll model has four parameters: F, R, IES & ICS

a F IES  a R ICS ------- (6)

In this model, Let us determine the Ebers moll equation for the transistor in saturation mode.
We know that, saturation Voltage as
VCE  sat   VBE  VBC ------- (7)
In the saturation mode, VBE >0, & VBC > 0 since both BE & BC junction are forward bias.
VBE Expression
From equation (5)
 qVBC   qVBE 
I E   R ICS  e kT  1  I ES  e kT  1
   
We know that IE = - (IB + IC), hence sub this in above equation
 qVBC   qVBE 
(I B  I C )   R I CS  e kT  1  IES e kT  1
   

RICS e kT 1  IB  IC  IES e kT 1

qVBC qVBE

   
 I  I  I  e qVBE kT  1
qVBC B C ES  
 e kT
1  ------- (8)
 R I CS
Sub eqn (8) in eqn (3), we get
 
IB  IC  IES e kT  1 
qVBE


IC  F IES e kT  1  ICS   
qVBE

    I
R CS 
 

ICR FIESR e   I   I  I  I eqV kT   I

qVBE BE
kT
  F ES R B C ES   ES
eqV kT  I   I  I 1  I  I 1 
 ES F R ES  C  R  B ES  F R 
BE


qVBE IC 1  R   IB  IES 1  F R 
e kT

IES 1  FR 
Taking ln on both sides, we get
qVBE I 1   R   I B  I ES 1   F  R 
 ln C
KT IES 1   F  R 
 IC 1   R   IB  I ES 1   F R 
Hence VBE  Vt ln ------- (9)
I ES 1   F R 
KT
Vt  =Thermal voltage
q
VBC Expression:
From equation (3)

IC FIES e 1 ICS e 1

qVBE qVBC
kT kT
   

I  I eqVBC kT 1
C CS  
eqVBE kT 1  
  FIES
------- (10)

Sub eqn (10) in (5) and also substituting IE = -IB – IC, we get
 
IES  IC  ICS e
qV BC
kT 
1 
  
1  

qV BC

IB  IC RICS e kT
  FIES

  IB  IC   F   F R ICS e   qVBC kT 

qVBC

   R ICS F  I C  I CS  e   ICS
kT

 
qVBC
Taking e kT
term on left side we get
qVBC
e kT
  R F ICS  ICS   IB F  IC ( F  1)  ICS (1  R  F )
qVBC I B  F  I C ( F  1)  ICS (1   R  F )
e kT

I CS (1   F  R )
Taking ln on both sides
qVBC I   I (  1)  I CS (1   F R )
 ln B F C F
KT ICS (1   F  R )
KT I B  F  IC ( F  1)  ICS (1   F R )
VBC  ln
q I CS (1   F  R )
I   I (  1)  ICS (1   F  R )
VBC  VT ln B F C F ------ (11)
ICS (1   F  R )
Now VCE (Sat) = VBE-VBC
Sub eqn (9) & (11) by neglecting IES & ICS term we get
IC (1  R )  IB I   I ( 1)
VCE (sat)  Vt ln  Vt ln B F C F
IES (1  FR ) ICS (1  FR )
IC (1  R )  IB I (1  FR )
VCE (sat)  Vln
t X CS
IES (1  FR ) IBF  IC (F 1)
 I (1   R )  I B I 
VCE (sat)  Vt ln  C X CS 
 I B F  IC ( F  1) I ES 
 F I CS
Sub  , we get
 R I ES
 I (1   R )  I B  
VCE (sat)  Vt ln  C X F
 I B F  IC ( F  1)  R 
Video Content / Details of website for further learning (if any):
1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
 4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir/

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (161-164)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 15
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Small Signal Low Frequency Model

Introduction

 h- parameter is used to analysis the behavior of the device

device. Commonly h parameter is used to
analyze the small signal frequency of the transistor and mid band analysis of the transistor.
 It is a set of four transistor equivalent circuit parameters that conveniently used to specify
transistor performance for small voltage and current.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Transistor Operation
 Configuration
Small Signal Low frequency Model

 h-parameter is used to analysis the behavior of the device.

device commonly h parameter is used to
analyze the small signal frequency of the transistor and midband analysis of the transistor.

 It is a set of four transistor equivalent circuit parameters that conveniently

niently used to specify
transistor performance for small voltage and current.

 This model consider transistor as two port Network with V1 & I1 as input Voltage and input
current and V2 & I2 as output voltage and output current.

 Two parameters are considere

considered
d as dependent parameter and other two parameters
parameter as
independent parameter.

Two port Network

I1 I2
Port 1 (or) Port 2 (or)
input port V1 V2 output port

The input voltage and output current can be written as

V1  h11I1  h12 V2
I 2  h 21I1  h 22 V 2
When V2 = 0 that is output port short circuited
V
V1 =h11i1  h 11 = 1 , it is known as input impedance
I
 I2
I 2 = h 21I1 ==>h 21 = , it is known as forward current gain (or) forward transfer ratio.
I1
When I1=0 that is input port open circuited
I
I 2 = V2 h 22  h 22 = 2 , it is known as output admittance
V2
V
V1 = h12 V2  h12 = 1 , it is known as Reverse Voltage gain (or) reverse transfer ratio
V2
Equivalent Circuit of the h – parameter
I h11
1

V1 h12v2 + h21I1 V2
- h22

.
From the above circuit, the unit for various h parameters are h 11=, h22 =Ʊ and h12, h21
dimensionless all the h parameters units are unique and they are hybrid in nature. Hence these
parameters are referred to as hybrid parameters.
 Based upon the type of configuration the various hybrid parameters are expressed by adding the
configuration type to the second subscript.
(e.g.) h11e = short circuit input impedance for CE Configuration.
h parameter model for various configurations
CE configuration:-
B Ib hie Ic
C

+
Vb hre vc hfeib Vc
hoe
–

E E
CB Configuration:-
E IE hib Ic
C

+
Ve hrb vc hfbie Vc
hob
–

B B
CC Configuration:-
B Ib hic IE
E

+
Vb hrc vc hfeib Vc
hoc
–

C C
The h parameter model can be applied to any kind of biasing and load.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, Jacob Millman, Christos Halkias, McGraw Hill, Third
Edition, 2001. (317-320)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 16
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Hybrid High frequency effects

Introduction

 At high frequencies, the capacitive effects of the transistor junctions and the delay in response
of the transistor caused by the process of diffusion of carriers should be taken into account in
determining the high frequency model of a transistor.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Transistor Operation
 Transistor Configuration
Hybrid High frequency effects (Hybrid
(Hybrid- Pi Model)
The capacitive effects of the transistor junctions and analysis of the transistor can be done at
high frequency by means of high frequency model of a transistor.
Common emitter NPN transistor with input Vbe and output Vce
IC
Ib
B

Vce
Vbe

E
Cross section of the NPN transistor for hybrid pi
pi-model
C B E B C

p n E`
n B`
p p
C`
n+ buried
layer
P

here C, B, E are the external Connections to the transistor and C’, B’, E’ are the idealized
internal collector base and emitter regions. Equivalent circuit between various two terminals of the
 rb
B

+ C Cje
Vb`e rπ
–

E`

re

E
 The resistance rb is the series resistance in the base between external base terminal B and
internal Base region B’.

 The resistance re is the series resistance between external emitter terminal and internal
emitter region. This resistance is small of order 1 to 2.

 Since B’E’ junction is forward biased, C is the junction diffusion Capacitance and r is the
junction diffusion resistance. These two parameters are functions of junction current.

 There two elements are in parallel with the junction capacitance, Cje.

Hybrid pi-equivalent Circuit between collector and emitter

C` rc
C

gmVb` ro Cs
e`

E
 The rc resistance is the series resistance between external and internal collector connections

 Cs is the junction capacitance of the collector substrate junction

 ro is the inverse of output conductance go primarily due to early effect.

 gmVb’e’ is the dependent current source which is controlled by internal base – emitter
voltage

Hybrid pi-equivalent circuit between base and collector:

r

B` C`

C
 The C is the reverse biased junction capacitance and r is the reverse bias biased resistance.
The value of C is much smaller than C but due to the miller capacitance effect, C cannot
be ignored. Miller capacitance is the equivalent capacitance between B1 and E1 due to C
and feedback effect (gain) of transistor.
 Hybrid pi-equivalent circuit
r

rb B` C` rc
B C
Cs
C

gmVb`e`
Cπ Cje rπ ro

E`
re

E
The above circuit helps to analyze the effect of input signal frequency on the transistor.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, Jacob Millman, Christos Halkias, McGraw Hill, Third
Edition, 2001. (381-383)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 17
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Transistor as an

n Amplifier
Introduction

 It is used to magnify the given input signal.

 It has finite gain
 In an amplifier the frequency waveform and magnitude of AC output signal are controlled by
the AC input signal applied at the input.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Transistor Operation
 Configuration
Transistor Amplifier Circuit
 The transistor raises the strength of a weak signal and hence acts an amplifier. The transistor
amplifier circuit is shown in the figure below.
 The transistor has three terminals namely emitter, base and collector. The emitter and base of
the transistor are connected iin
n forward biased and the collector base region is in reverse bias.
 The forward bias means the P P-region
region of the transistor is connected to the positive terminal of
the supply and the negative region is connected to the N N-terminal
terminal and in reverse bias just
opposite of it has occurred.

 The input signal or weak signal is applied across the emitter base and the output is obtained to
the load resistor RC which is connected in the collector circuit.
 The DC voltage VEE is applied to the input circuit along with the input signal to achieve the
amplification.
 The DC voltage VEE keeps the emitter-base
emitter junction under the forward biased condition
regardless of the polarity of the input signal and is known as a bias voltage.
 When a weak signal
gnal is applied to the input, a small change in signal voltage causes a change in
emitter current (or we can say a change of 0.1V in signal voltage causes a change of 1mA in the
emitter current) because the input circuit has very low resistance. This chang
change is almost the
same in collector current because of the transmitter action.
  In the collector circuit, a load resistor RC of high value is connected. When collector current
flows through such a high resistance, it produces a large voltage drop across it. Thus, a weak
signal (0.1V) applied to the input circuit appears in the amplified form (10V) in the collector
circuit.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, Jacob Millman, Christos Halkias, McGraw Hill, Third
Edition, 2001. (251)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 18
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J.Rangarajan
Unit : II - Bipolar Junction Transistors Date of Lecture:

Topic of Lecture: Transistor as a Switch

Introduction

 Transistor acts a switch when it is operated at either cutoff region or saturation region.
regi
Prerequisite knowledge for Complete understanding and learning of Topic:
 Transistor Operation
 Configuration
Transistor as a Switch

 To operate the transistor as a switch the transistor needs to be turned either fully “OFF” (cut
(cut-
off) or fully “ON” (saturated).
 An ideal transistor switch would have infinite circuit resistance between the Collector and
Emitter when turned “fully
“fully-OFF” resulting in zero
ero current flowing through it and zero
resistance between the Collector and Emitter when turned “fully
“fully-ON”,
ON”, resulting in maximum
current flow.
 In practice when the transistor is turned “OFF”, small leakage currents flow through the
transistor and when fully
ly “ON” the device has a low resistance value causing a small saturation
voltage ( VCE ) across it.
 Even though the transistor is not a perfect switch, in both the cut-off
cut off and saturation regions the
power dissipated by the transistor is at its minimum.
 Thee figure shows the circuit diagram of transistor switching arrangement.
 In order for the Base current to flow, the Base input terminal must be made more positive than
the Emitter by increasing it above the 0.7 volts needed for a silicon device.
 By varying this Base-Emitter
Emitter voltage VBE, the Base current is also altered and which in turn
controls the amount of Collector current flowing through the transistor.
  When maximum Collector current flows the transistor is said to be Saturated. The value of the
Base resistor determines how much input voltage is required and corresponding Base current to
switch the transistor fully “ON”.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.html

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, Jacob Millman, Christos Halkias, McGraw Hill, Third
Edition, 2001. (276-277)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 1 and 2)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-19
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: Operation and Characteristics of JFET

Introduction: The JFET is abbreviated as Junction Field Effect Transistor. The types of JFET are
n-channel FET and P-channel FET. A p-type material is added to the n-type substrate in n-channel
FET, whereas an n-type material is added to the p-type substrate in p-channel FET. Hence it is enough
to discuss one type of FET to understand both.
Prerequisite knowledge for Complete understanding and learning of Topic:
PN junction, Diode, Transistor
Detailed content of the Lecture:
N-channel JFET
 For the fabrication of N channel FET, a narrow bar of N-type semiconductor is taken on which
P-type material is formed by diffusion on the opposite sides.
 These two sides are joined to draw a single connection for gate terminal. The area between
gates is called as a channel. The majority carriers pass through this channel.

 When VGG is reverse biased and VDD is not applied, the depletion regions between P and N
layers tend to expand.
 When VDD is applied (positive terminal to drain and negative terminal to source) and VGG is not
applied, the electrons flows from source to drain which constitute the drain current ID.

 The supply at gate terminal makes the depletion layer grow and the voltage at drain terminal
allows the drain current from source to drain terminal.
  The resistance of the channel will be such that the voltage drop at the drain terminal is greater
than the voltage drop at the source terminal.
 So, the reverse biasing effect is stronger at drain terminal than at the source terminal. This is
why the depletion layer tends to penetrate more into the channel near drain than at source.

Operation of FET
 Let us consider that there is no potential applied between gate and source terminals and a
potential VDD is applied between drain and source.
 Now, a current ID flows from drain to source terminal, at its maximum as the channel width is
more. Let the voltage applied between gate and source terminal VGG is reverse biased.
 This increases the depletion width, as discussed above. As the layers grow, the cross-section of
the channel decreases and hence the drain current ID also decreases.
 When this drain current is further increased, a stage occurs where both the depletion layers
touch each other, and prevent the current ID flow.
 The voltage at which both these depletion layers literally “touch” is called as “Pinch off
voltage”. It is indicated as VP.
 The drain current is literally nil at this point. Hence the drain current is a function of reverse
bias voltage at gate.
 Since gate voltage controls the drain current, FET is called as the voltage controlled device.

Drain Characteristics of JFET

 The circuit of FET to obtain these characteristics is given above.

 When the voltage between gate and source VGS is zero, or they are shorted, the current ID from
source to drain is also nil as there is no VDS applied.
 As the voltage between drain and source VDS is increased, the current flow ID from source to
drain increases. This increase in current is linear up to a certain point A, known as Knee
Voltage.
 The gate terminals will be under reverse biased condition and as ID increases, the depletion
regions tend to constrict.
 This constriction is unequal in length making these regions come closer at drain and farther at
drain, which leads to pinch off voltage.
 The point at which this pinch off voltage occurs is called as Pinch off point, denoted as B.
 As VDS is further increased, the channel resistance also increases in such a way
that ID practically remains constant.
 The region BC is known as saturation region or amplifier region. All these along with the
points A, B and C are plotted in the graph.
 The drain characteristics are plotted for drain current ID against drain source voltage VDS for
different values of gate source voltage VGS.
 The overall drain characteristics for such various input voltages are as given in the next figure.
  As the negative gate voltage controls the drain current, FET is called as a Voltage controlled
device. The drain characteristics indicate the performance of a FET.

Video Content / Details of website for further learning (if any):

 https://nptel.ac.in/content/storage2/courses/113106065/Week%206/Lesson13.pdf
 https://www.ee.iitb.ac.in/~sequel/ee101/ee101_ jfet_1.pdf
 https://www.tutorialspoint.com/basic_electronics/basic_electronics_jfet.htm

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and

nd
A.Vallavaraj,TataMicgraw Hill, 2 Edition, 2008 (197-205)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-20
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture:Configuration of JFET - JFET as Amplifier

Introduction :
 In this chapter, we will discuss about a Configuration of JFET and how JFET act as Amplifier.
Prerequisite knowledge for Complete understanding and learning of Topic:
 BJT Configuration, Concept of JFET

Detailed content of the Lecture:

 Three different configurations of FET are shown in the following figure.

 Their important characteristics are shown in the table.

Common Source Configuration Performance parameters

FET COMMON COMMON COMMON

CONFIGURATION GATE DRAIN SOURCE
(SOURCE
FOLLOWER)

Voltage gain High Low Medium

Common Drain Configuration Current gain Low High Medium

Power gain Low Medium High

Input resistance Low High Medium

Output resistance High Low Medium

Common Gate Configuration Input / output 0° 0° 180°

phase relationship
JFET as Amplifier

Video Content / Details of website for further learning (if any):

 https://nptel.ac.in/content/storage2/courses/113106065/Week%206/Lesson13.pdf
 https://www.ee.iitb.ac.in/~sequel/ee101/ee101_ jfet_1.pdf
 https://www.tutorialspoint.com/basic_electronics/basic_electronics_jfet.htm
 https://www.electronics-notes.com/articles/analogue_circuits/fet-field-effect-transistor/fet-
circuit-configurations.php

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj, Tata

Micgraw Hill, 2nd Edition, 2008 (197-205)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-21
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: JFET as Switch

Introduction :
 In this chapter, we will discuss about a how JFET act as Switch. By providing proper biasing to
the Gate terminal of the FET, it can work as an ON and OFF switch. Fast switching operation
can be achieved than the junction transistor.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Concept of JFET
Detailed content of the Lecture:

N-Channel JFET as a Switch

 The N-channel JFET used to switch the LED.

 The LED is connected between supply and source terminal through a resistor. Here resistor is
used to limit the current through the LED.
 Gate terminal of the transistor connected to the negative supply.
 From the JFET discussion, zero voltage on the gate terminal makes current to flow through the
LED because FET is in saturation mode. Therefore, the LED becomes ON.
 With a sufficient negative voltage on the gate terminal (about 3-4 volts), JFET drives into
cutoff mode so the LED becomes turned OFF.
P-Channel JFET as a Switch

 Similar to the N-channel JFET driven LED, P-channel JFET switched LED circuit is given
below. The difference between the two circuits is the supply source at the gate terminal.
 Turn ON condition remains same for both circuits that is zero voltage at the gate terminal
causes the LED to glow as the FET is active.
 For switching the FET into cutoff, a sufficient positive voltage (about 3 to 4 volts in this case)
stops the current flow through the circuit.
 Therefore the LED is turned OFF.
 We can also use FETs for turning the relay circuits, motor drivers, and other electronic
controlling circuits.

Video Content / Details of website for further learning (if any):

 https://nptel.ac.in/content/storage2/courses/113106065/Week%206/Lesson13.pdf
 https://www.ee.iitb.ac.in/~sequel/ee101/ee101_ jfet_1.pdf
 https://www.tutorialspoint.com/basic_electronics/basic_electronics_jfet.htm
 https://www.electronicshub.org/fet-as-a-switch/

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj,

TataMicgraw Hill, 2nd Edition, 2008 (202-205)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-22
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: JFET as Voltage Variable Resistor

Introduction :
 In addition to working as a switch, the JFET can also act as Voltage Variable Resistor.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Concept of JFET

Detailed content of the Lecture:

 FET is a device that is usually operated in the constant-current portion of its output
characteristics.
 But if it is operated on the region prior to pinch-off (that is where VDS is small, say below 100
mV), it will behave as a voltage-variable resistor (VVR).
 It is due to the fact that in this region drain-to-source resistance RDS can be controlled by
varying the bias voltage VGS.
 In such applications the FET is also referred to as a voltage-variable resistor or volatile
dependent resistor.

 Note that the drain curves shown in figure, extend on both sides of the origin.
  This means that a JFET can be employed as a voltage-variable resistor for small ac signals,
typically those less than 100mV.
 When it is employed in this way, it does not require a dc drain voltage from the supply. All that
is required is an ac input signal.

Video Content / Details of website for further learning (if any):

 https://nptel.ac.in/content/storage2/courses/113106065/Week%206/Lesson13.pdf
 https://www.ee.iitb.ac.in/~sequel/ee101/ee101_ jfet_1.pdf
 https://www.tutorialspoint.com/basic_electronics/bsic_electronics_jfet.htm
 http://www.circuitstoday.com/fet-as-a-vvr-voltage-variable-resistor

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and A.Vallavaraj,

TataMicgraw Hill, 2nd Edition, 2008 (202-205)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-23
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: MOSFET

Introduction :
FETs have a few disadvantages like high drain resistance, moderate input impedance and slower
operation. To overcome these disadvantages, the MOSFET(Metal Oxide Silicon Field Effect
Transistor) which is an advanced FET is invented.
Prerequisite knowledge for Complete understanding and learning of Topic:
 JFET
Detailed content of the Lecture:

 MOSFET stands for Metal Oxide Silicon Field Effect Transistor or Metal Oxide
Semiconductor Field Effect Transistor.
 This is also called as IGFET meaning Insulated Gate Field Effect Transistor. The FET is
operated in both depletion and enhancement modes of operation.

Construction of a MOSFET

 The construction of a MOSFET is a bit similar to the FET. An oxide layer is deposited on the
substrate to which the gate terminal is connected.
 This oxide layer acts as an insulator (sio2 insulates from the substrate), and hence the
MOSFET has another name as IGFET.
 In the construction of MOSFET, a lightly doped substrate, is diffused with a heavily doped
region.
 Depending upon the substrate used, they are called as P-type and N-type MOSFETs.

 The voltage at gate controls the operation of the MOSFET. In this case, both positive and
negative voltages can be applied on the gate as it is insulated from the channel.

 With negative gate bias voltage, it acts as depletion MOSFET while with positivegate bias
 voltage it acts as an Enhancement MOSFET.

Classification of MOSFETs

 Depending upon the type of materials used in the construction, and the type of operation, the
MOSFETs are classified as follows:
The N-channel MOSFETs are simply
called as NMOS. The symbols for N-
channel MOSFET are as given below.

 The P-channel MOSFETs are simply called as PMOS. The symbols for P-channel MOSFET
are as given below

Video Content / Details of website for further learning (if any):

 https://nptel.ac.in/content/storage2/courses/108105066/PDF/L-6(DK)(PE)%20((EE)NPTEL).pdf
 http://home.iitk.ac.in/~imon/Teaching.html
 https://www.tutorialspoint.com/basic_electronics/basic_electronics_mosfet.htm

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan , N.Sureshkumar and A.Vallavaraj,

TataMicgraw Hill, 2nd Edition, 2008.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-24
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: Enhancement and Depletion mode MOSFET

Introduction :
Like FET, the MOSFETs are three terminal devices with a Gate, Drain and Source and both P-channel
(PMOS) and N-channel (NMOS) MOSFETs are available. The main difference this time is that
MOSFETs are available in two basic forms:
 Depletion Type – the transistor requires the Gate-Source voltage, ( VGS ) to switch the device
“OFF”. The depletion mode MOSFET is equivalent to a “Normally Closed” switch.
 Enhancement Type – the transistor requires a Gate-Source voltage, ( VGS ) to switch the
device “ON”. The enhancement mode MOSFET is equivalent to a “Normally Open” switch.
Prerequisite knowledge for Complete understanding and learning of Topic:
 JFET
Detailed content of the Lecture:
Depletion-mode MOSFET

 The Depletion-mode MOSFET, which is less common than the enhancement mode types is
normally switched “ON” (conducting) without the application of a gate bias voltage.
 That is the channel conducts when VGS = 0 making it a “normally-closed” device.
 The circuit symbol shown above for a depletion MOS transistor uses a solid channel line to
signify a normally closed conductive channel.
 For the n-channel depletion MOS transistor, a negative gate-source voltage, -VGS will deplete
(hence its name) the conductive channel of its free electrons switching the transistor “OFF”.
 Likewise for a p-channel depletion MOS transistor a positive gate-source voltage, +VGS will
deplete the channel of its free holes turning it “OFF”.

 In other words, for an n-channel depletion mode MOSFET: +VGS means more electrons and
more current.
 While a -VGS means less electrons and less current. The opposite is also true for the p-channel
types. Then the depletion mode MOSFET is equivalent to a “normally-closed” switch.
 The depletion-mode MOSFET is constructed in a similar way to their JFET transistor
 counterparts were the drain-source channel is inherently conductive with the electrons and
holes already present within the n-type or p-type channel.
 This doping of the channel produces a conducting path of low resistance between
the Drain and Source with zero Gate bias.

Enhancement-mode MOSFET

 The more common Enhancement-mode MOSFET or eMOSFET, is the reverse of the

depletion-mode type.
 Here the conducting channel is lightly doped or even undoped making it non-conductive. This
results in the device being normally “OFF” (non-conducting) when the gate bias voltage, VGS is
equal to zero. The circuit symbol shown above for an enhancement MOS transistor uses a
broken channel line to signify a normally open non-conducting channel.
 For the n-channel enhancement MOS transistor a drain current will only flow when a gate
voltage ( VGS ) is applied to the gate terminal greater than the threshold voltage ( VTH ) .
 The application of a positive (+ve) gate voltage to a n-type eMOSFET attracts more electrons
towards the oxide layer around the gate thereby increasing or enhancing (hence its name) the
thickness of the channel allowing more current to flow.
 This is why this kind of transistor is called an enhancement mode device as the application of a
gate voltage enhances the channel.
 Increasing this positive gate voltage will cause the channel resistance to decrease further
causing an increase in the drain current, ID through the channel.
 In other words, for an n-channel enhancement mode MOSFET: +VGS turns the transistor
“ON”, while a zero or -VGS turns the transistor “OFF”.
 Thus the enhancement-mode MOSFET is equivalent to a “normally-open” switch.

Video Content / Details of website for further learning (if any):

 https://nptel.ac.in/content/storage2/courses/108105066/PDF/L-6(DK)(PE)%20((EE)NPTEL).pdf
 http://www.iitg.ac.in/apvajpeyi/ph218/Lec-27.pdf
 https://www.electronics-tutorials.ws/transistor/tran_6.html

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan , N.Sureshkumar and A.Vallavaraj,
TataMicgraw Hill, 2nd Edition, 2008 (206-214)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-25
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: Characteristics of NMOS

Introduction :
 The metal–oxide–semiconductor field-effect transistor (MOSFET) is a transistor used for
amplifying or switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate
electrode can induce a conducting channel between the two other contacts called source and drain.
The channel can be of n-type or p-type, and is accordingly called an NMOS or a PMOS

Prerequisite knowledge for Complete understanding and learning of Topic:

JFET , MOSFET
Detailed content of the Lecture:

N-channel
 As the voltage on the top electrode increases further, electrons are attracted to the surface.
 At a particular voltage level, which we will shortly define as the threshold voltage, the electron
density at the surface exceeds the hole density.
 At this voltage, the surface has inverted from the p-type polarity of the original substrate to an n-
type inversion layer, or inversion region, directly underneath the top plate.
 This inversion region is an extremely shallow layer, existing as a charge sheet directly below the
gate.
 In the MOS capacitor, the high density of electrons in the inversion layer is supplied by the
electron–hole generation process within the depletion layer.
 The positive charge on the gate is balanced by the combination of negative charge in the inversion
layer plus negative ionic acceptor charge in the depletion layer.
 The voltage at which the surface inversion layer just forms plays an extremely important role in
field-effect transistors and is called the threshold voltage Vtn.

 When the channel forms in the nMOS (pMOS) transistor, a positive (negative) drain voltage with
respect to the source creates a horizontal electric field moving the electrons (holes) toward the
drain forming a positive (negative) drain current coming into the transistor.
 The positive current convention is used for electron and hole current, but in both cases electrons
are the actual charge carriers.
 If the channel horizontal electric field is of the same order or smaller than the vertical thin oxide
 field, then the inversion channel remains almost uniform along the device length.
 This continuous carrier profile from drain to source puts the transistor in a bias state that is
equivalently called either the non-saturated, linear, or ohmic bias state.
 The drain and source are effectively short-circuited. This happens when VGS > VDS + Vtn for
nMOS transistor and VGS < VDS +Vtp for pMOS transistor.
 Drain current is linearly related to drain-source voltage over small intervals in the linear bias
state.
 But if the nMOS drain voltage increases beyond the limit, so that VGS < VDS + Vtn, then the
horizontal electric field becomes stronger than the vertical field at the drain end.

Video Content / Details of website for further learning (if any):

 https://www.ee.iitb.ac.in/course/~dghosh/mosfetSlides.pdfhttps://www.iitg.ac.in/cseweb/vlab/vlsi/
MOSFET_theory.html
 http://vlab.amrita.edu/index.php?sub=59&brch=16&sim=270&cnt=1

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan , N.Sureshkumar and A.Vallavaraj,TataMicgraw

Hill, 2nd Edition, 2008 (212-214)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-26
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN
Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: Characteristics of PMOS

Introduction :
 The metal–oxide–semiconductor field-effect transistor (MOSFET) is a transistor used for
amplifying or switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate
electrode can induce a conducting channel between the two other contacts called source and drain.
The channel can be of n-type or p-type, and is accordingly called an NMOS or a PMOS

Prerequisite knowledge for Complete understanding and learning of Topic:

FET, Channel, MOSFET
Detailed content of the Lecture: The biasing arrangement and the characteristic curve of PMOS is
shown in the figure.

Video Content / Details of website for further learning (if any):

 https://www.ee.iitb.ac.in/course/~dghosh/mosfetSlides.pdfhttps://www.iitg.ac.in/cseweb/vlab/vlsi/
MOSFET_theory.html
 http://vlab.amrita.edu/index.php?sub=59&brch=165&sim=270&cnt=1
Important Books/Journals for further learning including the page no’s:
 “Electronic Devices and Circuits”, S.Salivahanan , N.Sureshkumar and A.Vallavaraj,
TataMicgraw Hill, 2nd Edition, 2008 (212-214)

Course Teacher Verified by HOD

 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L-27
LECTURE HANDOUTS

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit III : FIELD EFFECT TRANSISTORS Date of Lecture:

Topic of Lecture: Characteristics of CMOS

Introduction :
 Two important characteristics of CMOS devices are high noise immunity and low
static power consumption. Since one transistor of the MOSFET pair is always off, the series
combination draws significant power only momentarily during switching between on and off
states.
Prerequisite knowledge for Complete understanding and learning of Topic:
 NMOS, PMOS
Detailed content of the Lecture:

 CMOS circuits are constructed in such a way that all P-type metal–oxide–
semiconductor (PMOS) transistors must have either an input from the voltage source or from
another PMOS transistor.
 Similarly, all NMOS transistors must have either an input from ground or from another NMOS
transistor.
 The composition of a PMOS transistor creates low resistance between its source and drain
contacts when a low gate voltage is applied and high resistance when a high gate voltage is
applied.

 On the other hand, the composition of an NMOS transistor creates high resistance between
source and drain when a low gate voltage is applied and low resistance when a high gate
voltage is applied.
 CMOS accomplishes current reduction by complementing every nMOSFET with a pMOSFET
and connecting both gates and both drains together.
 A high voltage on the gates will cause the nMOSFET to conduct and the pMOSFET not to
conduct, while a low voltage on the gates causes the reverse.
 This arrangement greatly reduces power consumption and heat generation.
  However, during the switching time, both MOSFETs conduct briefly as the gate voltage goes
from one state to another. This induces a brief spike in power consumption and becomes a
serious issue at high frequencies.
 The input is connected to both a PMOS transistor (top of diagram) and an NMOS transistor
(bottom of diagram).
 When the voltage of input is low, the NMOS transistor's channel is in a high resistance state.
This limits the current that can flow from to ground.
 The PMOS transistor's channel is in a low resistance state and much more current can flow
from the supply to the output. Because the resistance between the supply voltage and output is
low, the voltage drop between the supply voltage and output due to a current drawn from output
is small. The output, therefore, registers a high voltage
 On the other hand, when the voltage of input is high, the PMOS transistor is in an OFF (high
resistance) state so it would limit the current flowing from the positive supply to the output,
while the NMOS transistor is in an ON (low resistance) state, allowing the output from drain to
ground.
 Because the resistance between output and ground is low, the voltage drop due to a current
drawn into output placing output above ground is small. This low drop results in the output
registering a low voltage.
In short, the outputs of the PMOS and NMOS transistors are complementary such that when the input
is low, the output is high, and when the input is high, the output is low. Because of this behavior of
input and output, the CMOS circuit's output is the inverse of the input.

Video Content / Details of website for further learning (if any):

 https://www.ee.iitb.ac.in/~smdp/DKStutorials/logic-notes.pdf
 https://nptel.ac.in/content/storage2/courses/117101058/downloads/Lec-15.pdf

Important Books/Journals for further learning including the page no’s:

 “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar and

nd
A.Vallavaraj,TataMicgraw Hill, 2 Edition, 2008 (212-214)

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L - 28

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: DC operating point and Load line

Introduction:
The DC load line is the load line of the DC equivalent circuit, defined by reducing the reactive
components to zero (replacing capacitors by open circuits and inductors by short circuits). ... Once
a DC operating point is defined by the DC load line, an AC load line can be drawn through the Q point.
Prerequisite knowledge for Complete understanding and learning of Topic:
Transistors, Types of Transistors, Operation of Transistor

DC operating point and Load line:

 When the transistor is given the bias and no signal is applied at its input, the load line drawn at
such condition can be understood as DC condition.
 Here there will be no amplification as the signal is absent. The circuit will be as shown below.

 The value of collector emitter voltage at any given time will be

VCE=VCC−ICRC
 As VCC and RC are fixed values, the above one is a first degree equation and hence will be a
straight line on the output characteristics. This line is called as D.C. Load line. The figure
below shows the DC load line.
  To obtain the load line, the two end points of the straight line are to be determined. Let those
two points be A and B.

To obtain A

 When collector emitter voltage VCE = 0, the collector current is maximum and is equal to
VCC/RC. This gives the maximum value of VCE. This is shown as
VCE=VCC−ICRC
0 =VCC−ICRC
VCE=VCC−ICRC
IC = (VCE -VCC ) / RC
 This gives the point A (OA = VCC/RC) on collector current axis, shown in the above figure.

To obtain B

 When the collector current IC = 0, then collector emitter voltage is maximum and will be
equal to the VCC. This gives the maximum value of IC. This is shown as
VCE=VCC−ICRC
=VCC (As IC = 0)
 This gives the point B, which means (OB = VCC) on the collector emitter voltage axis shown in
the above figure.
 Hence we got both the saturation and cutoff point determined and learnt that the load line is a
straight line. So, a DC load line can be drawn.
Video Content / Details of website for further learning (if any):

 https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L - 29

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Q Point, Bias Stability

Introduction :
 Q-point is the operating point of the transistor (ICQ,VCEQ) at which it is biased. The concept
of Q-point is used when transistor act as an amplifying device and hence is operated in active
region of input output characteristics.
 Bias Stability (also known as Bias Instability) can be defined as how much deviation or drift
the sensor has from its mean value of the output rate. ... Lower Bias Instability is
advantageous, as it results in a gyro producing fewer deviations from the mean rate over time.
Prerequisite knowledge for Complete understanding and learning of Topic:
Transistors, Types of Transistors, Operation of Transistors

Q Point:
 When a line is drawn joining the saturation and cut off points, such a line can be called
as Load line. This line, when drawn over the output characteristic curve, makes contact at a
point called as Operating point.
 This operating point is also called as quiescent point or simply Q-point. There can be many
such intersecting points, but the Q-point is selected in such a way that irrespective of AC
signal swing, the transistor remains in the active region.
The following graph shows how to represent the operating point.

 The operating point should not get disturbed as it should remain stable to achieve faithful
amplification. Hence the quiescent point or Q-point is the value where the Faithful
Amplification is achieved.
  Biasing is the process of providing DC voltage which helps in the functioning of the circuit. A
transistor is based in order to make the emitter base junction forward biased and collector base
junction reverse biased, so that it maintains in active region, to work as an amplifier.

Transistor Biasing

 The proper flow of zero signal collector current and the maintenance of proper
collectoremitter voltage during the passage of signal is known as Transistor Biasing.
The circuit which provides transistor biasing is called as Biasing Circuit.

Need for DC biasing

If a signal of very small voltage is given to the input of BJT, it cannot be amplified. Because,
for a BJT, to amplify a signal, two conditions have to be met.
 The input voltage should exceed cut-in voltage for the transistor to be ON.
 The BJT should be in the active region, to be operated as an amplifier.
 If appropriate DC voltages and currents are given through BJT by external sources, so that BJT
operates in active region and superimpose the AC signals to be amplified, then this problem
can be avoided.
 The given DC voltage and currents are so chosen that the transistor remains in active region for
entire input AC cycle. Hence DC biasing is needed.
The below figure shows a transistor amplifier that is provided with DC biasing on both input and
output circuits.

 For a transistor to be operated as a faithful amplifier, the operating point should be stabilized.
Let us have a look at the factors that affect the stabilization of operating point.

Factors affecting the operating point

 The main factor that affect the operating point is the temperature. The operating point shifts
due to change in temperature.
 As temperature increases, the values of ICE, β, VBE gets affected.

 ICBO gets doubled (for every 10o rise)

 VBE decreases by 2.5mv (for every 1o rise)
 So the main problem which affects the operating point is temperature. Hence operating point
should be made independent of the temperature so as to achieve stability.
 To achieve this, biasing circuits are introduced.
Stabilization

 The process of making the operating point independent of temperature changes or variations in
transistor parameters is known as Stabilization.
 Once the stabilization is achieved, the values of IC and VCE become independent of temperature
variations or replacement of transistor. A good biasing circuit helps in the stabilization of
operating point.

Need for Stabilization

Stabilization of the operating point has to be achieved due to the following reasons.

 Temperature dependence of IC
 Individual variations
 Thermal runaway
As the expression for collector current IC is
IC= β Ib + ICEO
=β IB + (β+1) ICBO
 The collector leakage current ICBO is greatly influenced by temperature variations. To come out
of this, the biasing conditions are set so that zero signal collector current IC = 1 mA. Therefore,
the operating point needs to be stabilized i.e. it is necessary to keep IC constant.

Individual Variations

 As the value of β and the value of VBE are not same for every transistor, whenever a transistor
is replaced, the operating point tends to change.
 Hence it is necessary to stabilize the operating point.
Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L - 30

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Transistor Biasing Methods

Introduction :
The biasing in transistor circuits is done by using two DC sources VBB and VCC. It is economical to
minimize the DC source to one supply instead of two which also makes the circuit simple.

Prerequisite knowledge for Complete understanding and learning of Topic:

 FET
 Types of FET
 Operation of JFET
 Charecteristics of JFET

Transistor Biasing Methods:

 The biasing in transistor circuits is done by using two DC sources VBB and VCC.
 It is economical to minimize the DC source to one supply instead of two which also makes
the circuit simple.
The commonly used methods of transistor biasing are

 Base Resistor method

 Collector to Base bias
 Biasing with Collector feedback resistor
 Voltage-divider bias
All of these methods have the same basic principle of obtaining the required value of IB and IC from
VCC in the zero signal conditions.

Base Resistor method:

 In this method, a resistor RB of high resistance is connected in base, as the name implies.
 The required zero signal base current is provided by VCC which flows through RB.
 The base emitter junction is forward biased, as base is positive with respect to emitter.

Collector to Base bias:

The collector to base bias circuit is same as base bias circuit except that the base resistor R B is
returned to collector, rather than to VCC supply.
Biasing with Collector feedback resistor:

In this method, the base resistor RB has its one end connected to base and the other to the collector as
its name implies. In this circuit, the zero signal base current is determined by VCB but not by VCC.

Voltage-divider bias:
 Among all the methods of providing biasing and stabilization, the voltage divider bias
method is the most prominent one.
 Here, two resistors R1 and R2 are employed, which are connected to VCC and provide biasing.
The resistor RE employed in the emitter provides stabilization.
Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata McGraw Hill, Second
Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L -31

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Fixed Bias

Introduction :
Fixed biasing is a type of bias where base current is maintained constant for given Vcc by
using fixed resistor. So operating point must remain fixed. Using this two resistors and fixed current,
initial operating point has to be found.
Prerequisite knowledge for Complete understanding and learning of Topic:
FET, Types of FET, Operation of JFET, Characteristics of JFET

Fixed Bias:
 In this method, a resistor RB of high resistance is connected in base, as the name implies.
 The required zero signal base current is provided by VCC which flows through RB.
 The base emitter junction is forward biased, as base is positive with respect to emitter.
 The required value of zero signal base current and hence the collector current (as IC = βIB) can
be made to flow by selecting the proper value of base resistor RB.
 Hence the value of RB is to be known. The figure below shows how a base resistor method of
biasing circuit looks like.

 Let IC be the required zero signal collector current. Therefore,

IB=IC/β
 Considering the closed circuit from VCC, base, emitter and ground, while applying the
Kirchhoff’s voltage law, we get,
VCC=IBRB+VBE

Or
 IBRB=VCC−VBE
 Therefore,
RB=VCC−VBE / IB
 Since VBE is generally quite small as compared to VCC, the former can be neglected with little
error. Then,
RB=VCC / IB
 We know that VCC is a fixed known quantity and IB is chosen at some suitable value. As
RB can be found directly, this method is called as fixed bias method.
 Stability factor S is given by,
S = (β+1) / 1−β(dIBdIC)
 In fixed-bias method of biasing, IB is independent of IC so that,
dIB/dIC=0
 Substituting the above value in the previous equation,
Stability factor (S) = β+1
 Thus the stability factor in a fixed bias is (β+1) which means that IC changes (β+1) times as
much as any change in ICO.

Advantages

 The circuit is simple.

 Only one resistor RE is required.
 Biasing conditions are set easily.
 No loading effect as no resistor is present at base-emitter junction.

Disadvantages

 The stabilization is poor as heat development can’t be stopped.

 The stability factor is very high. So, there are strong chances of thermal run away.
Hence, this method is rarely employed.
Video Content / Details of website for further learning (if any):
https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L - 32

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Collector to Base Bias

Introduction :
It is an improvement over fixed bias method. In this, biasing resistor is connected
between collector and base of the transistor to provide feedback path.
Prerequisite knowledge for Complete understanding and learning of Topic:
FET, Types of FET, Operation of JFET and Characteristics of JFET

Collector to Base Bias:

 The collector to base bias circuit is same as base bias circuit except that the base resistor
RB is returned to collector, rather than to VCC supply as shown in the figure below.

 This circuit helps in improving the stability considerably. If the value of IC increases, the
voltage across RL increases and hence the VCE also increases.
 This in turn reduces the base current IB. This action somewhat compensates the original
increase.
 The required value of RB needed to give the zero signal collector current IC can be calculated
as follows:
 Voltage drop across RL will be
RL = (IC+IB)RL ≅ ICRL
 From the figure,
ICRL+IBRB+VBE=VCC
 Or
IBRB =VCC - VBE - ICRL
 Therefore,
RB = (VCC - VBE - ICRL ) / IB
Or
RB = (VCC - VBE - ICRL ) β / IC
 On applying KVL,
(IB+IC)RL + IBRB + VBE = VCC
Or

IB (RL + RB ) + IC RL+VBE = VCC

 Therefore,

IB = (VCC - IC RL-VBE ) / (RL + RB )

 Since VBE is almost independent of collector current, we get

dIB / dIC = − RL/RL+RB
 We know that
S=1+β / 1−β (dIB / dIC)
 Therefore
S= (1+β) / (1+β (RL / (RL+RB))
 This value is smaller than (1+β) which is obtained for fixed bias circuit.
 Thus there is an improvement in the stability.
 This circuit provides a negative feedback which reduces the gain of the amplifier.
 So the increased stability of the collector to base bias circuit is obtained at the cost of AC
voltage gain.
Video Content / Details of website for further learning (if any):
1. https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L - 33
LECTURE
HANDOUTS
ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Self biasing, Thermal Runaway, Thermal Stability

Introduction :
The regenerative heating cycle produced is called thermal runaway. In a self-biased CE amplifier a
d.c power PC = VCEIC is developed at the collector junction of the transistor. With no signal present,
this d.c power is completely dissipated in the form of heat. Thermal stability of polymer is defined as
the ability of the polymeric material to resist the action of heat and to maintain its properties, such as
strength, toughness, or elasticity at given temperature.
Prerequisite knowledge for Complete understanding and learning of Topic:
 FET, Types of FET, Operation of JFET and Characteristics of JFET

Self Biasing:
 The fixed bias arrangement discussed in the previous section is thermally unstable.
 If the temperature of the transistor rises for any reason (due to a rise in ambient temperature
or due to current flow through it), the collector current will increase.
 This increase in current also causes the DC quiescent point to move away from its desired
position (level).

NPN transistor amplifier with self-bias

 This reaction to temperature is undesirable because it affects amplifier gain (the number of
times of amplification) and could result in distortion.
 A better method of biasing, known as self-bias is obtained by inserting the bias resistor
directly between the base and collector.
 By tying the collector to the base in this manner, feedback voltage can be fed from the
collector to the base to develop forward bias.
 Now, if an increase of temperature causes an increase in collector current, the collector
voltage V C will fall because of the increase of voltage produced across the collector resistor
R L.
 This drop in V C will be fed back to the base and will result in a decrease in the base current.
The decrease in base current will oppose the original increase in collector current and tend to
stabilize it.
  The exact opposite effect is produced when the collector current decreases.

Thermal Runaway:
 As the expression for collector current IC is
IC = β IB+ICEO
= β IB+ (β+1)I CBO
 The flow of collector current and also the collector leakage current causes heat
dissipation.
 If the operating point is not stabilized, there occurs a cumulative effect which increases
this heat dissipation.
 The self-destruction of such an unstabilized transistor is known as Thermal run away.
 In order to avoid thermal runaway and the destruction of transistor, it is necessary to
stabilize the operating point, i.e., to keep IC constant.
Stability Factor
 It is understood that IC should be kept constant in spite of variations of ICBO or ICO.
 The extent to which a biasing circuit is successful in maintaining this is measured
by Stability factor. It denoted by S.
 By definition, the rate of change of collector current IC with respect to the collector
leakage current ICO at constant β and IB is called Stability factor.
S = dIC / dICO at constant IB and β
 Hence we can understand that any change in collector leakage current changes the
collector current to a great extent.
 The stability factor should be as low as possible so that the collector current doesn’t get
affected. S=1 is the ideal value.
 The general expression of stability factor for a CE configuration can be obtained as,
IC=βIB+(β+1)ICO
 Differentiating above expression with respect to IC, we get
1= β dIB / dIC + (β+1) dICO/dIC
Or
1= β (dIB / dIC )+ (β+1) S [Since dICO/dIC=S ]
S = (β+1) / 1−β (dIBc / dIC)
 Hence the stability factor S depends on β, IB and IC.
Thermal Stability:
 Thermal instability occurs when junction temperature and collector current increase in
regenerative and uncontrollable fashion.
 The limit depends on factors both within and external to the transistor.

Video Content / Details of website for further learning (if any):

https://www.tutorialspoint.com/amplifiers/operating_point.htm
Important Books/Journals for further learning including the page nos.:
1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj
Tata McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L - 34
LECTURE
HANDOUTS
ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: FET Biasing Methods :Self Bias and Source Bias

Introduction :
In JFET, the drain current is limited by drain to saturation current Ids. The FET has high input
impedance and there are no gate current flows. The dc voltage of gate is set by voltage divider is not
affected by FET.
Prerequisite knowledge for Complete understanding and learning of Topic:
 FET
 Types of FET
 Operation of JFET
 Charecteristics of JFET
FET Biasing Methods:
 Unlike BJTs, thermal runaway does not occur with FETs.
 However, the wide differences in maximum and minimum transfer characteristics make
ID levels unpredictable with simple fixed-gate bias voltage.
 To obtain reasonable limits on quiescent drain currents ID and drain-source voltage VDS,
source resistor and potential divider bias techniques must be used.
 With few exceptions, MOSFET bias circuits are similar to those used for JFETs. Various
FET biasing circuits are discussed below:

Self-Bias:
  This is the most common method for biasing a JFET. Self-bias circuit for N-channel JFET is
shown in figure.
 Since no gate current flows through the reverse-biased gate-source, the gate current IG = 0
and, therefore, VG = iG RG = 0
 With a drain current ID the voltage at the S is
Vs= ID Rs
 The gate-source voltage is then
 VGs = VG – Vs = 0 – ID Rs = – ID Rs
 So voltage drop across resistance Rs provides the biasing voltage VGg and no external source
is required for biasing and this is the reason that it is called self-biasing.
 The operating point (that is zero signal ID and VDS) can easily be determined from
equation and equation given below :
VDS = VDD – ID (RD + RS)
 Thus dc conditions of JFET amplifier are fully specified. Self biasing of a JFET stabilizes its
quiescent operating point against any change in its parameters like transconductance. .

Source Bias:
 The resistors Rg1 and Rg2 formed the potential divider across VDD.
 The necessary bias is provided by the voltage V2 across Rg2.
 For the adjustment of dc bias point RG1 is used. The gate is reverse biased and so there is no
current flow through Rg. i.e, Ig = 0.
 The gate voltage, Vg = V2 = ( VDD/(Rg1+Rg2))*Rg2

VgS = Vg-Vs

= Vg-Id

For negative the gate to source voltage, the circuit is designed that IdRs must be greater than Vg. It
provides the correct bias voltage. The operating point can be determined by : Id = (V2 – VGS)/Rs

VDS = VDD- ID(RD+RS).

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L - 35

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Voltage Divider Bias Method

Introduction :
Bias voltage is the amount of voltage that an electronic device needs in order to power on and
function. Without bias voltage, an electronic device wouldn't have the power to turn on and be
operated. A microphone is one such device which needs bias voltage in order to operate.

Prerequisite knowledge for Complete understanding and learning of Topic:

 FET
 Types of FET
 Operation of JFET
 Charecteristics of JFET
Voltage Divider Bias Method:

 Among all the methods of providing biasing and stabilization, the voltage divider bias
method is the most prominent one.
 Here, two resistors R1 and R2 are employed, which are connected to VCC and provide biasing.
The resistor RE employed in the emitter provides stabilization.
 The name voltage divider comes from the voltage divider formed by R1 and R2. The voltage
drop across R2 forward biases the base-emitter junction.
 This causes the base current and hence collector current flow in the zero signal conditions.
The figure below shows the circuit of voltage divider bias method
.
  Suppose that the current flowing through resistance R1 is I1. As base current IB is very small,
therefore, it can be assumed with reasonable accuracy that current flowing through R 2 is also
I1.

Now let us try to derive the expressions for collector current and collector voltage.

Collector Current, IC

From the circuit, it is evident that,

I1=VCC/R1+R2
Therefore, the voltage across resistance R2 is
V2 =(VCCR1+R2)/R2
Applying Kirchhoff’s voltage law to the base circuit,
V2 =VBE+VE
V2 =VBE+IERE
IE =V2−VBE/RE
Since IE ≈ IC,
IC = V2−VBE/RE

 From the above expression, it is evident that IC doesn’t depend upon β. VBE is very small that
IC doesn’t get affected by VBE at all.

 Thus IC in this circuit is almost independent of transistor parameters and hence good
stabilization is achieved.

Collector-Emitter Voltage, VCE

Applying Kirchhoff’s voltage law to the collector side,

VCC =ICRC+VCE+IERE
Since IE ≅ IC
= ICRC+VCE+ICRE
= IC(RC+RE)+VCE
Therefore,

VCE=VCC−IC(RC+RE)
RE provides excellent stabilization in this circuit.

V2=VBE+ICRE

 Suppose there is a rise in temperature, then the collector current IC decreases, which causes
the voltage drop across RE to increase.

 As the voltage drop across R2 is V2, which is independent of IC, the value of VBE decreases.
The reduced value of IB tends to restore IC to the original value.

Stability Factor

The equation for Stability factor of this circuit is obtained as

Stability Factor = S=(β+1)(R0+R3)/R0+RE+βRE

= (β+1)×(1+R0RE/β+1+R0RE )
Where
R0=R1R2/R1+R2

 If the ratio R0/RE is very small, then R0/RE can be neglected as compared to 1 and the
stability factor becomes

Stability Factor = S=(β+1)×1/β+1=1

 This is the smallest possible value of S and leads to the maximum possible thermal stability.

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)

2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L - 36

ECE I/II

Course Name with Code : 16GES11 - ELECTRONIC DEVICES

Course Teacher : Dr. J.RANGARAJAN

Unit IV : BIASING OF BJT AND FET Date of Lecture:

Topic of Lecture: Biasing of MOSFET

Introduction :
Biasing in MOSFET Amplifiers is similar to biasing of the FET and transistor . Biasing: Creating the circuit to
establish the desired. DC voltages and currents for the operation of the amplifier.

Prerequisite knowledge for Complete understanding and learning of Topic:

 FET
 Types of FET
 Operation of JFET
 Characteristics of JFET
Biasing MOSFET:
 MOSFET is a bit similar to the FET. An oxide layer is deposited on the substrate to which the gate terminal is
connected. This oxide layer acts as an insulator (sio2 insulates from the substrate), and hence the MOSFET has
another name as IGFET.
 In the construction of MOSFET, a lightly doped substrate, is diffused with a heavily doped region. Depending
upon the substrate used, they are called as P-type and N-type MOSFETs.

The following figure shows the construction of a MOSFET.

The voltage at gate controls the operation of the MOSFET. In this case, both positive and negative
voltages can be applied on the gate as it is insulated from the channel. With negative gate bias voltage, it acts
as depletion MOSFET while with positive gate bias voltage it acts as an Enhancement MOSFET.

Classification of MOSFETs

Depending upon the type of materials used in the construction, and the type of operation, the MOSFETs are
classified as in the following figure.
After the classification, let us go through the symbols of MOSFET.
The N-channel MOSFETs are simply called as NMOS. The symbols for N-channel MOSFET are as given
below.

The P-channel MOSFETs are simply called as PMOS. The symbols for P-channel MOSFET are as given
below.

Video Content / Details of website for further learning (if any):

1. https://www.tutorialspoint.com/amplifiers/operating_point.htm

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012.

Course Teacher

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 37
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Theory and Characteristics of Schottky Diode

Introduction: A Schottky diode is a majority carrier device, where electron-hole recombination is
usually not important. Hence, Schottky diodes have a much faster response under forward bias
conditions than p-n junction diodes. Schottky diodes are specially manufactured to solve the problem
of fast switching which consists of a metal to semiconductor junction.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Barrier region
 Barrier potential
 Operation of diode
Theory and Characteristics of Schottky Diode

Structure

The structure of a metal-semiconductor junction is shown in figure. It consists of a metal

contacting a piece of semiconductor. An ideal Ohmic contact, a contact such that no potential exists
between the metal and the semiconductor, is made to the other side of the semiconductor.

Principle of Operation:

Due to minority carrier free region, schottky diode cannot store the charge. Hence due to lack of
charge storage,it can switch off very fast than a conventional diode.
 It can be easily switched off for the frequencies above 300MHz. The barrier at the junction for a
schottky diode is less than that of normal p-n diode in both forward and reverse bias region. The barrier
potential and breakdown voltage in forward bias and reverse bias region respectively are also less than
p-n junction diode. The barrier potential is 0.25V as compared to 0.7V for normal diode.

Characteristics of Schottky Diode:

Applications:

Due to fast switching characteristics this diode is very useful for high frequency, high speed
applications such as:

 digital computer
 high speed TTL
 radar systems
 mixers and detectors in communication equipments and
 analog to digital converters

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using- schottky-diode /
2. https://www.elprocus.com/schottky-diode-working-and-
applications/https://nptel.ac.in/courses/117103063/
3. httphttps://circuitglobe.com/ schottky-diode -as-an-amplifier.htmls://www.electronics- build-
electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, & A.Vallavaraj, Tata
McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 38
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Tunnel Diode

Introduction: Tunneling is the phenomenon in which the electron from the N side of the PN diode
penetrates into the P side of the PN diode through the junction. The Diode which utilizes this tunneling
phenomenon to exhibit negative resistance under forward bias condition is known as Tunnel Diode.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Barrier potential
 PN junction
 Diode Operation
Tunnel Diode

Construction:-
Structure of Energy level Symbol
P N
EC

EF
EV
EF Ec

A K
Ev

 The Tunneling property is achieved by increasing the doping concentration of 1 part of 10 3.

 It consist of thin junction that is of 100 A˚ which is achieved by increasing the doping
concentration, since width of the junction barrier is inversely proportional to square root of
Impurity concentration.
 The Anode is connected to the P type material and Cathode is connected to the N type
material.
Operation

(i) Under zero bias, the electron will not have sufficient energy to move into P side through
the junction. Hence the forward current is zero and the energy level will be same
throughout the material.
(ii) When forward bias increases with small applied potential, energy level of the N side
increases. The electron in the conduction band of the N side will see empty energy level
on the P side. This makes the tunneling to happen from the N side to the P side.
 Zero - Bias condition Forward bias – Peak voltage
P N P N

Tunneling

(iii) When the forward bias is further increased the tunneling will decreases. At particular
voltage there will be no empty state and few electrons in the N side are opposite to the P
side energy level. Hence current drops to zero. This phenomenon of decreases in current
due to increases in voltage is known as negative resistance characteristics. The diode
will behave as a normal PN junction diode after some particular voltage

Forward bias valley voltage

P N

VI characteristic
VI characteristic of Tunnel Diode
Negative
Resistance Tunneling
Peak Region Current
point
A C
IP
Forward Current IF (mA)

B
IV B Valley point

V1 VP V2 VV V1 VF
Forward Voltage VF (mV)

 When the voltage increases, the current increases till the peak point is reached. The voltage &
current at this particular peak point is known as peak voltage (VP) and peak current (IP)

 After this point current decreases with increases in applied voltage. This phenomenon of
decreases in the current when the voltage increases takes place till the point known as valley
point. This Region from the peak point to the valley point is known as Negative resistance
Region.
  The voltage and current at valley point is known as valley voltage (Vv) and valley current (IV)

 After this point, the tunnel diode will behave as a normal PN junction diode.
4.6.4 Applications: -Tunnel diode is used as

(i) Relaxation oscillation due to the negative resistance characteristics.

(ii) High speed switch circuits using hysteresis.
(iii) An amplifier and microwave oscillator due to the negative Resistance characteristics (which
Requires a few mw of power).
(iv) Memory element.

4.6.5 Advantages:-
(i) Low cost.
(ii) Simple to operate and maintain.
(iii) Need low power and less noise.
(iv) Exhibit high speed due to the fact that tunneling takes place at the speed of light.
Immune to environment.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. httphttps://circuitglobe.com/transistor-as-an-amplifier.html
3. https://nptel.ac.in/courses/117103063/
4. httphttps://circuitglobe.com/transistor-as-an-amplifier.htmls://www.electronics-
tutorials.ws/amplifier/amp_2.htmlbuild-electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition, 2012. (Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 39
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Varactor diode

Introduction: Varactor diode is the specially designed Reverse bias PN junction diode in which the
junction (or) transition capacitance can be varied by suitable variation of Impurity concentration.
concentration
Varactor diode is also known as varicap, tuning (or) voltage capacitor diode (or) voltaca
voltacap.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Capacitor
 Diode Operation
Varactor diode

Construction:
Varactor diode
iode is the specially designed semiconductor diode to operate in Reverse biased
condition. The capacitor is formed when the P and N type material is in contact. The junction will be
filled with immobile positive and negative charge which contributes to capacitor.

Structure of varactor Diode Symbol

P N

A K A K

Equivalent circuit of varactor Diode

Rr

Rs
A K
Cr
A = Anode.
K = Cathode.
Rr = Reverse diode Resistance
Resistance.
Cr = Reverse capacitance (or) barrier capacitance.
capacitance
Rs = Body Resistance.
Operation
We know that capacitance C = ɛ A / W
Where ɛ = permittivity
ttivity of semiconductor material.
material
 Hence capacitance is inversely proportional to depletion region width which is given by
C1/W. When the reverse bias is increased the depletion Region increases hence width of the
Depletion Region increases which in turn decreases the capacitance. Since capacitance and depletion
width is inversely proportional, the Depletion Region acts as conduction plate to vary the capacitance.
Depletion region
P N

Characteristic of Varactor Diode

The characteristic curve of the varactor diode is obtained by plotting the curve between Reverse
voltage and capacitance. The capacitance decreases with the increases in the voltage of Reverse bias.
Characteristic of varactor Diode
C(pF)

-VR

Applications: - Varactor diode can be used as

(i) Frequency modulator.

(ii) Frequency multiplier in microwave receiver.
(iii) Automatic frequency control devices due to its tuning phenomenon.
(iv) RF phase shifter.
(v) Filters and amplifiers.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/using-transistor-as-a-switch/
2. https://www.electronicshub.org/varactor-diode/
3. https://nptel.ac.in/courses/117103063/
4. https://www.electronics-notes.com/articles/electronic_components/diode/varactor-varicap-
diode.php
Important Books/Journals for further learning including the page nos.:
1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (172-174)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

L 40
LECTURE HANDOUTS

ECE I/ II
Course Name with Code : 19GES11 - ELECTRONIC DEVICES
Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Silicon Controlled Rectifier, TRIAC

Introduction: Silicon Controlled Rectifier also known as SCR is three terminal, four layered
semiconductor device which is the modified version of thyrist
thyristorr by adding the terminal Gate (G).
(G)
TRIAC is a three terminal, four layered switch. In this device ttwo
wo SCR are connected in parallel but in
opposite direction.

Prerequisite knowledge for Complete understanding and learning of Topic:

 PN junction
 Barrier potential
 Diode
 Transistor
Silicon Controlled Rectifier, TRIAC

Silicon Controlled Rectifier

Construction

SCR Basic Structure Symbol

Anode
A

P1 A

J1

N1
J2
G
P2
Gate G
J3

N2

Cathode
The basic structure and symbol of the SCR is shown above. It is the four layered semiconductor
device formed by consecutive placement of two PN layers. It is a three terminal (Gate, anode and
cathode) and three junctions (J1, J2 and J3) device in which Gate terminal is connected to lower P2 layer
to trigger the device. The Anode and Cathode is connected to the P1 and N2 layer
Operation of SCR:-
The operation of the SCR is based on two biasing characteristics, that is forward and Reverse
Biasing.
Forward Bias:-
(I) When the forward bias is applied to the Anode and the Cathode as well as Gatecurrent
 (II) When the Gate current is negative that is IG< 0, J1 and J3 is forward biased and J2 is
reverse biased. The SCR will conduct after large breakover voltage VB0.
(III) When the Gate current is increased that is IG> 0, J1 and J3 is forward biased and J2 is
reversed biased. The SCR will conduct quickly due to decrease in breakover voltage.
Hence by Gate Current IG the switching Characteristics can be is controlled. This makes the
device to function as controlled switch. But once the device is ON, the gate cannot be used to switch
off the device. The only way to switch off the device is by reducing the value of anode current below
IH (Holding Current) by reducing VH.
In the Reverse bias, J1 and J3 are reverse bias and J2 is forward bias. This makes the SCR to
switch off due to no flow of current.
Forward bias Reverse bias
A A
P1 + P1 –
N1 VF N1 VR
– +
G P2 G P2
N2 N2
K K
Characteristics:-
The characteristic of the SCR is the graph drawn between the anode current and the anode to
cathode voltage by adjusting the values of IG.
The Breakover voltage (VBO) is defined as the voltage at which SCR starts to conduct hence,
when IG increases VBO decreases and the device conduct soon. Once the device attains holding point
the device will perform as normal diode. The minimum value of current which is required to hold the
device in on-state is known as Holding Current (IH). The voltage correspond to IH is known as Holding
Voltage (VH)
Forward
conduction Forward
region characteristics +
IF
Forward blocking
region –

IG4 IG3 IG2 IG1

IH1 IG=0
Reverse breakdown IH2
voltage IH3
IH4
VR –VAK

IHX VFBO
IFX VF V4 V3 V2 V1
Reverse blocking
region + VAK

– IH
Reverse
characteristics
+

In the Reverse bias condition the device will breakdown due to avalanche breakdown
Mechanism.

Turning ON (Triggering)
Turning ON the SCR is known as Triggering
1. Forward Break over Voltage
When the voltage applied across the SCR is greater than the forward break over voltage. Then
the SCR will start to conduct.
2. Gate triggering
The SCR can be triggered to ON state by applying the gate voltage > 0 which makes the device
to ON state but once the device is ON, the gate will not have any control over the device.
3. Light triggering
This is the another version of the SCR known as Light activated SCR (LASCR). This can be
.
4. Rate effect triggering
dVA
By rapidly increasing the anode to cathode voltage , the SCR will turn ON from off state.
dt
This produce the charges to flow, makes the device to conduct.
Turning OFF
Normally two methods are available to turn OFF the SCR.
(i) Anode Current Interruption Method
The anode current of the SCR is reduced to zero by reducing the value of Current Less than
Holding IG. This is done by switching arrangement.
(ii) Forced commutation method
In this method, the current through SCR is reduced below the holding current by reversing the
polarity of anode to cathode voltage.

Two transistor version of SCR

The operation of the SCR can be analyzed by considering the SCR of two transistor (P1N1P2) and
(N1P2N2) connected back to back.

Structure of SCR Circuit Diagram

Applications:-
SCR is commonly used in
(i) Battery charger and Inverter
(ii) Rectifier circuit in various electronic equipment
(iii) Switches and power supplying unit
(iv) Control element such as motor, power, phase ,etc
TRIAC

Construction:-
Structure of TRIAC Equivalent circuit Symbol
MT1 G
MT1
N N MT
P1 1 G
SCR2
N1 SCR1
P2 G
N
MT
2
MT
MT
 The structure of TRIAC consist of three terminal, four layered switch of P1N1P2N2 and
P2N1P1N3. The two SCR are connected in parallel but in opposite direction. It is seen that anode of one
SCR is connected to cathode of another SCR. The gate is connected near terminal MT1. The gate is
applied with positive (or) negative voltage with respect to terminal MT2 to control the devices.

Operation:-

TRIAC exhibit four modes of operation based on the polarity of the voltage applied across the
main terminal MT2 and Gate.

Mode 1:-

In this mode, the terminal 2 (MT2) is positive with respect to the terminal 1 (MT1) and Gate is
positive. The TRIAC will be forward biased and the TRIAC is said to operate in the first quadrant.
This mode is also known as (I+) mode of operation.

MT1(-)
G
(+)

MT2(+)
Mode 2:-

In this mode, the terminal 2 (MT2) is positive with respect to the terminal 1(MT1) and Gate is
made negative. The TRIAC will be forward biased and the TRIAC is said to operate in the first
quadrant. This mode is also known as (I-) mode of operation. It is less efficient.

MT1(-)
G (-)

MT2(+)
Mode 3:-

In this mode, the terminal 2 (MT2) is negative with respect to the terminal 1 (MT1) and the Gate
is made positive. The TRIAC current reverses and function in the third quadrant. This mode is also
known as (III+) mode of operation. It is inefficient mode.

MT1(+)
G
(+)

MT2(-)
Mode 4:-

In this mode, the terminal 2 (MT2) and gate is made negative with respect to terminal 1 (MT1).
The TRIAC current reverses and function in the third quadrant. This made is also known as (III-) mode
of operation. It is more efficient and sensitive than III+ mode

MT1(+)
G (-)

MT2(-)

VI characteristics of TRIAC

The VI characteristics of the TRIAC is the relationship between voltage and current across the
two main terminals.

VI characteristics curve
IF

MT2 and
Gate is positive
IH

-VBO -VH
-VR VF
VH VBO

MT1 and -IH

Gate is negative

-IR

The characteristics of the TRIAC when MT2 is made positive and negative with respect to MT1
are shown above. When Gate and MT2 is positive, the TRIAC is efficient in the quadrant 1 and when
MT2 and Gate is negative, the TRIAC is efficient in quadrant III.

Applications:-

It is
(i) Used as a switch to ON and OFF the AC supply.
(ii) Used as a light dimmer.
(iii) Used to control motor speed, heat and phase of the circuit.
Video Content / Details of website for further learning (if any):
1. https://www.physics-and-radio-electronics.com/electronic-devices-and-circuits/semiconductor-
diodes/silicon-controlled-rectifier.html
2. https://www.tutorialspoint.com/power_electronics/power_electronics_silicon_controlled_rectifi
er.htm
3. httphttps://circuitglobe.com/schottky-diode -as-an-amplifier.htmls://www.electronics-build-
electronic-cir

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING
COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna
University) L 41
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS

ECE I / II
Course Name with Code : 19GES11 - ELECTRONIC DEVICES
Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Light Dependent Resistor (LDR),

(LDR) Unijunction Transistor (UJT)
Introduction: Light Dependent
ependent Resistor also known as photo resistor (or) photo conductive cell (or)
photocell is the two terminal semiconductor device. It is a light controlled variable rresistor in which the
resistance of thee photo resistor decreases with incident light intensity. Unijunction
junction transistor commonly
known as UJT iss the three terminal semiconductor device with single junction which is extensively
used in an electronic switching operation.
operation.UJT has no ability to amplify and hence it is not used as an
amplifier.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Transistor operation
 Photo resistance
 Photo conduction

Light Dependent Resistor:

Construction:

Structure of LDR Symbol Circuit Diagram

 LDR consist of thin layer of semiconductor material which is made of either Cadmium
sulphide(CdS), Cadmium selenide(CdSe) (or) Lead sulphide(PbS).

 The coating of this material is made over top of the surface.

 It is placed over the ceramic substance. Two metal electrodes are taken out which is connected
to positive and negative terminal of the battery.
OPERATION

When the light is allowed to pass through the glass window over the LDR. It exhibit photo
conductivity.
(i) When no light falls on the cell, the Resistance of the device is very high. Hence the current
(I) is very low.
(ii) When light falls on the cell, the Resistance of the device will decrease. Hence the current I
increase with Respect to the light intensity.
(iii) Therefore the value of the current will be controlled by light.
CHARACTERISTICS

Resistivity Vs illumination Spectral Response

The resistivity of the device decreases with increases with illumination. For the illumination of
10000 lux, the resistivity will be around zero

The spectral response of the LDR shows that the responsivity of the Cds is superior for short
wavelength and Cdse shows superior result for longer wavelength.

APPLICATIONS
LDR is used as:
(i) Photo switch and Photo electric control element.
(ii) Industrial control and counting system.
(iii) An autoflash in camera.
(iv) Street light triggering circuit.
Unijunction Transistor (UJT):

Construction:-
UJT Basic structure Symbol
B2
B2 Base 2

E
P
Emitter N

B1

B1 Base 1
  Emitter is connected to the heavily doped P type material. Base B1 and B2 is connected
to both end of the n type substrate.

Equivalent Circuit

 The equivalent circuit of the UJT consists of PN junction diode which is connected to the inter
base resistance (or) internal bulk resistance between terminal B1 and B2.
 Hence the total resistance between the base terminal RBB=RB1 + RB2.

RB1 and RB2- Internalbase resistance across Base 1 and Base 2

RBB = Interbase Resistance
VRB1 is the voltage drop across RB1, when VBB is applied
R B1
 Hence,VRB1 (voltage drop across RB1) = VBB 
R B1  R B2
R B1
(or) VBB 
R BB
R B1
 In the above equation VBB  , which is the ratio of the internal Base Resistance
R BB
across Base 1 (RB1) to the interbase across B1.
 Resistance is known as Intrinsic standoff Ratio (ɳ). Its value ranges from 0.5 to 0.8

Operation

 When VEE is applied, the emitter current will be cutoff due to the voltage drop across the
Internal Base Resistance RB1 and diode potential barrier.

 This is known as Reverse bias voltage which is given by VR = VBB + VD. When the value of
VEE is greater than VR, the diode is forward bias and will start to conduct.

 This value of emitter voltage which makes the diode to conduct is known as peak point
voltage(VP) which is given by VP = VBB + VD.

 The emitter current starts to flow after the peak point voltage.
Characteristics

VI characteristics of UJT

Cutoff Negative Saturation

region resistance region region

Peak
point
14
VP
V1

V B1
V B2
=2
Point B 10

0V
V B1
8

V B2
=1
6 Valley

VB

5V 10V
point

1
VB
V

2
V

=
B1

VEB1(sal) 4 B2
=
5V
VV
2 IB2 = 0
Point A

mA
0 1 2 3 4 5
IEO
IP IV
IE
It is shown from the characteristics curve that the UJT functions in three Regions.

Cutoff Region:-

Till point A, the device is in cutoff where the diode will be in reverse bias. Hence the emitter
current is almost zero.

Negative Resistance Region:-

 In this region the UJT is said to be fired (or) turned on at peak point (P), where the peak point
Voltage is greater that VBB + VD.
 In this region, the holes are injected into the N region and which is swept by the base electric
field. This makes the resistance RB1 to reduce thereby the value of VBB is reduced.
 This phenomenon is known as Conductivity Modulation.
 When more holes are injected into n region, it further reduces VBB. As a result, the emitter
current increases but VE decreases.
 This is known as Negative resistance characteristics. This phenomenon makes the UJT to
operate as an oscillator.

Saturation Region:-
 The Region of curve beyond the valley point is the saturation region. In this region UJT is in
ON position.
 The device will behave as a PN junction diode. VE increases gradually with increases in IE.

Applications:
(i) The Negative resistance characteristics make the device to function as Relaxation
oscillator, non sinusoidal oscillator and sawtooth generator.
(ii) It is used as a switching circuit.

(iii) It functions as a triggering device for Thyristor based devices.

(iv) It is also used in the timing circuit.
Video Content / Details of website for further learning (if any):

1. https://www.kitronik.co.uk/blog/how-an-ldr-light-dependent-resistor-works/
2. https://www.electronics-notes.com/articles/electronic_components/resistors/light-dependent-
resistor-ldr.php
3. https://www.electroschematics.com/ldr-light-dependent-resistor-photoresistor/
4. http://www.circuitstoday.com/ujt-uni-junction-transistors

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu
L 42
LECTURE HANDOUTS

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Photoemissivity and Photoconductivity

Photocond
Introduction:

Photoconductivity is an optical and electrical phenomenon in which a material becomes more

electrically conductive due to the absorption of electromagnetic radiation such as visible light,
ultraviolet light, infrared light, or gamma radiation.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Photon
 Light energy
 Electromagnetic
lectromagnetic radiation
Photoemissivity and Photoconductivity

 The
he increase in the electrical conductivity of certain materials when they are exposed to light of
sufficient energy.
 Photoconductivity serves as a tool to understand the internal processes in these materials, and it
is also widely used to detect the presence of light and measure its intensity in light
light-sensitive
devices.Certain crystalline semiconductors
semiconductors, such as silicon, germanium,, lead sulfide, and
cadmium sulfide, and the related semimetal selenium,, are strongly photoconductive. Normally,
semiconductors are relatively poor electrical conductors because they have only a small number
of electrons that are free to move under a voltage.
 Most of the electrons are bound to their atomic lattice in the set of energy states called
the valence band. But if external ene
energy
rgy is provided, some electrons are raised to the conduction
band, where they can move and carry current.
 Photoconductivity ensues when the material is bombarded with photons of sufficient energy to
raise electrons across the band gap,
gap, a forbidden region between the valence and conduction
bands.
 In cadmium sulfide this energy is 2.42 electron volts (eV), corresponding to a photon of
wavelength 512 nanometres (1 nm = 10−9 metre), which is visible green light. In lead sulfide the gap
energy is 0.41 eV, making this material sensitive to infrared light.

Video Content / Details of website for further learning (if any):

1. https://whatis.techtarget.com/definition/photoconductivity
2. https://en.wikipedia.org/wiki/Photoconductivity
3. http://bgsptech.ac.in/ecedept%5C2-sem%5CSemiconductor%20Devices.pdf
4.
Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS
L 43

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Photoconductive cells

cells, Photo voltaic cells
Introduction: The photoconductive cell is a two terminal semiconductor device whose
terminal resistance will vary (linearly) with the intensity of the inci
incident light. Both materials respond
rather slowly to changes in light intensity. The solar cell is the device that converts the light energy into
electrical energy when the light (sunlight) is passed into it. Itt is also known as solar battery (or)
photovoltaic cell.

Prerequisite knowledge for Complete understanding and learning of Topic:

 Photo resistance
 Photoconduction
 Photoemission
Photoconductive cells:

Photo-conductive-cell-circuit
circuit-symbol photo-conductive-cell
cell-construction

 Light sensitive material is arranged in the form of a long strip, zigzagged across a disc shaped
base with protective sides.
 For added protection, a glass or plastic cover may be included. The two ends of the strip are
brought out to connecting pins below the base.

Photoconductive cell circuit: Characteristics of a Photoconductive cell:

Characteristics of a Photoconductive cell:

 The illumination characteristics of a typical photoconductive cell are shown from which it is
obvious that when the cell is not illuminated its resistance may be more than 1 00 kilo ohms.
 This resistance is called the dark resistance. When the cell is illuminated, the resistance may
fall to a few hundred ohms.
 Note that the scales on the illumination characteristic are logarithmic to cover a wide ranges of
resistance and illumination that are possible.
 Cell sensitivity may be expressed in terms of the cell current for a given voltage and given level
of illumination.

Photo voltaic cells:

Construction Cell basic Structure

Glass
plate
Front
contact +
P type

N type V

Rear
_
contact

 The basic structure of the solar cell consist of P type silicon material doped with P type
impurity and also N type silicon material doped with N type impurity.
 Hence PN junction is formed between the P and N type material. The sunlight is allowed to
falls on the junction through the glass plate.

OPERATION

 When the incident photon in the form of light falls on the junction.
 The valence electron will gain enough energy from the incident photons and move toward the
conduction band, which in turn will creates electron hole pairs.
 The flow of electrons and holes across the junction will leads to the accumulation of carriersin
the junction.
 Hence this phenomenon gives rise to photovoltaic voltage across the junction.

The increase in the photovoltaic voltage depends upon the intensity of the light falls on the
device.

CHARACTERISTICS

 The spectral Response of the various semiconductor materials (Selenium, silicon and
Germanium) is given in the figure below.

 The silicon and Germanium shows an efficient Response in the infrared region.

 The selenium provides superior advantage than silicon by its spectral response and
environmental radiation tolerance (1000 times than silicon).
 Spectral Response of Semiconductor material
100

Relative
impedance Se
Ge
Si

Wavelength (m)
0 1 2
Output voltage versus high intensity
Output
voltage
(V)
Voltage at no load

Voltage when load

is connected
Light
intensity
 The output voltage increases with increases in the light intensity falls on the cell. The single
solar cell can produce 0.6v for the incident sunlight. The average cell will produce about 30
mw per square inch of cell. The efficiency of the solar cell can be obtained upto 40%.

APPLICATION
They are used in:
(i) Satellite to provide required power.
(ii) Power plants, as renewable energy source.
(iii) Home to provide required power.
(iv) Various commercial applications such as solar cars, Remote applications, etc.

Video Content / Details of website for further learning (if any):

1. http://www.ladyada.net/media/sensors/APP_PhotocellIntroduction.pdf
2. https://www.electronicdesign.com/markets/lighting/article/21769406/photoconductive-cells-
for-industrial-use
3. https://electronicslesson.com/transducer/photoconductive-cell/
Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L 44

ECE I / II
Course Name with Code : 19GES11 - ELECTRONIC DEVICES
Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Photodiode,, Phototransistors, LCD and LED

Introduction: Thehe function of the photodiode is to convert light signal into electrical signal hence it is
known as Light sensitive device. Phototransistor is the light sensitive semiconductor device which is
not only used to convert electrical
trical en
energy from light energy but also used to amplify
amplify. LCD uses a liquid
crystal to produce a visible image. A light-emitting diode (LED) is a semiconductor light source that
emits light when current flows through it.
Prerequisite knowledge for Complete understanding and learning of Topic:
 Photoconduction,
 PN junction
 Diode and Transistor operation
Photodiode, Phototransistors, LCD and LED

Photodiode
Construction

Structure of photodiode Symbol

Light
Lens
A K
P N (Anode) (Cathode

R
 +
Photodiode consist of P and N region which is kept inside a glass casing. The arrangement is
made in such a way that the light ray is accumulate and passed into the junction of the PN diode. The
sides of the casing are painted
ainted to prevent the scattering of light.

Operation:-

When the light ray is passed into the junction of the Reverse biased PN – photo diode. The
electron hole pairs are created in the depletion rregion
egion result in the generation of charge carrier which
depends upon the intensity off light falling on the depletio
depletion
n region. The magnitude of current produced
is I = IS + Io (1-e-v/ɳvT).

Where IS = Current proportion to light intensity Diode

V = Voltage
Phototransistors:

Construction

Structure of Phototransistor Symbol

C
Lens

E C B
N P N
B
R
 + E
The Emitter and collector of the phototransistor is connected to the negative and positive
terminal of the voltage. The base terminal left unused. Instead the base is supplied with external
biasing, the light is made to fall on the base collector junction.

Operation

When no light falls on the transistor, the reverse saturation current is generated due to minority
carrier ICO (Reverse Saturation Current).

When the light falls on the junction, electron hole pair created result in the photo carrier result
in the generation of collector current.
The collector current
IC = (1 + β) (ICO + IL)
Β = amplification factor
ICO = Reverse saturation current
IL = current due to Light

Hence the collector current depends upon the applied voltage and intensity of light falling on
the junction.

Characteristics

The characteristic of the photo transistor is the graph drawn between collector current and the
emitter to collector voltage. The value of IC increases when the light intensity increases.

VI characteristics of Phototransistor
IC(mA)

8 200 LUX

SI unit of Illuminance
6 100 LUX
one LUX – Lumen per
square meter)
4 0 LUX

2
VCE(V)
5 10 15 20
Applications

The phototransistor is commonly used in

(i) Light detection circuit.
(ii) Light dependent switches.
(iii) Counting of objects in production unit.
Reading equipments such as taps, sound track etc.,

Light Emitting Diode:

Construction
LED consist of PN junction device in which the basic component is made of Gallium
phosphide (Gap) (or) Gallium arsenide phosphide (GaAsP) instead of silicon (or) Germanium. This is
because Gap (or) GaAsP emits light when Recombination takes place.

Symbol Basic Structure of LED

Light energy
Anode

Hole
P
A K
Anode Cathode Electro
N

Metal contact
Cathode
The two end of the P and N region is connected to positive anode and negative cathode through
which the forward bias voltage is applied. LED emit different colour based on the wavelength.

Gallium Arsenide – Infrared radiation

Gallium phosphide – Red (or) green
Gallium Arsenide phosphide – Red (or) yellow
Operation:-

 The electroluminescence is the basic principle of the LED. When the forward bias is applied to
the two lead, the electrons in the conduction band of N region cross the junction and recombine
with the holes in the valance band of P region.
 The energy emitted during recombination will be in the form of light energy (photon).
 Hence the emitted light depends upon the forward bias and Rate of Recombination.

(i) Surface emitter (burrus (or) Front emitter):-

 Surface emitting LED consists of P and N region of GaAlAS placed one above the another.
 The well is etched through the surface of the deviceinto which the fiber is inserted and the
emitted light due to recombination will be collected by the fiber place on the surface of the
material.
 The double heterojunction layer helps for optical and carrier confinement.
 Surface emitting LED

Applications:-
LED is commonly used in
(i) Display devices such as calculator phones, watches etc
etc.,
(ii) Optical
ptical communication as a source to transmit information in the form of light.
light
(iii) Image sensor circuits
circuits.
(iv) Burglar alarm unit and memory unit (optical).
TYPES OF LCD
There are two types of LCD which is available for Display is
(i) Dynamic Scattering Display
Display.
(ii) Twisted Nematic (or) field effect Display.
(i) Dynamic Scattering Display:-
Construction:-

Without field Display

Dynamic Scattering Disp

Glass

Transparent
electrode
Spacer &
Sealer

Liquid
crystal
The structure of the Dynamic scattering display consist
consists of two glass plate in which the inner
wall is coated with transparent electrode of tinoxide. The two glass plates are separated
separat by 5 to 50μm
thickness of filled Liquid
quid crystal layer. The spacer on both side is used to fill the liquid crystal and
adjust the level.

Working:-
(i) When no electric field is applied, all the molecules in the nematic liquid crystal are
properly aligned and hence they are transparent.
(ii) When the electric field is applied, the molecules will align perpendicular to the field
direction. When the electric field increases, flow becomes turbulent. This causes crest
due to negative charge and trough
tro due to positive charge. The disorder state makes the
With field Dynamic scattering Display
Scattered light

Glass
Electrode
Spacer

Liquid
crystal
Hence the cells appear to be bright due to scattering of light. This phenomenon is known as
Dynamic Scattering.

Advantages of LCD:-
The various advantages of LCD are
(i) It is of Low cost.
(ii) It consumes less voltage and power.
(iii) It produces very bright image.
Disadvantages of LCD:-
The various disadvantages of LCD are
(i) The Life time of LCD is low which is limited to 50,000hours.
(ii) The Space occupied by LCD is large.
(iii) It exhibit slow speed of operation due to high response time.
Applications:-
Some of the applications of LCD are
(i) It is usedfor Numerical display in calculator.
(ii) It is usedin wrist watches, clocks ,etc.
(iii) It is widely usedin the video Display.
(iv) It is used as a monitoring unit for various applications.

Video Content / Details of website for further learning (if any):

1. https://en.wikipedia.org/wiki/Photodiode
2. https://www.elprocus.com/photodiode-working-principle-applications/
3. https://www.electronics-notes.com/articles/electronic_components/transistor/what-is-a-
phototransistor-tutorial.php
Important Books/Journals for further learning including the page nos.:
1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata
McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD
 MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC & Affiliated to Anna University)
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu

LECTURE HANDOUTS L 45

ECE I / II

Course Name with Code : 19GES11 - ELECTRONIC DEVICES

Course Faculty : Dr. J. Rangarajan
Unit :V - Special Diodes and Opto Electronic Devices Date of Lecture:

Topic of Lecture: Laser diode,, Opto Couplers, Fin field-effect Transistor(FINFET)

(FINFET)
Introduction: Laser Diode is the semiconductor device which is used to convert electrical energy into
light signal. It is the acronym for Light amplification for stimulated emission of Radiation.
Radiation Opto-
coupler also known as optical isolator
isolator, photo-coupler
coupler (or) optically coupler Isolator is a electronic
component that is used to transfer electrical signals between two isolated circuits by using light. A fin
field-effect transistor (FinFET) is a multigate device, a MOSFET (metal-oxide-semiconductor
(met semiconductor field
field-
effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel
or wrapped around the channel, forming a double gate structure

Prerequisite knowledge for Complete understanding and learning of Topic:

 LASER
 LED
 Photo diode
 FET
Laser diode:

Construction
Structure of Laser Diode Symbol
Anode (+)
Partially
Reflectiv P reflective
e mirror mirror
Depletion A
Light K
region
emission
N

Cathode (-)
 The Laser consists of PN junction which is formed by the P type gallium
gallium arsenide and N type
gallium arsenide material.
 The depletion region will be formed between the two regions which act as the active region.
The opposite end of the junction consist
consists of the partially and fully reflective mirror.
 The light which is emitted d as photon will be reflected back and forth between these mirror
surfaces.
Operation:-Biasing of LASER diode

 When the PN junction is forward biased, by means of absorption followed by emission or Light
radiation, photons will be emitted. These photons will be reflected back and forth between two
faces of the mirror.
 During this process the emitted photon will in turn produce multiple photons and hence
avalanche effect takes which leads to the release of generated photon of same phase from the
transparent side.
 Hence the emitted Laser light will be of same frequency and phase.

+ P
V
–
N

Types of Laser Diode:-

Commonly two types of Laser Diodes are available

(i) Homojunction Laser:-

Homojunction Laser is the semiconductor Laser formed by Layers of similar semiconductor

material of equal band gap but different doping.

Structure of Homojunction structure

Anode (+)
Polished face

P Glass Active coherent

radiation
N Glass

Cathode (_)
100
m

(ii) Heterojunction Laser:-

 Heterojunction Laser is formed by Layers of dissimilar semiconductor material of different

Bandgap.

 The commonly used Heterojunction Laser will be double heterojunction structure formed by
sandwiching GaAs between GaAlAs.
  Optical confinement is better in this Laser compared to homojunction Laser and it is preferred
for continuous operation.

Structure of Double Heterojunction structure

Anode (+)

P GaAs (contacting layer)

P-AlxGa1-xAs (Confinement
layer) Coherent
Optical radiation
confinemen P-GaAs (Active layer)
t
N-AlxGa1-xAs (Confinement
layer)

N-GaAs (Contacting layer)

Cathode (_)
4.8.5 Characteristics:-
Characteristics of Laser Diode
Light output

Spontaneous
emission Stimulated
emission

Input current
 The graph drawn between Light output and Input current gives the characteristics of the Laser.
 The Laser will produce Low light output with respect to input current till threshold level.
 Once the threshold level is reached, the light output increases for small increases in current.

Opto Couplers

Construction:-

Structure of Optocoupler

Light Photo
source detector Output
Input signal
signal

 The structure of the optocoupler consists of light source (LED) and the photo detector with the
transparent isolation cap between them to allow the light transfer.
  The LED made of GaAs material is used to provide proper matching with the output circuit.
The photo detector may be photodiode, phototransistor (or) photo SCR. Commonly photo diode
is preferred for its fast Response.

Operation:-

 When the input signal is applied to the LED, the LED emits light signal in which the intensity
of light emitted depends on the input signal.

 The photo detector provides the output signal based on the intensity of light falling on the
detector. Hence external current is obtained in the output.

Circuit connection of optoisolator

Ri R
o

+
Output
V _ signal

 The basic characteristics of the optocoupler are

(i) The light signal is transmitted with respect to input signal in the range of MHZ.
(ii) The optocoupler provide isolation voltage of 500v to 2500v and isolation resistance of
order 1011Ω.
(iii) The output current will be stable for the temperature variation up to 75˚C.
The switching time of the optoisolator varies based on the input current and the load Resistance in the
range of μs.

Fin Field-Effect transistor (FinFET)

Construction of a bulk silicon-based FinFET

1. Substrate

Basis for a FinFET is a lightly p-doped substrate with a hard mask on top (e.g. silicon nitride) as well
as a patterned resist layer.

2. Fin etch

The fins are formed in a highly anisotropic etch process. Since there is no stop layer on a bulk wafer as
it is in SOI, the etch process has to be time based. In a 22 nm process the width of the fins might be 10
to 15 nm, the height would ideally be twice that or more.
3. Oxide deposition

To isolate the fins from each other a oxide deposition with a high aspect ratio filling behavior is
needed.

4. Planarization

The oxide is planarized by chemical mechanical polishing. The hard mask acts as a stop layer.

5. Recess etch

Another etch process is needed to recess the oxide film to form a lateral isolation of the fins.

6. Gate oxide

On top of the fins the gate oxide is deposited via thermal oxidation to isolate the channel from the gate
elctrode. Since the fins are still connected underneath the oxide, a high-dose angled implant at the base
of the fin creates a dopant junction and completes the isolation (not illstrated).

7. Deposition of the gate

Finally a highly n+-doped poly silicon layer is deposited on top of the fins, thus up to three gates are
wrapped around the channel: one on each side of the fin, and - depending on the thickness of the gate
oxide on top - a third gate above.
 The influence of the top gate can also be inhibited by the deposition of a nitride layer on top of
the channel.Since there is an oxide layer on an SOI wafer, the channels are isolated from each other
anyway. In addition the etch process of the fins is simplified as the process can be stopped on the oxide
easily.

Video Content / Details of website for further learning (if any):

1. https://www.elprocus.com/laser-diode-construction-working-applications/
2. https://circuitglobe.com/laser-diode.html
3. https://electronicscoach.com/laser-diode.html
4. https://www.electronics-notes.com/articles/electronic_components/transistor/what-is-a-
photocoupler-optocoupler-optoisolator.php
5. https://www.quora.com/What-is-a-FinFET-transistor

Important Books/Journals for further learning including the page nos.:

1. “Electronic Devices and Circuits”, S.Salivahanan, N.Sureshkumar, &A.Vallavaraj Tata

McGraw Hill, Second Edition, 2008. (151-152)
2. “Electronic Devices”, Thomas L.Floyd, Prentice Hall, Ninth Edition,2012. (Unit 4 and Unit 5)

Course Faculty

Verified by HOD