Learn The Architecture - Memory System Resource Partitioning and Monitoring (Mpam) Software Guide 108032 0100 01 en
Learn The Architecture - Memory System Resource Partitioning and Monitoring (Mpam) Software Guide 108032 0100 01 en
Non-Confidential Issue 01
Copyright © 2023 Arm Limited (or its affiliates). 108032_0100_01_en
All rights reserved.
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Release information
Document history
Proprietary Notice
This document is protected by copyright and other related rights and the practice or
implementation of the information contained in this document may be protected by one or more
patents or pending patent applications. No part of this document may be reproduced in any form
by any means without the express prior written permission of Arm. No license, express or implied,
by estoppel or otherwise to any intellectual property rights is granted by this document unless
specifically stated.
Your access to the information in this document is conditional upon your acceptance that you
will not use or permit others to use the information for the purposes of determining whether
implementations infringe any third party patents.
TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT WILL ARM BE LIABLE FOR
ANY DAMAGES, INCLUDING WITHOUT LIMITATION ANY DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES, HOWEVER CAUSED AND
REGARDLESS OF THE THEORY OF LIABILITY, ARISING OUT OF ANY USE OF THIS
DOCUMENT, EVEN IF ARM HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
This document consists solely of commercial items. You shall be responsible for ensuring that
any use, duplication or disclosure of this document complies fully with any relevant export laws
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 2 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
and regulations to assure that this document or any portion thereof is not exported, directly
or indirectly, in violation of such export laws. Use of the word “partner” in reference to Arm’s
customers is not intended to create or refer to any partnership relationship with any other
company. Arm may make changes to this document at any time and without notice.
This document may be translated into other languages for convenience, and you agree that if there
is any conflict between the English version of this document and any translation, the terms of the
English version of the Agreement shall prevail.
The Arm corporate logo and words marked with ® or ™ are registered trademarks or trademarks
of Arm Limited (or its affiliates) in the US and/or elsewhere. All rights reserved. Other brands and
names mentioned in this document may be the trademarks of their respective owners. Please
follow Arm’s trademark usage guidelines at https://www.arm.com/company/policies/trademarks.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
(LES-PRE-20349|version 21.0)
Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be
subject to license restrictions in accordance with the terms of the agreement entered into by Arm
and the party that Arm delivered this document to.
Product Status
Feedback
Arm welcomes feedback on this product and its documentation. To provide feedback on the
product, create a ticket on https://support.developer.arm.com
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 3 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
We believe that this document contains no offensive language. To report offensive language in this
document, email [email protected].
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 4 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Contents
Contents
1. Overview........................................................................................................................................................... 6
1.1 Before you begin............................................................................................................................................ 6
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 5 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Overview
1. Overview
This guide describes the firmware and software that are part of the Memory System Resource
Partitioning and Monitoring (MPAM).
MPAM is described in the Memory System Resource Partitioning and Monitoring (MPAM), for A-
profile architecture Arm Architecture Reference Manual Supplement.
• AArch64 exception model: Introduces the exception and privilege model in AArch64.
• AArch64 memory management: Introduces the Memory Management Unit (MMU), which
controls virtual to physical address translation.
• Memory System Resource Partitioning and Monitoring (MPAM), for A-profile architecture: Arm
Architecture Reference Manual Supplement
• Memory System Resource Partitioning and Monitoring Overview: Introduces the MPAM
architecture.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 6 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Problems of shared resource contention
In current new processors the number of cores is continuously increasing, especially in large-scale
usage models like webservers and datacenters. Increasing cores increases the number of threads or
workloads that can be run simultaneously. One of the main economic reasons to run applications
in a cloud environment is the ability to distribute the cost of shared resources among multiple
customers. Unfortunately, when multi-threaded applications, VMs, or workloads run concurrently
they compete for shared resources including Last Level Cache(LLC) or memory bandwidth. Running
mixed workloads can pose resource challenges on busy systems.
Physical isolation at the server level is still the way to ensure enough resources for critical
workloads today. However this leads to under-utilization of system resource. MPAM enables
software to better manage this utilization.
A neighbor task can affect another task’s cache performance by using more of the cache than
it needs. This cache contention reduces the performance or responsiveness of more important
applications. If a task consumes more cache than is best for the system-level goals, it can even
affect the overall performance of the entire system. This is referred to as a “noisy neighbor”
problem.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 7 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Problems of shared resource contention
For example, in the figure above, processor cores can run many applications in parallel. As a result,
the contents of the shared LLC can quickly become overwritten with new data as it is requested
from memory by other cores. Also, high-priority applications need to be able to use the shared LLC
but they might be blocked by the lower priority applications with high LLC usage.
The noisy neighbor, green in the figure consumes excessive LLC. This is usually allocated on an
LRU, fair share, or more smart re-reference prediction cache replacement algorithms. Generally, an
application that makes many accesses to memory in a complex pattern with frequent reuse of the
cache lines allocates a lot of cache. In this case, the higher-priority application, orange in the figure,
might not get optimal cache occupancy so degrading the performance.
The shared LLC has been a performance bottleneck in multi-core systems for a long time.
Although system administrators can control over CPU time, system memory, network bandwidth,
or combinations of these resources on modern Operating System or Hypervisor. However
existing mechanisms are too coarse. System performance would benefit from additional control
mechanisms at different levels of the memory hierarchy such as:
• Shared cache partitioning
• Bandwidth control
• Resource utilization profiling, applications memory resource monitoring
We need more fine-grained control over previously uncontrolled shared memory-system resources
to improve system stability, performance, and resource utilization.
2.3 MPAM
The features of MPAM Extensions for A-profile address the challenge of using shared system
resources including CPU caches, Last Level Cache, System Level Cache, memory bandwidth and
IOMMU resources.
The functionality of MPAM includes both system resource partitioning and system resource usage
monitoring. These technologies enable tracking and controlling shared resources such as LLC
and main memory (DRAM) bandwidth, used by multiple applications, containers, or VMs running
concurrently on the platform. MPAM can help detect noisy neighbors and reduce performance
interference. MPAM can also enable system administrators to improve resource efficiency to
maintain the performance of critical workloads in complex environments.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 9 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Problems of shared resource contention
The following figure shows MPAM main bandwidth partitioning control functionalities.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 10 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Enable MPAM in firmware and software stack
3.2 SCP-firmware
System Control Processor (SCP)is a dedicated processor that is used to abstract power and system
management tasks away from application processors. SCP-firmware initializes the system and
provides runtime services.
For example, Arm CoreLink CMN-700 Coherent Mesh Network MPAM support need to be
enabled in CMN-700 initialization in SCP-firmware. SCP-firmware enables MPAM Cache Portion
Partitioning (CPOR) and Cache Capacity Partitioning (CCAP) for SLCs in CMN-700 por_hnf_{cfg_ctl,
aux_ctl} registers.
3.3 UEFI/edk2
UEFI/edk2 firmware provides MPAM firmware data by ACPI table.
3.4 U-boot
U-boot provides MPAM firmware data by device tree.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 11 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Enable MPAM in firmware and software stack
MSCs topology is passed to Linux kernel by firmware data such as Device Tree or ACPI interface.
MPAM controls and parameters of MSCs are discoverable in memory-mapped ID registers.
Linux MPAM driver will decide the width of memory system partitioning and monitoring values
communicated through the system according to the needs of the system.
The following figure shows an example system with MPAM support implemented in the form of
MSCs distributed across various system memory components.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 12 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Enable MPAM in firmware and software stack
The following figure shows an example of the MPAM device tree firmware data interface.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 13 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Enable MPAM in firmware and software stack
The device tree describes the memory system topology and properties of MSCs in the system.
There are 2 DSU clusters, each with 4 CPUs in the system. Each MSC node is embedded in the
DSU L3 cache node.
MPAM Device Tree support is still an experimental implementation. The Device Tree
Binding will evolve as the spec changes.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 14 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
A closer look at MPAM software
This enables the MPAM feature page base address to be placed within a single 64KB page.
An MSC’s MPAM feature page is located from information about the device. It is possibly provided
via firmware data such as device tree or ACPI. See Appendix B MSC Firmware Data in Memory
System Resource Partitioning and Monitoring (MPAM), for A-profile architecture: Arm Architecture
Reference Manual Supplement.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 15 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
A closer look at MPAM software
The following figure shows MPAM cache portion bitmap exclusive and shared allocation examples.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 16 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
A closer look at MPAM software
resctrl is a Linux kernel feature by which Arm’s MPAM and Intel’s RDT can be configured and
controlled. resctrl exposes MPAM capabilities and configuration options via a file-system interface.
On the latest kernel source tree, users would find resctrl adapted for X86 RDT. Arm is working
on changing resctrl into a generic resource partitioning interface. For Arm64 architecture, you
can configure MPAM using resctrl. The steps by which MPAM could be configured via resctrl are
described in the subsequent section.
The following figure shows linux kernel resource control framework and MPAM driver overview.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 17 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
A closer look at MPAM software
The MPAM driver is designed so that the default configuration uses a single PARTID, PARTID 0
with the default maximum partition configuration for the MSCs. This is done in the early stages of
Linux kernel boot up.
CPUs can generate traffic with a range of PARTID and PMG values. However each
MSC can have its own maximum size for these fields. Before MPAM can be used,
the driver needs to probe each MSC, to find the system-wide smallest value that
can be used.
When the resctrl file-system has been mounted, change directory to /sys/fs/resctrl and list the
files.
# cd /sys/fs/resctrl
/sys/fs/resctrl# ls
The administrator can create a resource allocation schema for a group of tasks or CPUs. The
administrator can modify schemas at runtime, and assign tasks/CPUs to use the schemas.
cd /sys/fs/resctrl
mkdir low_priority
echo "L3:0=1" > low_priority/schemata
echo "e" > low_priority/cpus
echo <low priority task pids> > low_priority/tasks
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 18 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
A closer look at MPAM software
mkdir high_priority
echo "L3:0=fffe" > low_priority/schemata
echo ”1" > high_priority/cpus
echo <high priority task pids> > high_priority/tasks
The following example shows how to create 2 resource groups, a high-priority group and low-
priority group. The kernel resource control framework internally allocates 2 new PARTIDs and
associates them with the 2 new resctrl groups. 15/16 L3 cache portions in cluster0 are assigned
to high-priority resctrl group. We also add dedicated CPU0 in cluster0 to high-priority resctrl
group for running high-priority task. For the low-priority group we assign 1/16 L3 cache portions
in cluster0 exclusively. Update the cache allocation policy by writing the schemata files with
corresponding cache portion bit masks.
The following figure shows a simple example of resolve the noisy neighbor problem in previous
section Noisy neighbor.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 19 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
A closer look at MPAM software
• You can use the Xen command-line parameter dom0_mpam to configure the cache portion bit
mask for Dom0
• There is a set of sub-commands in xen tool to allow users to use MPAM at runtime
See Xen MPAM Overview: In The Arm Neoverse N2 Automotive Reference Stack
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 20 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Overall system-level dynamic resource controller based on MPAM
• Web and Application Tiers: These compute resources are responsible for hosting and serving
web applications, APIs, and other online services. They handle incoming user requests, process
logic, and generate responses.
• Batch Processors: Batch processors are used for executing computationally intensive tasks or
processing large volumes of data in batches. They are commonly employed for data processing,
data transformation, and analytics workloads.
• Scheduled Jobs: Scheduled jobs involve running specific tasks or scripts at predetermined
times or intervals. These jobs automate routine operations, such as data backups, database
maintenance, report generation, and system monitoring.
• Specialized Resources: Cloud providers offer specialized compute resources to address specific
needs. Graphics Processing Units (GPUs) are utilized for parallel processing and accelerating
tasks related to graphics rendering, machine learning, and scientific simulations.
• High-performance compute instances offer increased processing power, memory, and
networking capabilities for demanding workloads.
Workloads running in cloud data centers exhibit varied behaviors in processing user requests and
the resulting CPU utilizations. Latency Critical (LC) workloads, for example, e-commerce and online
search, are highly sensitive to fulfilling query latency requirements. Best Effort (BE) workloads,
such as big data analytics, occupy hardware resources in their best efforts to improve system
throughput. Current cloud data centers usually co-locate LC and BE workloads in the same server.
This improves server CPU utilization and also reduce machine costs.
However, co-locate can lead to resource contention between tasks of different priorities. Without
isolation controls, tasks of different priorities might compete for resources such as LLC and memory
bandwidth. This might hinder the allocation of sufficient resources to LC tasks and affect the
service quality of LC applications.
MPAM provides resource partitioning control capabilities for applications of different priorities.
By limiting the usage of LLC and memory bandwidth resources by BE-type applications, we can
improve total throughput in mixed deployment scenarios without violating service quality of LC
applications.
With an MPAM-enabled system, a system administrator or orchestrator can monitor and allocate
memory bandwidth or cache partition, per application, container, Virtual Machine (VM), or even
per-thread if necessary.
For an example of this approach, see Heracles: Improving Resource Efficiency at Scale.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 21 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Overall system-level dynamic resource controller based on MPAM
The number of entities being monitored is limited by the PARTID+PMG range of the
platform.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 22 of 23
Learn the architecture - Memory System Resource Document ID: 108032_0100_01_en
Partitioning and Monitoring (MPAM) Software Guide Version 1.0
Overall system-level dynamic resource controller based on MPAM
System-level resource controller can achieve high utilization and energy efficiency by:
• Combining MPAM control over cache and memory bandwidth
• Efficient task-packing and CPU capacity/energy aware scheduling and CPU power allocation
• Cgroup control over CPU set
• Block IO
• Network bandwidth isolation
Some of the largest cloud providers collectively might have more than 2 million servers worldwide.
With such large numbers, even small improvements have a large impact. With high-quality MPAM
based solution it can achieve significant improvements on average CPU utilization and translates to
an energy efficiency gain.
Copyright © 2023 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 23 of 23