0% found this document useful (0 votes)
19 views22 pages

Design and Implementation of A Microcontroller Based DC/AC Inverter

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
19 views22 pages

Design and Implementation of A Microcontroller Based DC/AC Inverter

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 22

Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

Design and Implementation of a Microcontroller Based


DC/AC Inverter

* *
Firas Mohammed Ali Al-Raie Hawraa Qasim Hameed

Abstract
In this paper, a method is proposed to improve the frequency stability and
accuracy of the generated wave in DC/AC square wave inverters using a
microcontroller-based stabilized oscillator circuit.
The proposed technique relies on using the 8051 microcontroller as a
stable oscillator to generate two anti-phase 50 Hz square waves for the
driving power stage of the inverter based on a program stored in its
internal ROM. These signals are then boosted to increase their voltage
and current levels using BJT switching mode power transistors operating
in the push/pull mode. The resulting signal is then raised into the required
voltage level with the aid of a step-up transformer.
A practical inverter circuit has been designed and constructed to convert
a 12 V battery DC input into 220 V AC output based on the 8051
microcontroller. This circuit consists of an 8051 microcontroller, buffer,
driver power transistor stage, final power transistor stage, and a step-up
transformer. The inverter circuit has been simulated, implemented, and
tested practically. The test measurements have indicated that the circuit
gives a full load power of 10 W with full-load voltage regulation of 8%, and
a maximum conversion efficiency of 70%.

Keywords: DC/AC Inverter, Power Electronics, 8051 Microcontroller,


Square Wave Inverter.

*
Department of Electrical Engineering, University of Technology

- 19 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

1. Introduction
An inverter is an electronic circuit that converts direct current (DC) to
alternating current (AC) as shown in Figure 1.

Figure 1: Block Diagram of an Inverter.

Inverters are used in a wide range of applications, from small switching


power supplies in computers, to large electric utility applications that
transport power, especially in renewable energy systems like solar
systems, wind power systems, …etc [1]. The inverter is so named
because it performs the opposite function of a rectifier. Most inverters do
their job by performing two main functions: first they convert the incoming
DC into AC, and then they step up the resulting AC to the required voltage
level using a transformer. The most important parameters of the inverter
circuit are its conversion power efficiency, frequency stability, output
voltage regulation, and output waveform distortion [2].
Inverters can be classified into three types according to the shape of the
generated waveform as depicted in Figure 2. These are the square wave
inverters, modified sine wave inverters, and pure sine wave inverters.
Square wave inverters are simple in design and implementation. The
output voltage alternates between positive and negative values. The
output waveform, however, has a lot of amount of total harmonic distortion
(THD) which results in a considerable power dissipation due to these
harmonics. On the other hand, the square wave inverter cannot regulate
its AC output voltage when the battery voltage changes significantly. This
can cause some types of AC loads to fail suddenly [2].

- 20 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

Figure 2: Types of the Generated Inverter Waveforms.

In the modified sine wave inverters, the output signal is similar to a


square wave except that it goes to zero for some delay time before
switching positively or negatively. This may reduce the THD, and gives
better load compatibility. The shape of the waveform can also be
controlled to allow regulation of the AC output voltage level as the
battery’s voltage changes. The pulses of the square wave can be made
tall and narrow when the battery voltage is high, and can be made short
and wide when the battery voltage is low. This results in a consistent
average voltage for supplying the AC loads, and improves load
compatibility and performance [3].
Pure sine wave inverters produce a waveform that closely matches the
signal of the main power grid system. The generated waveform has very
low THD and thus these inverters can run more sensitive AC loads. The
design technique of pure sine inverters is complex and usually involves
the use of PWM to produce hundreds of positive and negative pulses
during each AC cycle. These pulses are then filtered into a smooth sine
wave shape. Most true sine wave inverters are able to adjust the duration
and timing of each pulse by using a microcontroller or microprocessor
control. This allows the voltage and frequency to be controlled to give
better load compatibility and performance quality [4, 5].

- 21 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

2. Square Wave DC/AC Inverters


Simple types of square wave inverters consist of a square wave oscillator,
driver, power transistor switching circuit, and a transformer as shown in
the block diagram of Figure 3.

Figure 3: The Main Stages of a Simple Square-Wave DC / AC Inverter.

In this type of DC/AC inverters, the output waveform is not a pure


sinusoidal wave but a square alternating wave. This means that the output
signal contains a significant amount of harmonics accompanying the
fundamental component. The square wave oscillator is a multivibrator
circuit providing a square wave with a low frequency of 50 Hz. This circuit
can use the NE555 or a similar timer to produce the required signal. The
generated signal is then applied to a power transistor driving circuit in
order to increase its current level. This stage is an intermediate one that
drives another higher power stage. The transistors at the final power stage
operate in a switching mode with a high current rating for high efficiency.
The signal is then converted to 220 V level by means of a step-up
transformer.

3. The Proposed Inverter Circuit


Figure 4 presents a generalized diagram for the proposed inverter. To
simplify the analysis of the circuit, one can divide it into several stages and
deal with each stage independently.
This circuit uses BJT transistors as switching devices and a center-tap
step-up transformer to convert a 12 V DC input into a 220 V AC output.
The output waveform of this circuit is a square wave, and the power output
depends on the transformer power rating, in addition to the current rating
of the power transistors.

- 22 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

The 8051 microcontroller is used as a stabilized oscillator to generate a


low frequency square wave that can be applied to the driving stage power
transistors via a tri-state buffer. This buffer is used to isolate the
microcontroller port from the power stage, as well as to provide the driving
power stage with adequate base currents to switch-on the transistors. The
microcontroller is used to increase the frequency stability of the generated
waveform, and to get butter accuracy of the generated frequency. This can
be accomplished using the program stored in the on-chip ROM of the
microcontroller. Both of the microcontroller and buffer chips need a
regulated 5 V voltage which can be obtained from an IC voltage regulator.
The current level of the generated square wave is increased by the
driving power transistors, and the final power stage. The step-up
transformer can thereafter raise the amplitude of the generated waveform
into the required voltage level.

Figure 4: Overall Block Diagram of the Proposed DC/AC Inverter.

4. Inverter Design
In this section, the design approach of the practical inverter circuit will be
clarified and illustrated. The design process involves designing the
microcontroller circuit to operate as a 50 Hz square wave oscillator,
designing the driver and power stage, selecting the step-up transformer,
and finally assembling the overall circuit.

- 23 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

4.1 Designing the 8051 Microcontroller-Based Oscillator Circuit


The purpose of the oscillator circuit is to provide a clean square wave with
an ideal frequency of 50 Hz, which is the frequency of the required AC
voltage.
In order to generate a stabilized low frequency signal, it is preferred to
produce first a high frequency signal from a crystal oscillator, and then use
frequency dividers to obtain the required low frequency. This technique
can be realized in software by programming a microcontroller to generate
the required square waves with a pre-determined time delays.
The Atmel 89C51 microcontroller chip has been selected for this design.
This is a special IC of the 8051 family. It is a low cost 8-bit microcontroller
with an internal Flash ROM code memory of 4 KB, and an internal RAM of
128 B. It possesses 4 I/O ports, each containing 8 lines and has also two
16-bit internal timers and one serial port.
The timers of the 8051 microcontroller are referred as Timer 0 and Timer
1. They can be used as either timers or counters. Each 16-bit timer is
implemented by two 8-bit registers as low byte and high byte. For timer 0,
the low byte is referred as TL0, while the high byte is referred as TH0. For
Timer 1, the equivalent registers are TL1 and TH1 respectively. Each timer
can operate in four different modes depending on the codeword saved in a
specialized register called TMOD. In mode 1, the operation is 16-bit
timer/counter with the TH and TL registers are cascaded. Each timer
needs a clock pulse to start. The clock frequency for the timers of the 8051
equals the crystal frequency divided by 12 [6]. For example, if the crystal
frequency is 10 MHz, then the clock frequency will be 833.333 kHz, and
the clock interval will thus equal to 1.2 µs.
The starting and stopping process of the timers can be controlled via
software by setting and clearing a special flag bit, called TR (timer start),
respectively. Before starting the timer, registers TL and TH should be
loaded with certain initial values. The 16-bit timer can be loaded with
values ranging from 0000H up to FFFFH. After loading the timer, it starts
to count up starting from the initial preset value. When the timer reaches
its maximum allowable value (FFFFH), it overflows and resets to 0. This
condition can be monitored through a special flag bit, called TF (timer
flag). When the timer overflows, TF becomes 1. When the timer flag is
raised, the timer can be stopped by clearing the TR bit. In order to repeat
the counting process, the registers TH and TL must be reloaded with the
original value, and the TF flag must be reset to 0.
- 24 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

To use the 8051 microcontroller as a square wave generator, the time


delays of the HIGH and LOW intervals for the square wave should be
determined exactly to find the number of required counts of the timer. The
decimal value that should be loaded into the TL and TH registers for a
specified delay time td can be calculated from [6]:

td
N  ( N max  1)  (1)
Tck

Where Nmax is the full-scale value of the timer which equals to 65535
(FFFFH), and Tck is the clock period and is equal to the reciprocal of the
clock frequency fck.
The value of N can be converted from decimal to hexadecimal before
loading it into the timer registers. Thus, to generate a square wave of 50
Hz, a time delay of 10 ms should be produced for each of the HIGH and
LOW portions of the signal. A 10 MHz crystal is used for the AT89C51
microcontroller, which ensures an internal clock frequency of 833.333 kHz,
and a clock interval Tck of 1.2 µs. Substituting both td = 10 ms, and Tck =
1.2 µs in equation (1) yields N = 57203. This value is equivalent to DF73H.
Figure 5 presents the 8051 assembly code for generating two out-of-
phase 50 Hz square-wave signals at pins P1.0 and P1.1 of the AT89C51
microcontroller.
The program resides in the microcontroller’s on-chip memory at a starting
address of 00H. Initially, pin P1.0 of Port 1 is cleared, and pin P1.1 is set
to 1 to generate 180o out of phase signals. Timer 0 of the 8051 chip is
selected by properly defining the codeword in the TMOD control register
(in this case codeword = 01H). The calculated hexadecimal value (DF73H)
is loaded into the TL0 and TH0 registers of timer 0. Afterwards, the timer is
started counting by activating the TR0 flag bit through the SETB
instruction. The state of the TF bit (timer flag) is monitored using the JNB
instruction. Actually, the timer will count a total number of clock signals
equal to 208DH (FFFFH-DF73H+1) before reaching the overflow state.
When the timer reaches its maximum limit, the TF bit will go HIGH and the
counting process is stopped by resetting the flag bit TR0 to 0. Before
repeating the counting cycle, both signals at pin P1.0 and P1.1 should be
complemented using the CPL instruction and timer flag TF should be

- 25 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

cleared. This process is repeated continuously to obtain two anti-phase


50% duty cycle pulse signals.
The assembly program has been converted to hex file using the MIDE-51
assembler, and then burned into the flash memory of the microcontroller
using a commercial universal programmer.
Figure 6 shows the schematic diagram of the AT89C51 microcontroller to
generate the 50 Hz square wave signals. The 74LS244 tri-state buffer is
connected to Port 1 of the microcontroller in order to isolate it from the
power stage, and to provide the power transistors with the necessary
current for driving them.

Figure 5: The Assembly Program Used to Generate the 50 Hz Signals.

4.2 Designing the Power Stage


The second stage in the inverter design is to synthesize the transistor
power circuit in order to increase the current and voltage levels of the
generated square waves. This circuit consists of two pairs of transistors
connected in Darlington configuration in order to increase the current gain
[7]. This circuit actually operates in the push/pull mode. Figure 7 shows a
schematic diagram of the circuit.

- 26 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

Figure 6: Schematic Diagram of the Microcontroller-Based Oscillator.

Figure 7: Schematic Diagram of the Power Stage.

- 27 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

Resistors R1 and R2 are used to control the input base currents of Q 1 and
Q3. They can be chosen to place the transistors in saturation when
conducting. This will minimize the losses due to transistors’ power
dissipation. For a specified collector current in Q 2 or Q4, resistor R1 should
be chosen such that [7]:

V IN 1  V BE1( sat )  V BE 2 ( sat )


R1  (2)
I C 2 /( hFE1 .hFE 2 )

Where VIN1 is the peak input voltage at the base of Q 1 when conducting
and is equal to 5 V, IC2 is the collector current of Q2, while hFE1 and hFE2
are the minimum values of the DC current gain for Q 1 and Q2 respectively.
For a collector current passing in Q2 of 1A, hFE1 = 40, hFE2 = 20, and
VBE1(sat) = VBE2(sat) = 0.75V, then R1 should be less than 2.8 kΩ. A value of 1
kΩ was selected to place the transistors deeply in saturation. The value of
resistor R2 is calculated in a similar manner as Q3 and Q4 are identical with
Q1 and Q2 respectively.
Q1 is working as a driver transistor for Q2, and Q3 is the driving stage of
Q4. Without these driving transistors, the input signals would not drive Q 2
and Q4. Q1 and Q3 are medium power transistors, while Q2 and Q4 are
high power transistors. The power transistor BD137 has been chosen to
implement Q1 and Q3. This is a medium power transistor with maximum
current rating of 1.5 A. On the other hand, the well–known power transistor
2N3055 has been selected to implement Q2 and Q4. This transistor can
pass a maximum collector current of 15 A.
During the first half interval of the square wave (ON period), both Q 1 and
Q2 will conduct (becoming ON), while Q3 and Q4 will be OFF. On the other
hand, during the second half of the interval of the square wave, both Q 3
and Q4 will be ON while Q1 and Q2 will be OFF. So, the current will reverse
its direction through the primary winding of the transformer during each
half cycle, thereby producing an AC alternating signal. The signal
amplitude will then be stepped up to 220 V at the secondary winding.
Actually, a center–tap step-up transformer (12 V to 220 V) with a
maximum current rating of 1 A at the low voltage side has been used in
this design.
The power stage of the inverter circuit has been simulated using a
powerful circuit simulator (ADS of Agilent Technologies) to scope the
voltage waveforms at the base and collector of the power transistors as
- 28 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

well as the output voltage and load current. Other popular circuit
simulators, such as PSpice, can also be used for such a purpose [8]. The
input driving signals of the circuit are provided from two out-of-phase pulse
generators with a frequency of 50 Hz and amplitude of 5 V. The simulation
has been carried out for a load power of 10 W.
Figure 8 shows the base voltages of Q1 and Q3. The amplitude of the
base voltage of Q1 reaches approximately 1.4 V which equals
approximately VBE1(sat) plus VBE2(sat). The spikes appearing in the
transitions of the signals are due to the emitter-base junction capacitance.
These spikes can be eliminated practically using freewheeling diodes. It is
clear that these waveforms are out of phase to prevent Q 1 and Q3 from
conduction at the same time, which is necessary for the push-pull
operation.

2.0 2.0

1.5 1.5

1.0 1.0
Vb3, V
Vb1, V

0.5 0.5

0.0 0.0

-0.5 -0.5
0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100

time, msec time, msec

Figure 8: Simulated Base voltages of Q1 and Q3.

In Figure 9 the collector to emitter voltage of Q2 is presented. As shown


from this plot, the collector signal of Q2 swings between VCE(sat) and 2Vdc –
VCE(sat), where Vdc is the inverter input DC voltage. The saturation voltages
of Q2 and Q4 are relatively high and increase with collector current. The
voltage at each half of the primary winding of the center-tapped
transformer is found from:
v pr (t )  Vdc  vCE (t ) (3)
The primary voltage vpr is sketched in Figure 10, with a positive peak value
of Vdc –VCE(sat) and a negative peak value of –Vdc+VCE(sat).

- 29 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

25

20

15
VC E2, V

10

0
0 10 20 30 40 50 60 70 80 90 100

time, msec

Figure 9: Simulated Collector-to-Emitter Voltage of Q2.

15

10

5
Vpr1, V

-5

-10

-15
0 10 20 30 40 50 60 70 80 90 100

time, msec

Figure 10: Simulated Waveform at the Primary Winding of the


Transformer.

The output signal of the inverter is sketched in Figure 11. For a load of 10
W, the simulated peak value is about 208 V. It is well-known that the r.m.s
value of the voltage equals the peak value for the square wave.

- 30 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

Figure 12 displays the spectrum of the output voltage up to the 10th


harmonic component. As shown from Figure 12, the third harmonic is the
closest component to the fundamental signal. The output signal has no DC
component. Finally, Figure 13 shows the output current signal.

300

200

100
Vo, V

-100

-200

-300
0 10 20 30 40 50 60 70 80 90 100

time, msec

Figure 11: The Simulated Output Signal of the Inverter.

200

150
Vo(f), V

100

50

0
0 50 100 150 200 250 300 350 400 450 500

freq, Hz

Figure 12: Output Voltage Spectrum.

- 31 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

60

40

20
io, mA
0

-20

-40

-60
0 10 20 30 40 50 60 70 80 90 100

time, msec

Figure 13: Simulated Load Current.

5. Circuit Construction and Testing


Figure 14 shows the schematic diagram of the final inverter circuit. The
5V DC input voltage of the AT89C51 microcontroller and the 74LS244
buffer is obtained from a 7805 IC regulator that has been connected to the
12V DC input as shown in Figure 14.This regulator can be used to provide
a constant 5V DC voltage for the TTL or CMOS digital ICs for stable
operation. Two fast switching diodes, D1 and D2, are connected at the
bases of Q1 and Q3 to remove the negative spikes of the base signals
which may otherwise damage the emitter-base junctions of the transistors.
The inverter circuit was implemented on a test breadboard, and all the
power transistors were fixed on suitable heat sinks. Figure 15 depicts a
photograph of the assembled circuit. As illustrated in Figure 15, the DC
input voltage is taken from a 12V DC battery of high capacity. In Figure 16,
the square waves generated by the 8051 microcontroller at pins P1.0 and
P1.1 are displayed on a digital storage oscilloscope. As shown from this
figure, the generated signals are clean with constant amplitude of 5 V. The
measured stabilized frequency is 49.75 Hz as depicted in Figure17.

- 32 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

Figure 14: Schematic Diagram of the Inverter Circuit.

Figure 15: The Implemented Inverter Circuit.

- 33 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

Figure 16: Microcontroller Generated Square Waves Displayed on the


Oscilloscope (Scale : 5 V/div, 10 ms/div).

Figure 17: Signal at the Output of the 74LS244 Buffer (Scale: 2V/div,
10 ms/div)

The signal at the base of transistor Q1 is displayed in Figure 18, while


Figure 19 presents the signal at the collector of transistor Q 2 at full-load.
The distortion in these signals is referred to the nonlinear operation of the
power transistors and their non-ideal switching characteristics.

- 34 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

Figure 18: Signal at the Base of Transistor Q1

Figure 19: Signal at the Collector of Transistor Q2

The performance evaluation results were obtained through the


experimental test setup shown in Figure 20.

- 35 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

Figure 20: Practical Test Setup for the Designed Inverter.

In this test setup, a 12 V car battery was used for DC input and 220 V, 2 W
bulbs (lamps) were used for the AC load. The input voltage, input current,
output current, and output voltage have been measured while changing
the wattage of the load bulbs. The output voltage actually falls with a
heavy load. The consumption of power by the bulbs changes with the
voltage.
Figure 21 shows a sketch of the output voltage versus load power, while
Figure 22 shows a sketch of the inverter efficiency versus load power
where:

Pout V .I
  100  out out  100 (4)
Pin V dc . I dc

Where Vdc and Idc are the DC input voltage and current respectively, and
Vout and Iout are the r.m.s voltage and current at the output.
It can be seen from Figure 21 that the output voltage falls with increasing
load power and reaches to 200 V approximately at 10 W output (Full-load).
From this figure, the AC voltage regulation can be calculated as:

V NL  VFL
VR   100 (5)
VFL

216  200
  8%
200

Where VNL is the no-load output voltage and VFL is the full-load output
voltage.
- 36 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

On the other hand, the efficiency increases with the increase in load power
and reaches a maximum value of 70% approximately at 10 W load power
as shown in Figure 22.
250

200

150
Vout (V)

100

50

0
0 2 4 6 8 10 12 14
PL (W)

Figure 21: Output Voltage versus Load Power


100

90

80

70

60
% Efficiency

50

40

30

20

10

0
0 2 4 6 8 10 12 14
PL (W)

Figure 22: Conversion Efficiency versus Load Power

- 37 -
Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie ‫ ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬.‫م‬.‫ م‬، ‫ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ‬.‫م‬.‫م‬

6. Summary and Results Discussion


In this work, a practical inverter circuit to convert a 12 V input DC voltage
into 220 V AC output voltage has been designed and constructed based
on the 8051 microcontroller.
After reporting the test results, it has been shown that the stability and
accuracy of the frequency for the generated waveform are greatly
enhanced through the use of the microcontroller as a stabilized oscillator.
It was also noticed that the output voltage falls from 216 V at no-load to
approximately 200 V at full-load with an overall voltage regulation of 8%.
The main cause in load voltage reduction is the limited power capability of
the transformer, and the harmonics presented in the output waveform. The
inverter efficiency increases with the load power reaching to 70% at 10 W.
Factors affecting the overall conversion efficiency include power
dissipation in the power transistors, transformer leakage and core loss,
and power consumption in the voltage regulator module and the
microcontroller chip. The relatively high saturation voltage of the 2N3055
power transistor reduces the effective amplitude of the generated signal.
The current rating of the transformer is 1 A, and a larger transformer can
be used to obtain much more load power. The amplitude regulation of the
inverter can be improved by using a 12V IC voltage regulator for the power
transistors with high current capability. This will, however, increase the
power losses and hence degrade the conversion efficiency. Power
MOSFETs can be used as the switching devices instead of the BJTs to
minimize the switching losses.

- 38 -
Al-Mansour Journal / Issue ( 24 ) 2015 ( 24) ‫ اﻟﻌﺪد‬/‫ﻣﺠﻠﺔ اﻟﻤﻨﺼﻮر‬

References
[1] Fang L. Luo and Hong Ye, “Advanced DC/AC Inverters: Applications
in Renewable Energy”, Taylor & Francis Group, LLC, 2013.
[2] Denis Fewson, “Introduction to Power Electronics”, Oxford University
Press, New York, USA, 1998.
[3] James H. Hahn, “Modified Sine Wave Inverter Enhanced”, Power
Electronics Technology, August 2006, pp. 20-22.
[4] M. U. Rafique, S. Aslan, and J. Anwer, “Implementation of a Novel
Microcontroller-Based Voltage Source Sine-Wave Inverter”,
Proceedings of the 2011 Frontiers of Information Technology, pp.
167-172.
[5] A. S. K. Chowdhury et al., “Design and Implementation of a Highly
Efficient Pure Sine-Wave Inverter for Photovoltaic Applications”,
Proceedings of the 2013 International Conference on Informatics,
Electronics & Vision (ICIEV), 17-18 May 2013, pp. 1-6.
[6] Muhammad Ali Mazidi, Janice G. Mazidi, and Rolin D. McKinlay,
“The 8051 Microcontroller and Embedded Systems Using Assembly
and C”, 2nd Edition, Prentice-Hall, New-Delhi, India, 2006.
[7] Bob Cordell, “Designing Audio Power Amplifiers”, McGraw-Hill
Companies, Inc., 2011.
[8] M. H. Rashid, and H. M. Rashid, “SPICE for Power Electronics and
Electric Power”, 2nd Edition, Tylor & Francis Group, LLC, 2006.

- 39 -
‫‪Hawraa Qasim Hameed Firas Mohammed Ali Al-Raie‬‬ ‫م‪.‬م‪.‬ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ ‪ ،‬م‪.‬م‪ .‬ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ‬

‫ﺗﺼﻤﯿﻢ وﺗﻨﻔﯿﺬ ﻋﺎﻛﺲ ﺗﯿﺎر ﻣﺴﺘﻤﺮ‪ /‬ﺗﯿﺎر ﻣﺘﻨﺎوب ﺑﺎﺳﺘﺨﺪام اﻟﻤﺴﯿﻄﺮ اﻟﺪﻗﯿﻖ‬

‫م‪.‬م‪ .‬ﺣﻮراء ﻗﺎﺳﻢ ﺣﻤﯿﺪ*‬ ‫م‪.‬م‪ .‬ﻓﺮاس ﻣﺤﻤﺪ ﻋﻠﻲ اﻟﺮاﻋﻲ*‬

‫اﻟﻤﺴﺘﺨﻠﺺ‬

‫ﻓﻲ ھﺬا اﻟﺒﺤﺚ ﺗﻢ اﻗﺘﺮاح ﻃﺮﯾﻘﺔ ﻟﺘﺤﺴﯿﻦ اﻹﺳﺘﻘﺮارﯾﺔ اﻟﺘﺮددﯾﺔ ودﻗﺔ ﺗﺮدد اﻹﺷﺎرة اﻟﻤﺘﻮﻟﺪة ﻟﺪواﺋﺮ‬
‫اﻟﻌﺎﻛﺲ ذات اﻹﺷﺎرة اﻟﻤﺮﺑﻌﺔ ﻋﻦ ﻃﺮﯾﻖ اﺳﺘﺨﺪام داﺋﺮة ﻣﺬﺑﺬب ﻋﺎﻟﻲ اﻻﺳﺘﻘﺮار ﻣﺒﻨﯿﺔ ﺑﺎﺳﺘﺨﺪام اﻟﻤﺴﯿﻄﺮ‬
‫اﻟﺪﻗﯿﻖ‪.‬‬
‫ﺗﻌﺘﻤﺪ اﻟﺘﻘﻨﯿﺔ اﻟﻤﻘﺘﺮﺣﺔ ﻋﻠﻰ اﺳﺘﺨﺪام اﻟﻤﺴﯿﻄﺮ اﻟﺪﻗﯿﻖ ‪ 8051‬ﻟﯿﻌﻤﻞ ﻛﻤﺬﺑﺬب ﻋﺎﻟﻲ اﻻﺳﺘﻘﺮار ﻟﺘﻮﻟﯿﺪ‬
‫إﺷﺎرﺗﯿﻦ ﻣﺮﺑﻌﺘﯿﻦ ﻣﺘﻌﺎﻛﺴﺘﯿﻦ ﺑﺎﻟﻄﻮر ﺑﺘﺮدد ‪ 50 Hz‬وإرﺳﺎﻟﮭﻤﺎ إﻟﻰ ﻣﺮﺣﻠﺔ ﻣﺸﻐﻞ اﻟﻘﺪرة ﻟﺪاﺋﺮة اﻟﻌﺎﻛﺲ ﻋﻦ‬
‫ﻃﺮﯾﻖ ﺑﺮﻧﺎﻣﺞ ﻣﺨﺰون ﻓﻲ ذاﻛﺮﺗﮫ اﻟﺪاﺧﻠﯿﺔ اﻟﺪاﺋﻤﯿﺔ‪ .‬ﯾﺘﻢ ﺑﻌﺪ ذﻟﻚ ﺗﻀﺨﯿﻢ ھﺬه اﻹﺷﺎرات ﻟﺰﯾﺎدة ﻣﺴﺘﻮى اﻟﺘﯿﺎر‬
‫واﻟﻔﻮﻟﺘﯿﺔ ﻓﯿﮭﺎ ﻋﻦ ﻃﺮﯾﻖ ﻣﻀﺨﻢ ﻗﺪرة ﺗﺤﻮﯾﻠﻲ ﯾﻌﻤﻞ ﺑﻄﺮﯾﻘﺔ اﻟﺪﻓﻊ‪/‬اﻟﺴﺤﺐ ﺑﺘﺮاﻧﺰﺳﺘﻮرات ﻗﺪرة ﻣﻦ ﻧﻮع‬
‫‪ .BJT‬وﯾﺘﻢ رﻓﻊ ﺟﮭﺪ اﻹﺷﺎرة اﻟﻤﺘﻨﺎوﺑﺔ اﻟﻤﺘﻮﻟﺪة اﻟﻰ اﻟﻘﯿﻤﺔ اﻟﻤﻄﻠﻮﺑﺔ ﺑﻮاﺳﻄﺔ ﻣﺤﻮل راﻓﻊ ﻟﻠﺠﮭﺪ‪.‬‬
‫ﺗﻢ ﺗﺼﻤﯿﻢ وﺗﻨﻔﯿﺬ داﺋﺮة ﻋﺎﻛﺲ ﻋﻤﻠﯿﺔ ﻟﺘﺤﻮﯾﻞ ﺟﮭﺪ ﻣﺴﺘﻤﺮ ﻣﻘﺪاره ‪ 12 V‬إﻟﻰ ﺟﮭﺪ ﻣﺘﻨﺎوب ﻗﯿﻤﺘﮫ اﻟﻔﻌﺎﻟﺔ‬
‫‪ 220 V‬ﺑﺎﺳﺘﺨﺪام اﻟﻤﺴﯿﻄﺮ اﻟﺪﻗﯿﻖ ‪ .8051‬ﺗﺘﻜﻮن اﻟﺪاﺋﺮة اﻟﻤﻘﺘﺮﺣﺔ ﻣﻦ اﻟﻤﺴﯿﻄﺮ اﻟﺪﻗﯿﻖ ‪ 8051‬وﻋﺎزل‬
‫وﻣﻀﺨﻢ ﻗﺪرة أوﻟﻲ وﻣﺮﺣﻠﺔ ﺗﻀﺨﯿﻢ ﻗﺪرة ﻧﮭﺎﺋﯿﺔ ﺑﺎﻹﺿﺎﻓﺔ إﻟﻰ ﻣﺤﻮل راﻓﻊ ﻟﻠﺠﮭﺪ‪ .‬ﺗﻤﺖ ﻣﺤﺎﻛﺎة داﺋﺮة‬
‫اﻟﻌﺎﻛﺲ ﺑﻮاﺳﻄﺔ اﻟﺤﺎﺳﻮب وﻣﻦ ﺛﻢ ﺗﻨﻔﯿﺬھﺎ واﺧﺘﺒﺎرھﺎ ﻋﻤﻠﯿﺎً‪ .‬وﻗﺪ ﺑﯿﻨﺖ ﻧﺘﺎﺋﺞ اﻟﻘﯿﺎﺳﺎت اﻟﻌﻤﻠﯿﺔ ﺑﺄن اﻟﺪاﺋﺮة‬
‫ﺗﻌﻄﻲ ﻗﺪرة ﺧﺮج ﻣﻘﺪارھﺎ ‪ 10 W‬ﻟﻠﺤﻤﻞ اﻟﻜﺎﻣﻞ ﺑﺘﻨﻈﯿﻢ ﺟﮭﺪ ﻣﻘﺪاره ‪ 8%‬وﺑﻜﻔﺎءة ﺗﺤﻮﯾﻞ ﻗﺼﻮى ﺗﺼﻞ إﻟﻰ‬
‫‪.70%‬‬

‫ﻗﺴﻢ اﻟﮭﻨﺪﺳﺔ اﻟﻜﮭﺮﺑﺎﺋﯿﺔ‪ ،‬اﻟﺠﺎﻣﻌﺔ اﻟﺘﻜﻨﻮﻟﻮﺟﯿﺔ‬ ‫*‬

‫‪- 40 -‬‬

You might also like