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26 & 28 April

Programmable logic devices (PLDs) can be programmed after manufacture to implement different logic functions using a single chip. There are several types of PLDs including programmable read only memory (PROM), programmable array logic (PAL), and programmable logic array (PLA). PROMs have a fixed AND array and programmable OR array, allowing different boolean functions to be implemented through programming the OR array connections.

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0% found this document useful (0 votes)
9 views8 pages

26 & 28 April

Programmable logic devices (PLDs) can be programmed after manufacture to implement different logic functions using a single chip. There are several types of PLDs including programmable read only memory (PROM), programmable array logic (PAL), and programmable logic array (PLA). PROMs have a fixed AND array and programmable OR array, allowing different boolean functions to be implemented through programming the OR array connections.

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§ Programmable Logic Devices: These are special types of


IC’s used by the user and are programmed before use.
Different types of logic functions can be implemented
using a single programmed IC chip of PLD’s.

§ ASICs all have fixed functions, determined by the logic


circuit for each component.

§ Programmable logic devices (PLDs), on the other hand, can


be programmed after manufacture to have different
functions
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PROGRAMMABLE CONFIGURATIONS
§ Programmable Read Only Memory (PROM) - a fixed array
of AND gates and a programmable array of OR gates

§ Programmable Array Logic (PAL) - a programmable array


of AND gates feeding a fixed array of OR gates.

§ Programmable Logic Array (PLA) - a programmable array


of AND gates feeding a programmable array of OR gates.

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ROM, PAL AND PLA CONFIGURATIONS

Fixed Programmable Programmable


Inputs AND array Outputs
Connections OR array

(a) Programmable read-only memory (PROM)

Programmable Programmable Fixed


Inputs Outputs
Connections AND array OR array

(b) Programmable array logic (PAL) device

Programmable Programmable Programmable Programmable


Inputs Outputs
Connections AND array Connections OR array

(c) Programmable logic array (PLA) device


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READ ONLY MEMORY


§ Read Only Memories (ROM) or Programmable Read Only
Memories (PROM) have:

§ Fixed AND array


§ Programmable OR Array

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IMPLEMENT THE FOLLOWING BOOLEAN FUNCTIONS


USING PROM.
F1(A1, A0) = ∑ M(1,2)
F2(A1, A0) = ∑ M(0,1,3)

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IMPLEMENT THE FOLLOWING BOOLEAN FUNCTIONS


USING PROM.
F1(A1, A0) = ∑ M(1,2)
F2(A1, A0) = ∑ M(0,1,3)

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IMPLEMENT THE FOLLOWING BOOLEAN FUNCTIONS


USING PROM.
F1(A1, A0) = ∑ M(1,2)
F2(A1, A0) = ∑ M(0,1,3)

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§ Example: A 8 X 4 ROM (N = 3 input lines, M= 4 output lines)


§ The fixed"AND" array is a
D7 X X X
“decoder” with 3 inputs and 8 D6
outputs implementing min-terms. D5 X X
D4 X
§ The programmable "OR“ A A2 D3 X
array uses a single line to B
D2
A1 D1 X X
represent all inputs to an C A0 D0 X
OR gate. An “X” in the
array corresponds to attaching the
min-term to the OR
F3 F2 F1 F0

§ What are functions F3, F2 , F1 and F0 in terms of (A,B,C)?

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§ F3=ABC+AB’C+A’BC’
§ F2=ABC+A’B’C’
§ F1=A’B’C+AB’C’
§ F0=ABC+AB’C+A’B’C

Chapter 6 - Part 4 25

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