Counters

• We’ll look at different kinds of counters and discuss how to build them

• These are not only examples of sequential analysis and design, but also real
devices used in larger circuits

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Introducing counters

• Counters are a specific type of sequential circuit

• The state serves as the “output” (Moore)

• A counter that follows the binary number sequence is called a binary

counter

– n-bit binary counter: n flip-flops, count in binary from 0 to 2ⁿ-1

• Counters are available in two types:

– Synchronous Counters
– Ripple Counters

• Synchronous Counters:

– A common clock signal is connected to the C input of each flip-flop

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Synchronous Binary Up Counter

• The output value increases by one on each clock cycle

• After the largest value, the output “wraps around” back to 0

• Using two bits, we’d get something like this:

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Present State Next State 00 01
A B A B
0 0 0 1 1 1
0 1 1 0
1 0 1 1 1
1 1 0 0 11 10

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What good are counters?

• Counters can act as simple clocks to keep track of “time”

• You may need to record how many times something has happened

– How many bits have been sent or received?

– How many steps have been performed in some computation?

• All processors contain a program counter, or PC

– Programs consist of a list of instructions that are to be executed

one after another (for the most part)
– The PC keeps track of the instruction currently being executed
– The PC increments once on each clock cycle, and the next program
instruction is then executed.

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Synch Binary Up/Down Counter

• 2-bit Up/Down counter

– Counter outputs will be 00, 01, 10 and 11
– There is a single input, X.
> X= 0, the counter counts up
> X= 1, the counter counts down

• We’ll need two flip-flops again. Here are the four possible states:

00 01

11 10

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The complete state diagram and table

• Here’s the complete state diagram and state table for this circuit

Present State Inputs Next State

0 Q1 Q0 X Q1 Q0
00 01 0 0 0 0 1
1 0 0 1 1 1
0 1 0 1 0
0 1 1 0
0 1 1 0 0
1 1 0 0 1 1
11 10 1 0 1 0 1
0 1 1 0 0 0
1 1 1 1 0

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D flip-flop inputs

• If we use D flip-flops, then the D inputs will just be the same as the
desired next states

• Equations for the D flip-flop inputs are shown at the right

• Why does D0 = Q0’ make sense? Q0

0 1 0 1
Q1 1 0 1 0
Present State Inputs Next State X
Q1 Q0 X Q1 Q0
D 1 = Q 1 ⊕ Q0 ⊕ X
0 0 0 0 1
0 0 1 1 1
0 1 0 1 0 Q0
0 1 1 0 0 1 1 0 0
1 0 0 1 1
Q1 1 1 0 0
1 0 1 0 1
X
1 1 0 0 0
1 1 1 1 0 D0 = Q0’

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JK flip-flop inputs

• If we use JK flip-flops instead, then we have

Q(t) Q(t+1) J K
to compute the JK inputs for each flip-flop
0 0 0 x
0 1 1 x
• Look at the present and desired next state,
1 0 x 1
and use the excitation table on the right
1 1 x 0

Present State Inputs Next State Flip flop inputs

Q1 Q0 X Q1 Q0 J1 K1 J0 K0
0 0 0 0 1 0 x 1 x
0 0 1 1 1 1 x 1 x
0 1 0 1 0 1 x x 1
0 1 1 0 0 0 x x 1
1 0 0 1 1 x 0 1 x
1 0 1 0 1 x 1 1 x
1 1 0 0 0 x 1 x 1
1 1 1 1 0 x 0 x 1

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JK flip-flop input equations

Present State Inputs Next State Flip flop inputs

Q1 Q0 X Q1 Q0 J1 K1 J0 K0
0 0 0 0 1 0 x 1 x
0 0 1 1 1 1 x 1 x
0 1 0 1 0 1 x x 1
0 1 1 0 0 0 x x 1
1 0 0 1 1 x 0 1 x
1 0 1 0 1 x 1 1 x
1 1 0 0 0 x 1 x 1
1 1 1 1 0 x 0 x 1

• We can then find equations for all four flip-flop inputs, in terms of the
present state and inputs. Here, it turns out J1 = K1 and J0 = K0
J1 = K1 = Q0’ X + Q0 X’
J0 = K0 = 1

• Why does J0 = K0 = 1 make sense?

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Unused states

• The examples shown so far have all had 2n states, and used n flip-flops.
But sometimes you may have unused, leftover states

• For example, here is a state table and diagram for a counter that
repeatedly counts from 0 (000) to 5 (101)

• What should we put in the table for the two unused states?

Present State Next State 000

Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1
101 001
0 0 1 0 1 0
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
1 0 1 0 0 0 100 010
1 1 0 ? ? ?
1 1 1 ? ? ? 011
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Unused states can be don’t cares…
• To get the simplest possible circuit, you can fill in don’t cares for the
next states. This will also result in don’t cares for the flip-flop inputs,
which can simplify the hardware

• If the circuit somehow ends up in one of the unused states (110 or 111),
its behavior will depend on exactly what the don’t cares were filled in with

Present State Next State 000

Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1 101 001
0 0 1 0 1 0
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
1 0 1 0 0 0
100 010
1 1 0 x x x
1 1 1 x x x 011

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…or maybe you do care
• To get the safest possible circuit, you can explicitly fill in next states
for the unused states 110 and 111

• This guarantees that even if the circuit somehow enters an unused state,
it will eventually end up in a valid state

• This is called a self-starting counter 110 111

Present State Next State

000
Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1
0 0 1 0 1 0 101 001
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
1 0 1 0 0 0 100 010
1 1 0 0 0 0
1 1 1 0 0 0
011
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4-bit Counter with Serial Gating

0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
CO= 1 when 1111 1 1 1 1
> 4 gate delays 13
4-bit Counter with Parallel Gating

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4-bit Binary Counter with Parallel Load

Load Count
Parallel
1 x
Load
No
0 0
Change
0 1 Count

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More complex counters

• More complex counters are also possible:

– It can increment or decrement, by setting the UP input to 1 or 0

– You can immediately (asynchronously) clear the counter to 0000
by setting CLR = 1
– You can specify the counter’s next output by setting D3-D0 to any
four-bit value and clearing LD
– The active-low EN input enables or disables the counter
• When the counter is disabled, it continues to output the same
value without incrementing, decrementing, loading, or clearing
– The “counter out” CO is normally 1, but becomes 0
when the counter reaches its maximum value, 1111

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An 8-bit counter

• As you might expect by now, we can use

these general counters to build other
counters

• Here is an 8-bit counter made from two 4-bit

counters

– The bottom device represents the least

significant four bits, while the top counter
represents the most significant four bits
– When the bottom counter reaches 1111
(i.e., when CO = 0), it enables the top
counter for one cycle

• Other implementation notes:

– The counters share clock and clear signals
– Hex displays are used here
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A restricted 4-bit counter

• We can also make a counter that “starts” at some value besides 0000

• In the diagram below, when CO=0 the LD signal forces the next state
to be loaded from D3-D0

• The result is this counter wraps from 1111 to 0110 (instead of 0000)

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Another restricted counter

• We can also make a circuit that counts up to only 1100, instead of 1111

• Here, when the counter value reaches 1100, the NAND gate forces
the counter to load, so the next state becomes 0000

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Ripple Counter

Simple, yet asynchronous circuits !!!

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Summary

• Counters serve many purposes in sequential logic design

• There are lots of variations on the basic counter

– Some can increment or decrement
– An enable signal can be added
– The counter’s value may be explicitly set

• There are also several ways to make counters

– You can follow the sequential design principles to build counters
from scratch
– You could also modify or combine existing counter devices

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