PHYCS 342 MINI PROJECT

TRAFFIC SIGNAL WITH

PEDESTRIAN CROSSING

Name : Sana Ruknudin Khattak

ID number:- 202009410
INTRODUCTION:-
This project works on developing a traffic signal at the intersection off a busy Main
St. And a lightly used side street with a pedestrian crossing sign on the Main Street
to allow a safe passage for the people wanting to cross this busy intersection Road
using applied logic.
The traffic signal and the pedestrian crossing signal on the Main St is connected to
the traffic signal on the side street in its mode of operation.i.e. when the traffic
signal on the Main St. Is red the pedestrian crossing is green and so is the side
streets traffic light.
The road layout is shown in the figure below along with the mode of operation of
the two traffic lights. A better visual depiction of the pedestrian crossing sign is
shown in the state diagram later.

Figure 1:- road layout Figure 2:- traffic lights operation

INPUTS AND OUTPUTS:-
INPUTS
Variables Description
Vs Vehicles on the side road
Ts 4s timer (s= short)
TL 20s timer (L=long)
P Push button for Pedestrian cross

OUTPUTS
Variables Description
R1 Main road’s red light
Y1 Main yellow light
G1 Main green light
R2 Side road’s red light
Y2 Side yellow light
G2 Side green light
W Walk symbol (pedestrians can cross the road)
W0 (W bar) Stop symbol for pedestrians ( Red hand
symbol)
C Countdown of 4 s for the pedestrians already
crossing to finish before the main signal goes
yellow again.

Relation of inputs to output:-

There are only four inputs VS,Ts , TL and P. VS is a sensor input for the presence
of vehicles on the side street and P is the pedestrian crossing button. A high for
either of these two inputs will cause the Main Street signal to go red allowing side
road cars and/or pedestrians to pass.
- TL input is a timer for 20 seconds which starts when the green light on the
Main Street turns on.
Now If there is a vehicle on the side Rd. Or a pedestrian pushes the button,
the green light will go off as soon as this timer ends otherwise it will start
again and the green light will stay on

- TS input is a timer for 4 seconds used between changes from green to yellow
or yellow to red or for the pedestrian crossing countdown. All these relations
are explained in this state diagram below.
 ̅𝑠)P
(TL + V ̅
STATE DIAGRAM: -

State 1:-
Grey code: 000
Main signal: green
Side signal: red
̅S
T Pedestrian sign: RED HAND

Ts Ts

State 6:-
Grey code: 001 State 2:-
Main signal: yellow Grey code: 001
Side signal: red Main signal: yellow
Pedestrian sign: RED HAND Side signal: red
Pedestrian sign: RED HAND

̅S
T
̅S
T

State 5:- State 3:-

Grey code: 001 Grey code: 001
Main signal: red Ts Main signal: red
Side signal: yellow Side signal: yellow
Pedestrian sign: walk and Pedestrian sign: RED HAND
countdown

State 4:-
Grey code: 001
Main signal: red
̅L
T Side signal: green
Pedestrian sign: WALK ̅S
T
 BLOCK DIAGRAM:-

Figure 3- block diagram

This application consists of three main parts;

- combinational logic
- sequential logic
- the timing circuits.
The input is taken in by the sequential logic part which along with the timing
circuit assesses which state the system is in, in terms of grey code.
This grey code is then sent to the combinational logic part where a state decoder
will convert the grey cord to figure out what state the system is under. This data
along with the timing circuit connection is then sent towards the light output logic
which will then display a specific output.
In this report, we will go deeper into the combinational logic and the sequential
logic part.
Input -----> counter( sequential) -----> gray code -----> states(combinational) -----> light output

Let’s work backwards and first look at the combinational logic, assume that a
certain grey code has been sent by the sequential logic circuit which acts as the
input for the combinational part.
(Grey code -----> states)
Grey code: A2 A1 A0
Where A2 is MSB and A0 is LSB

Representation of each state

States In terms of output
S1 G1 R2 W0
S2 Y1 R2 W0
S3 R1 Y2 W0
S4 R1 G2 W
S5 R1 Y2 W C
S6 Y1 R2 W0

Representation of each state

States In terms of gray input
S1 Ā2 Ā1 Ā0
S2 Ā2 Ā1 A0
S3 Ā2 A1 A0
S4 Ā2 A1 Ā0
S5 A2 A1 Ā0
S6 A2 A1 A0
 TRUTH TABLE FOR STATE DECODER

STATE DECODER
Gray code Decoding function States
A2 A1 A0 S1 S2 S3 S4 S5 S6
0 0 0 Ā2 Ā1 Ā0 1 0 0 0 0 0
0 0 1 Ā2 Ā1 A0 0 1 0 0 0 0
0 1 1 Ā2 A1 A0 0 0 1 0 0 0
0 1 0 Ā2 A1 Ā0 0 0 0 1 0 0
1 1 0 A2 A1 Ā0 0 0 0 0 1 0
1 1 1 A2 A1 A0 0 0 0 0 0 1

IMPLEMENTAION IN MULTISIM: -

Figure 4- state decoder implementation

After the grey code is decoded and the state is identified, The light output logic
gives the final display using LEDs for the traffic light and the pedestrian sign and 7
segment component for the countdown output.
Output logic:-
OUTPUTS
Variables function
R1 S3 + S4 + S5
Y1 S2 + S6
G1 S1
R2 S1+ S2+ S6
Y2 S5
G2 S4
W S4 + S5
W0 (W bar) S̄4. S̄5
C S5

Figure 5- output light logic implementation

Now that we're done with the easy half let's look at the sequential logic which
takes in the actual input like the presence of vehicles or pedestrians and converts it
into a Grey code for the decoder to forward to the light output as discussed above.
The sequential logic part is further divided into 2 parts. First, there is a certain
input logic that takes in the main inputs and is connected to the second part which
is a 3-bit Gray code counter.
This counter is made up of three positive edge-triggered D flip-flops.

Figure (6): Sequential logic diagram for the 3 bit gray code counter

Now since the States can recycle amongst themselves and upon certain conditions
move on to the next state, there must be a feedback loop between the output of the
counter and the input logic.
To figure out the exact associated input logic with the counter we must first Find
the logic expressions for each of the input of the D flip flops (D0, D1, D2). And
since the D flip-flop just copies the input ,this input is nothing but the final grey
code (A2 A1 A0).
D2=A2, D1=A1, D0=A0
TRUTH TABLE FOR COUNTER (consists of 3 FLIP-FLOPS)

Present state Next State Input conditions Flip-Flop Inputs

A2 A1 A0 A2 A1 A0 D2 D1 D0
0 0 0 0 0 0 ̅𝑠)P
(TL + V ̅ 0 0 0

0 0 0 0 0 1 ̅LP + T
T ̅ L V𝑠 0 0 1

0 0 1 0 0 1 TS 0 0 1
0 0 1 1 1 0 ̅S
T 1 1 0
0 1 1 0 1 1 TS 0 1 1
0 1 1 0 1 0 ̅S
T 0 1 0
0 1 0 0 1 0 TL 0 1 0
0 1 0 1 1 0 ̅L
T 1 1 0
1 1 0 1 1 0 TS 1 1 0
1 1 0 1 1 1 ̅S
T 1 1 1
1 1 1 1 1 1 TS 1 1 1
1 1 1 0 0 0 ̅S
T 0 0 0

Based on;

Figure 7- transition table for D flip flops

 Figure 8- logic circuit of a flip flop

Now we must find out the logic functions for D1, D2, D3. Building Karnaugh
maps can be a bit tricky here as the outputs has different conditions( specifically
for D0, while D1, ,D2 are straightforward). Another simpler way to do it can be
using truth tables .
Since D depends on the present state, the input conditions and the inputs we can
draw the following 3 tables from the main truth table of the counter given above to
extract their logic functions

FOR D0:-
A2 A1 A0 conditions TL TS VS P D0
0 0 0 ̅LP + T
T ̅L 0 - 1 1 1
V𝑠

0 0 1 TS - 1 - - 1
0 1 1 TS - 1 - - 1
1 1 0 ̅S
T - 0 - - 1
1 1 1 TS - 1 - - 1
 SOP EXPRESSION:-
̅LP + T
D0=( (T ̅ L V𝑠) . Ā2 Ā1 Ā0 ) + (Ā2 Ā1 A0 TS ) + (Ā2 A1 A0 TS ) +
(A2 A1 Ā0 T̅ S) + (A2 A1 A0 TS )

Futher simplifying It to get

̅ L P Ā2 Ā1 Ā0 ) + (+ T
D0=( T ̅ L V𝑠 Ā2 Ā1 Ā0) + (Ā2 A0 TS ) + (A2 A1 Ā0 T
̅ S) +
(A2 A1 A0 TS )

For D1:-
A2 A1 A0 conditions TL TS VS P D1

0 0 1 ̅S
T - 0 - - 1

0 1 1 TS - 1 - - 1

0 1 1 ̅S
T - 0 - - 1

0 1 0 TL 1 - - - 1

0 1 0 ̅L
T 0 - - - 1

1 1 0 TS - 1 - - 1

1 1 0 ̅S
T - 0 - - 1

1 1 1 TS - 1 - - 1

D1=( Ā2 Ā1 A0 T ̅ S ) + (Ā2 A1 A0 TS ) +(Ā2 A1 A0 T ̅ S ) + (Ā2 A1 Ā0 TL ) + (

̅ L) +(A2 A1 Ā0 TS ) + (A2 A1 Ā0 T
Ā2 A1 Ā0 T ̅ S ) + (A2 A1 A0 TS ).

Using the identity : -A + Ā = 1

We get;
̅ S ) + (Ā2 A1 A0) + (Ā2 A1 Ā0) +(A2 A1 Ā0) + (A2 A1 A0 TS
D1= =( Ā2 Ā1 A0 T
).
FOR D2:-
A2 A1 A0 conditions TL TS VS P D2

0 0 1 ̅S
T - 0 - - 1

0 1 0 ̅L
T 0 - - - 1

1 1 0 TS - 1 - - 1

1 1 0 ̅S
T - 0 - - 1

1 1 1 TS - 1 - - 1

SOP EXPRESSION:-
̅ S ) + ( Ā2 A1 Ā0 T
D2=( Ā2 Ā1 A0 T ̅ L) +(A2 A1 Ā0 TS ) + (A2 A1 Ā0 T
̅ S ) + (A2
A1 A0 TS ).
̅ S ) + ( Ā2 A1 Ā0 T
D2=( Ā2 Ā1 A0 T ̅ L) +(A2 A1 Ā0) + (A2 A1 A0 TS ).

Now to implement (using multisim )this in place of the input logic is in

fig 6.
 figure 9- sequential logic
( also there were no flip flops so I used impedance blockers and edited as u can see and the limit of
componenst was reached so I had to remove the switches for the inputs and edit that too) (,this circuit
took 3 hours to simulate accurately)