ARM® IAR Assembler

Reference Guide

for Advanced RISC Machines Ltd’s

ARM Cores

AARM-7
 COPYRIGHT NOTICE
© Copyright 2006 IAR Systems. All rights reserved.
No part of this document may be reproduced without the prior written consent of IAR
Systems. The software described in this document is furnished under a license and
may only be used or copied in accordance with the terms of such a license.

DISCLAIMER
The information in this document is subject to change without notice and does not
represent a commitment on any part of IAR Systems. While the information contained
herein is assumed to be accurate, IAR Systems assumes no responsibility for any
errors or omissions.
In no event shall IAR Systems, its employees, its contractors, or the authors of this
document be liable for special, direct, indirect, or consequential damage, losses, costs,
charges, claims, demands, claim for lost profits, fees, or expenses of any nature or
kind.

TRADEMARKS
IAR Systems, From Idea to Target, IAR Embedded Workbench, visualSTATE, IAR
MakeApp and C-SPY are trademarks owned by IAR Systems AB.

ARM and Thumb are registered trademarks of Advanced RISC Machines Ltd.
Microsoft and Windows are registered trademarks of Microsoft Corporation.
All other product names are trademarks or registered trademarks of their respective
owners.

EDITION NOTICE
Seventh edition: June 2006
Part number: AARM-7
This guide applies to version 4.x of the ARM IAR Embedded Workbench® IDE.

AARM-7
Contents
Tables ..................................................................................................................................... vii
Preface .................................................................................................................................. ix
Who should read this guide ..........................................................................ix
How to use this guide ........................................................................................ix
What this guide contains ................................................................................ix
Other documentation ........................................................................................x
Document conventions .....................................................................................x
Introduction to the ARM IAR Assembler ................................... 1
Source format ..........................................................................................................1
Assembler expressions ......................................................................................2
TRUE and FALSE ...........................................................................................2
Using symbols in relocatable expressions ..................................................2
Symbols ..............................................................................................................3
Labels ..................................................................................................................3
Integer constants ...............................................................................................4
ASCII character constants ..............................................................................4
Floating-point constants .................................................................................5
Predefined symbols ..........................................................................................5
Register symbols ....................................................................................................7
Programming hints ..............................................................................................7
Accessing special function registers ............................................................8
Using C-style preprocessor directives .........................................................8
Output formats .......................................................................................................8
Assembler options .................................................................................................. 9
Setting assembler options ...............................................................................9
Extended command line file ..........................................................................9
Assembler environment variables ............................................................. 10
Summary of assembler options ............................................................... 11

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 Descriptions of assembler options ......................................................... 12
Assembler operators ......................................................................................... 23
Precedence of operators ............................................................................... 23
Summary of assembler operators .......................................................... 23
Unary operators – 1 ...................................................................................... 23
Multiplicative arithmetic operators – 2 .................................................... 24
Additive arithmetic operators – 3 .............................................................. 24
Shift operators – 4 ......................................................................................... 24
AND operators – 5 ........................................................................................ 24
OR operators – 6 ........................................................................................... 24
Comparison operators – 7 ........................................................................... 25
Operator synonyms ....................................................................................... 25
Descriptions of operators ............................................................................. 26
Assembler directives .......................................................................................... 37
Summary of directives .................................................................................... 37
Syntax conventions ........................................................................................... 41
Labels and comments ................................................................................... 41
Parameters ...................................................................................................... 42
Module control directives ............................................................................. 42
Syntax .............................................................................................................. 42
Parameters ...................................................................................................... 42
Description ..................................................................................................... 43
Symbol control directives ............................................................................ 45
Syntax .............................................................................................................. 45
Parameters ...................................................................................................... 45
Description ..................................................................................................... 45
Examples ......................................................................................................... 46
Mode control directives ................................................................................. 47
Syntax .............................................................................................................. 47
Description ..................................................................................................... 47
Examples ......................................................................................................... 48
Segment control directives ......................................................................... 49
Syntax .............................................................................................................. 49

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 Contents

Parameters ...................................................................................................... 49
Description ..................................................................................................... 50
Examples ......................................................................................................... 52
Value assignment directives ....................................................................... 54
Syntax .............................................................................................................. 54
Parameters ...................................................................................................... 55
Description ..................................................................................................... 55
Examples ......................................................................................................... 56
Conditional assembly directives .............................................................. 58
Syntax .............................................................................................................. 58
Parameters ...................................................................................................... 59
Description ..................................................................................................... 59
Examples ......................................................................................................... 59
Macro processing directives ....................................................................... 60
Syntax .............................................................................................................. 60
Parameters ...................................................................................................... 60
Description ..................................................................................................... 61
Examples ......................................................................................................... 64
Listing control directives .............................................................................. 69
Syntax .............................................................................................................. 69
Parameters ...................................................................................................... 69
Description ..................................................................................................... 70
Examples ......................................................................................................... 71
C-style preprocessor directives ................................................................ 74
Syntax .............................................................................................................. 74
Parameters ...................................................................................................... 75
Description ..................................................................................................... 75
Examples ......................................................................................................... 77
Data definition or allocation directives .............................................. 78
Syntax .............................................................................................................. 78
Parameters ...................................................................................................... 79
Description ..................................................................................................... 79
Examples ......................................................................................................... 79

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 Assembler control directives ..................................................................... 80
Syntax .............................................................................................................. 81
Parameters ...................................................................................................... 81
Description ..................................................................................................... 81
Examples ......................................................................................................... 82
Call frame information directives .......................................................... 83
Syntax .............................................................................................................. 84
Parameters ...................................................................................................... 86
Descriptions .................................................................................................... 86
Simple rules .................................................................................................... 90
CFI expressions ............................................................................................. 92
Example ........................................................................................................... 94
Assembler pseudo-instructions ............................................................ 97
Summary .................................................................................................................. 97
Descriptions of pseudo-instructions ...................................................... 98
Assembler diagnostics .................................................................................... 109
Message format ................................................................................................. 109
Severity levels ..................................................................................................... 109
Assembly warning messages .................................................................... 109
Command line error messages ................................................................. 109
Assembly error messages .......................................................................... 109
Assembly fatal error messages ................................................................. 109
Assembler internal error messages .......................................................... 110
Migrating to the ARM IAR Assembler ........................................ 111
Introduction ......................................................................................................... 111
Thumb code labels ...................................................................................... 111
Alternative register names ....................................................................... 112
Alternative mnemonics ............................................................................... 113
Operator synonyms ........................................................................................ 114
Warning messages .......................................................................................... 115
Index .................................................................................................................................... 117

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Tables
1: Typographic conventions used in this guide .......................................................... x
2: Integer constant formats ......................................................................................... 4
3: ASCII character constant formats .......................................................................... 4
4: Floating-point constants ......................................................................................... 5
5: Predefined symbols ................................................................................................ 5
6: Predefined register symbols ................................................................................... 7
7: Assembler error return codes ............................................................................... 10
8: Asssembler environment variables ...................................................................... 10
9: Assembler options summary ................................................................................ 11
10: Conditional list (-c) ............................................................................................ 12
11: Controlling case sensitivity in user symbols (-s) ............................................... 19
12: Disabling assembler warnings (-w) .................................................................... 20
13: Including cross-references in assembler list file (-x) ......................................... 21
14: Operator synonyms ............................................................................................ 25
15: Assembler directives summary .......................................................................... 37
16: Assembler directive parameters ......................................................................... 42
17: Module control directives .................................................................................. 42
18: Symbol control directives .................................................................................. 45
19: Mode control directives ..................................................................................... 47
20: Segment control directives ................................................................................. 49
21: Value assignment directives ............................................................................... 54
22: Conditional assembly directives ........................................................................ 58
23: Macro processing directives ............................................................................... 60
24: Listing control directives ................................................................................... 69
25: C-style preprocessor directives .......................................................................... 74
26: Data definition or allocation directives .............................................................. 78
27: Assembler control directives .............................................................................. 80
28: Call frame information directives ...................................................................... 83
29: Unary operators in CFI expressions ................................................................... 93
30: Binary operators in CFI expressions .................................................................. 93
31: Ternary operators in CFI expressions ................................................................ 94

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 32: Code sample with backtrace rows and columns ................................................ 95
33: Pseudo-instructions ............................................................................................ 97
34: Alternative register names ............................................................................... 112
35: Alternative mnemonics .................................................................................... 113
36: Operator synonyms .......................................................................................... 114

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 Preface
Welcome to the ARM® IAR Assembler Reference Guide. The purpose of this
guide is to provide you with detailed reference information that can help you
to use the ARM IAR Assembler to best suit your application requirements.

Who should read this guide

You should read this guide if you plan to develop an application using assembler
language for the ARM core and need to get detailed reference information on how to
use the ARM® IAR Assembler. In addition, you should have working knowledge of
the following:
● The architecture and instruction set of the ARM core; refer to the documentation
from Advanced RISC Machines Ltd for detailed information
● General assembler language programming
● The operating system of your host machine.

How to use this guide

When you first begin using the ARM® IAR Assembler, you should read the
Introduction to the ARM IAR Assembler chapter in this reference guide.
If you are an intermediate or advanced user, you can focus more on the reference
chapters that follow the introduction.
If you are new to using the IAR toolkit, we recommend that you first read the initial
chapters of the ARM® IAR Embedded Workbench® IDE User Guide. They give
product overviews, as well as tutorials that can help you get started.

What this guide contains

Below is a brief outline and summary of the chapters in this guide.
● Introduction to the ARM IAR Assembler provides programming information
including the source code format.
● Assembler options first explains how to set the assembler options from the
command line and how to use environment variables. It then gives an alphabetical
summary of the assembler options, and contains detailed reference information
about each option.
● Assembler operators gives a summary of the assembler operators, arranged in
order of precedence, and provides reference information about each operator.
● Assembler directives gives an alphabetical summary of the assembler directives,
and provides detailed reference information about each of the directives, classified
into groups according to their function.

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Other documentation

● Assembler pseudo-instructions lists the available pseudo-instructions and gives

examples of their use.
● Assembler diagnostics contains information about the formats and severity levels
of diagnostic messages.
● Migrating to the ARM IAR Assembler contains information that is useful when
you want to use the ARM IAR Assembler with source code that was originally
developed for another assembler.

Other documentation
The complete set of IAR Systems development tools for the ARM cores is described
in a series of guides. For information about:
● Using the IAR Embedded Workbench® and the IAR C-SPY® debugger, refer to
the ARM® IAR Embedded Workbench® IDE User Guide
● Programming for the ARM IAR C/C++ Compiler, refer to the ARM® IAR C/C++
Compiler Reference Guide
● Using the IAR XLINK linker and the IAR XLIB librarian, refer to the IAR Linker
and Library Tools Reference Guide
● Using the IAR DLIB Library, refer to the online help system
● Porting application code and projects created with a previous ARM® IAR
Embedded Workbench IDE, refer to the ARM® IAR Embedded Workbench
Migration Guide.
Online versions of these guides are delivered on the installation media and available
from the Help menu in the IAR Embedded Workbench. Some of them are also
delivered as printed books.

Document conventions
This guide uses the following typographic conventions:
Style Used for

computer Text that you enter or that appears on the screen.

parameter A label representing the actual value you should enter as part of a
command.
[option] An optional part of a command.
{option} A mandatory part of a command.
a | b | c Alternatives in a command.
Table 1: Typographic conventions used in this guide

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 Preface

Style Used for

bold Names of menus, menu commands, buttons, and dialog boxes that
appear on the screen.
reference A cross-reference within or to another part of this guide.
… An ellipsis indicates that the previous item can be repeated an arbitrary
number of times.
Identifies instructions specific to the versions of the IAR Systems tools
for the IAR Embedded Workbench interface.
Identifies instructions specific to the command line versions of IAR
Systems development tools.
Table 1: Typographic conventions used in this guide (Continued)

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Document conventions

ARM® IAR Assembler

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AARM-7
 Introduction to the ARM
IAR Assembler
This chapter describes the source code format for the ARM IAR Assembler
and provides programming hints.
Refer to Advanced RISC Machines Ltd’s hardware documentation for syntax
descriptions of the instruction mnemonics.

Source format
The format of an assembler source line is as follows:
[label [:]] [operation] [operands] [; comment]
where the components are as follows:

label A label, which is assigned the value and type of the current
program location counter (PLC). The : (colon) is optional if the
label starts in the first column. When using inline assembler in a
C/C++ program, the colon is mandatory.

operation An assembler instruction or directive. This must not start in the

first column.

operands A list of operands, separated by commas.

comment Comment, preceded by a ; (semicolon).

The fields can be separated by spaces or tabs.

A source line may not exceed 2047 characters.
Tab characters, ASCII 09H, are expanded according to the most common practice, that
is, to columns 8, 16, 24 etc.
The ARM IAR Assembler uses the default file extensions s79, asm, and msa for
source files.

AARM-7
Assembler expressions

Assembler expressions
Expressions can consist of operands and operators. The assembler will accept a wide
range of expressions, including both arithmetic and logical operations. All operators
use 32-bit two’s complement integers, and range checking is only performed when a
value is used for generating code.
Expressions are evaluated from left to right, unless this order is overridden by the
priority of operators; see also Precedence of operators, page 23.
The following operands are valid in an expression:
● User-defined symbols and labels.
● Constants, excluding floating-point constants.
● The program location counter (PLC) symbol, . (period).
These are described in greater detail in the following sections.
The valid operators are described in the chapter Assembler operators, page 23.

TRUE AND FALSE

In expressions a zero value is considered FALSE, and a non-zero value is considered
TRUE.
Conditional expressions return the value 0 for FALSE and 1 for TRUE.

USING SYMBOLS IN RELOCATABLE EXPRESSIONS

Expressions that include symbols in relocatable segments cannot be resolved at
assembly time, because they depend on the location of segments.
Such expressions are evaluated and resolved at link time, by the IAR XLINK
Linker™. There are no restrictions on the expression; any operator can be used on
symbols from any segment, or any combination of segments.

For example, a program could define the segments DATASEG and CODESEG as
follows:
EXTERN third
RSEG DATASEG : DATA (2)
first: DATA
second: DC32 4
Then in the segment CODESEG the following instructions are legal:
RSEG CODESEG : CODE (2)
CODE32
; DATASEG must be linked in the range 0-255,
; otherwise the immediate values #first etc.

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 Introduction to the ARM IAR Assembler

; will be out of range

MOV R1,#first
MOV R2,#second
MOV R3,#third
MOV R1, R1, LSL #3
MOV R1, R1, LSR #3
MOV R1, R1, ASR #3
MOV R1, R1, ROR #3
MOV R1, R2
LDR R1,=first
LDR R2,=second
LDR R3,=third
LDR R1, [R2,#-1000]
LDR R1, [R2,-R3]
LDR R1, [R2,-R3, LSL #2]
LDR R1, [R2,-R3, LSR #2]
LDR R1, [R2,-R3, ASR #2]
LDR R1, [R2,-R3, ROR #2]
LDR R1, [R2,-R3, RRX]
END
Note: At assembly time, there will be no range check. The range check will occur at
link time and, if the values are too large, there will be a linker error.

SYMBOLS
User-defined symbols can be up to 255 characters long, and all characters are
significant.
Symbols must begin with a letter, a–z or A–Z, ? (question mark), or _ (underscore).
They can include the digits 0–9 and $ (dollar).
Symbols may contain any printable characters if they are quoted with ` (backquote).
For example:
`strange#label`
For built-in symbols like instructions, registers, operators, and directives, case is
insignificant. For user-defined symbols case is by default significant but can be turned
on and off using the Case sensitive user symbols (-s) assembler option. See page 19
for additional information.

LABELS
Symbols used for memory locations are referred to as labels.

AARM-7
Assembler expressions

Program location counter (PLC)

The program location counter is called . (period). For example:
CODE32
B . ; Loop forever
END
Bit 0 will not be set on the program location counter.

INTEGER CONSTANTS
Since all IAR Systems assemblers use 32-bit two’s complement internal arithmetic,
integers have a (signed) range from -2147483648 to 2147483647.
Constants are written as a sequence of digits with an optional - (minus) sign in front
to indicate a negative number. Commas and decimal points are not permitted.
The following types of number representation are supported:
Integer type Example
Binary 1010b, b'1010'
Octal 1234q, q'1234'
Decimal 1234, -1, d'1234'
Hexadecimal 0FFFFh, 0xFFFF, h'FFFF'
Table 2: Integer constant formats

Note: Both the prefix and the suffix can be written with either uppercase or lowercase
letters.

ASCII CHARACTER CONSTANTS

ASCII constants can consist of between zero and more characters enclosed in single
or double quotes. Only printable characters and spaces may be used in ASCII strings.
If the quote character itself is to be accessed, two consecutive quotes must be used:
Format Value
'ABCD' ABCD (four characters).
"ABCD" ABCD'\0' (five characters the last ASCII null).
'A''B' A'B
'A''' A'
'''' (4 quotes) '
'' (2 quotes) Empty string (no value).
"" Empty string (an ASCII null character).
Table 3: ASCII character constant formats

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 Introduction to the ARM IAR Assembler

Format Value
\' '
\\ \
Table 3: ASCII character constant formats

FLOATING-POINT CONSTANTS
The ARM IAR Assembler will accept floating-point values as constants and convert
them into IEEE single-precision (signed 64-bit) floating-point format or fractional
format.
Floating-point numbers can be written in the format:
[+|-][digits].[digits][{E|e}[+|-]digits]
The following table shows some valid examples:
Format Value
10.23 1.023 x 101
1.23456E-24 1.23456 x 10-24
1.0E3 1.0 x 103
Table 4: Floating-point constants

Spaces and tabs are not allowed in floating-point constants.

Note: Floating-point constants will not give meaningful results when used in
expressions.

PREDEFINED SYMBOLS
The ARM IAR Assembler defines a set of symbols for use in assembler source files.
The symbols provide information about the current assembly, allowing you to test
them in preprocessor directives or include them in the assembled code. The strings
returned by the assembler are enclosed in double quotes.
The following predefined symbols are available:
Symbol Value
__ARMVFP__ Identifies whether floating-point instructions for a vector
floating-point coprocessor have been enabled or not,
--fpu. Expands to the number 1 for VFPv1, and to the
number 2 for VFPv2. If floating-point instructions are
disabled (default), the symbol is undefined.
Table 5: Predefined symbols

AARM-7
Assembler expressions

Symbol Value
__BUILD_NUMBER__ A unique integer that identifies the build number of the
assembler currently in use. The build number does not
necessarily increase with an assembler that is released later.
__DATE__ Current date in dd/Mmm/yyyy format (string).
__FILE__ Current source filename (string).
__IAR_SYSTEMS_ASM__ IAR assembler identifier (number).
__LINE__ Current source line number (number).
__LITTLE_ENDIAN__ Identifies the byte order in use. Expands to the number 1
when the code is compiled with the little-endian byte order,
and to the number 0 when big-endian code is generated.
Little-endian is the default.
__SUBVERSION__ An integer that identifies the version letter of the version
number, for example the C in 4.21C, as an ASCII character.
__TID__ Target identity, consisting of two bytes (number). The high
byte is the target identity, which is 0x4F (=decimal 79) for
the ARM IAR Assembler. The low byte is not used.
__TIME__ Current time in hh:mm:ss format (string).
__VER__ Version number in integer format; for example, version
4.17 is returned as 417 (number).
Table 5: Predefined symbols (Continued)

In addition, predefined symbols are defined that allow you to identify the core you are
assembling for, for example __ARM5__ and __CORE__. For more details, see the
ARM® IAR C/C++ Compiler Reference Guide.

Including symbol values in code

To include a symbol value in the code, you use the symbol in one of the data definition
directives.
For example, to include the time of assembly as a string for the program to display:

EXTERN printstr

DATA
tim DC8 __TIME__ ; time string

CODE32
ADR R0, tim ; load address of string
BL printstr ; routine to print string
END

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 Introduction to the ARM IAR Assembler

Testing symbols for conditional assembly

To test a symbol at assembly time, you use one of the conditional assembly directives.
For example, if you have assembler source files intended for use with different
assemblers, you may want to test that the code is appropriate for a specific assembler.
You could do this using the __IAR_SYSTEMS_ASM__ symbol as follows:

#ifdef __IAR_SYSTEMS_ASM__
...
#else
...
#endif

Register symbols
The following table shows the existing predefined register symbols:
Name Address size Description
R0–R12 32 bits General purpose registers
R13 (SP) 32 bits Stack pointer
R14 (LR) 32 bits Link register
R15 (PC) 32 bits Program counter
CPSR 32 bits Current program status register
SPSR 32 bits Saved process status register
Table 6: Predefined register symbols

In addition, specific cores may allow you to use other register symbols, for example
APSR for the Cortex-M3, if required by the instruction syntax.
Notice that only consecutive registers can be specified in register pairs. The upper odd
register should be entered to the left of the colon, and the lower even register to the
right.

Programming hints
This section gives hints on how to write efficient code for the ARM IAR Assembler.
For information about projects including both assembler and C/C++ source files, see
the ARM® IAR C/C++ Compiler Reference Guide.

AARM-7
Output formats

ACCESSING SPECIAL FUNCTION REGISTERS

Specific header files for a number of ARM derivatives are included in the IAR product
package, in the \arm\inc directory. These header files are named iochip.h and
define the processor-specific special function registers (SFRs).
Since the header files are also intended to be used with the ARM IAR C/C++
Compiler, ICCARM, the SFR declarations are made with macros. The macros that
convert the declaration to assembler or compiler syntax are defined in the
io_macros.h file.
The header files are also suitable to use as templates, when creating new header files
for other ARM derivatives.

Example
The USART write address 0xFFFD0000 of the ARM7TDMI core is defined in the
ioat91m40400.h file as:
__IO_REG32_BIT(__US_CR,0xfffd0000,__WRITE,__usartcr_bits)
The declaration is converted by macros defined in the file io_macros.h to:
__US_CR DEFINE 0xfffd0000
If any assembler-specific additions are needed in the header file, these can be added
easily in the assembler-specific part of the file:
#ifdef __IAR_SYSTEMS_ASM__
(assembler-specific defines)
#endif

USING C-STYLE PREPROCESSOR DIRECTIVES

The C-style preprocessor directives are processed before other assembler directives.
Therefore, do not use preprocessor directives in macros and do not mix them with
assembler-style comments.

Output formats
The relocatable and absolute output is in the same format for all IAR assemblers,
because object code is always intended for processing with the IAR XLINK Linker.
In absolute formats the output from XLINK is, however, normally compatible with the
chip vendor’s debugger programs (monitors), as well as with PROM programmers
and stand-alone emulators from independent sources.

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 Assembler options
This chapter first explains how to set the options from the command line, and
gives an alphabetical summary of the assembler options. It then provides
detailed reference information for each assembler option.
The ARM® IAR Embedded Workbench® IDE User Guide describes how to set
assembler options in the IAR Embedded Workbench, and gives reference
information about the available options.

Setting assembler options

To set assembler options from the command line, you include them on the command
line, after the aarm command:
aarm [options] [sourcefile] [options]
These items must be separated by one or more spaces or tab characters.
If all the optional parameters are omitted the assembler will display a list of available
options a screenful at a time. Press Enter to display the next screenful.
For example, when assembling the source file power2.s79, use the following
command to generate a list file to the default filename (power2.lst):
aarm power2 -L
Some options accept a filename, included after the option letter with a separating
space. For example, to generate a list file with the name list.lst:
aarm power2 -l list.lst
Some other options accept a string that is not a filename. This is included after the
option letter, but without a space. For example, to generate a list file to the default
filename but in the subdirectory named list:
aarm power2 -Llist\
Note: The subdirectory you specify must already exist. The trailing backslash is
required because the parameter is prepended to the default filename.

EXTENDED COMMAND LINE FILE

In addition to accepting options and source filenames from the command line, the
assembler can accept them from an extended command line file.

AARM-7
Setting assembler options

By default, extended command line files have the extension xcl, and can be specified
using the -f command line option. For example, to read the command line options
from extend.xcl, enter:
aarm -f extend.xcl

Error return codes

When using the ARM IAR Assembler from within a batch file, you may need to
determine whether the assembly was successful in order to decide what step to take
next. For this reason, the assembler returns the following error return codes:
Return code Description

0 Assembly successful, warnings may appear

1 There were warnings (only if the -ws option is used)
2 There were errors
Table 7: Assembler error return codes

ASSEMBLER ENVIRONMENT VARIABLES

Options can also be specified using the ASMARM environment variable. The assembler
appends the value of this variable to every command line, so it provides a convenient
method of specifying options that are required for every assembly.
The following environment variables can be used with the ARM IAR Assembler:
Environment variable Description

ASMARM Specifies command line options; for example:

set ASMARM=-L -ws
AARM_INC Specifies directories to search for include files; for example:
set AARM_INC=c:\myinc\
Table 8: Asssembler environment variables

For example, setting the following environment variable will always generate a list
file with the name temp.lst:
ASMARM=-l temp.lst
For information about the environment variables used by the IAR XLINK Linker and
the IAR XLIB Librarian, see the IAR Linker and Library Tools Reference Guide.

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 Assembler options

Summary of assembler options

The following table summarizes the assembler options available from the command
line:
Command line option Description

-B Macro execution information

-c{DMEAO} Conditional list
--cpu Core configuration
-Dsymbol[=value] Defines a symbol
-Enumber Maximum number of errors
-e Generate code in big-endian byte order
--endian{little|l|big|b} Specifies byte order
-f extend.xcl Extends the command line
--fpu Selects the type of floating-point unit
-G Opens standard input as source
-Iprefix Includes paths
-i #included text
-j Enable alternative register names, mnemonics, and
operators
-L[prefix] Lists to prefixed source name
-l filename Lists to named file
-Mab Macro quote characters
-N Omit header from assembler listing
-n Enables support for multibyte characters
-Oprefix Sets object filename prefix
-o filename Sets object filename
-plines Lines/page
-r Generates debug information
-S Set silent operation
-s{+|-} Case sensitive user symbols
-tn Tab spacing
-Usymbol Undefines a symbol
-w[string][s] Disables warnings
Table 9: Assembler options summary

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Descriptions of assembler options

Command line option Description

-x{DI2} Includes cross-references

Table 9: Assembler options summary (Continued)

Descriptions of assembler options

The following sections give full reference information about each assembler option.

-B -B
Use this option to make the assembler print macro execution information to the
standard output stream on every call of a macro. The information consists of:
● The name of the macro
● The definition of the macro
● The arguments to the macro
● The expanded text of the macro.
This option is mainly used in conjunction with the list file options -L or -l; for
additional information, see page 16.
This option is identical to the Macro execution info option in the Assembler category
in the IAR Embedded Workbench.

-c -c{DMEAO}
Use this option to control the contents of the assembler list file. This option is mainly
used in conjunction with the list file options -L and -l; see page 16 for additional
information.
The following table shows the available parameters:
Command line option Description

-cD Disable list file

-cM Macro definitions
-cE No macro expansions
-cA Assembled lines only
-cO Multiline code
Table 10: Conditional list (-c)

This option is related to the List options in the Assembler category in the
IAR Embedded Workbench.

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--cpu --cpu target_core

Use the --cpu option to specify the target core and get the correct instruction set.
Valid values for target_core are values such as ARM7TDMI and architecture
versions, e.g. 4T. ARM7TDMI is the default.

-D Dsymbol[=value]
Use this option to define a preprocessor symbol with the name symbol and the value
value. If no value is specified, 1 is used.
The -D option allows you to specify a value or choice on the command line instead of
in the source file.

Example
For example, you could arrange your source to produce either the test or production
version of your program dependent on whether the symbol testver was defined. To
do this, use include sections such as:
#ifdef testver
... ; additional code lines for test version only
#endif
Then select the version required in the command line as follows:
production version: aarm prog
test version: aarm prog -Dtestver
Alternatively, your source might use a variable that you need to change often. You can
then leave the variable undefined in the source, and use -D to specify the value on the
command line; for example:
aarm prog -Dframerate=3
This option is identical to the #define option in the Assembler category in the
IAR Embedded Workbench.

-E -Enumber
This option specifies the maximum number of errors that the assembler report will
report.
By default, the maximum number is 100. The -E option allows you to decrease or
increase this number to see more or fewer errors in a single assembly.
This option is identical to the Max number of errors option in the Assembler
category in the IAR Embedded Workbench.

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Descriptions of assembler options

-e -e
This option causes the assembler to generate code and data in big-endian byte order.
The default byte order is little-endian.
This option is related to the Target options in the General Options category in the
IAR Embedded Workbench.

--endian --endian
This option specifies the byte order of the generated code and data.

-f -f extend.xcl
This option extends the command line with text read from the file named
extend.xcl. Notice that there must be a space between the option itself and the
filename.
The -f option is particularly useful where there is a large number of options which
are more conveniently placed in a file than on the command line itself.

Example
To run the assembler with further options taken from the file extend.xcl, use:
aarm prog -f extend.xcl

--fpu --fpu={VFPv1|VFPv2|VFP9-S|none}
Use the --fpu option to specify the target floating-point coprocessor to get the correct
instruction set.
The following parameters are available:

VFPv1 A vector floating-point unit conforming to the VFPv1 architecture,

such as the VFP10 rev 0.

VFPv2 A system that implements a VFP unit conforming to the VFPv2

architecture, such as the VFP10 rev 1.
VFP9-S VFP9-S, an implementation of the VFPv2 architecture that can be
used with the ARM9E family of CPU cores. Selecting the VFP9-S
coprocessor is therefore identical to selecting the VFPv2
architecture.

none (default) The software floating-point library is used.

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 Assembler options

The --fpu option is automatically set if you use the --cpu option to select a target
core that has a floating-point unit.

-G -G
This option causes the assembler to read the source from the standard input stream,
rather than from a specified source file.
When -G is used, no source filename may be specified.

-I -Iprefix
Use this option to specify paths to be used by the preprocessor by adding the
#include file search prefix prefix.
By default, the assembler searches for #include files only in the current working
directory and in the paths specified in the AARM_INC environment variable. The -I
option allows you to give the assembler the names of directories where it will also
search if it fails to find the file in the current working directory.

Example
Using the options:
-Ic:\global\ -Ic:\thisproj\headers\
and then writing:
#include "asmlib.hdr"
in the source, will make the assembler search first in the current directory, then in the
directory c:\global\, and finally in the directory c:\thisproj\headers\
provided that the AARM_INC environment variable is set.
This option is related to the #include option in the Assembler category in the
IAR Embedded Workbench.

-i -i
Includes #include files in the list file.
By default, the assembler does not list #include file lines since these often come
from standard files and would waste space in the list file. The -i option allows you to
list these file lines.
This option is related to the #include option in the Assembler category in the
IAR Embedded Workbench.

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Descriptions of assembler options

-j -j
Enables alternative register names, mnemonics, and operators in order to increase
compatibility with other assemblers and allow porting of code.
For additional information, see Operator synonyms, page 25, and the chapter
Migrating to the ARM IAR Assembler.
This option is identical to the Allow alternative register names, mnemonics and
operands option in the Assembler category in the IAR Embedded Workbench.

-L -L[prefix]
By default the assembler does not generate a list file. Use this option to make the
assembler generate one and sent it to file [prefix]sourcename.lst.
To simply generate a listing, use the -L option without a prefix. The listing is sent to
the file with the same name as the source, but the extension will be lst.
The -L option lets you specify a prefix, for example to direct the list file to a
subdirectory. Notice that you must not include a space before the prefix.
-L may not be used at the same time as -l.

Example
To send the list file to list\prog.lst rather than the default prog.lst:
aarm prog -Llist\
This option is related to the List options in the Assembler category in the
IAR Embedded Workbench.

-l -l filename
Use this option to make the assembler generate a listing and send it to the file
filename. If no extension is specified, lst is used. Notice that you must include a
space before the filename.
By default, the assembler does not generate a list file. The -l option generates a
listing, and directs it to a specific file. To generate a list file with the default filename,
use the -L option instead.
This option is related to the List options in the Assembler category in the
IAR Embedded Workbench.

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 Assembler options

-M -Mab
This option sets the characters to be used as left and right quotes of each macro
argument to a and b respectively.
By default, the characters are < and >. The -M option allows you to change the quote
characters to suit an alternative convention or simply to allow a macro argument to
contain < or > themselves.

Example
For example, using the option:
-M[]
in the source you would write, for example:
print [>]
to call a macro print with > as the argument.
Note: Depending on your host environment, it may be necessary to use quote marks
with the macro quote characters, for example:
aarm filename -M’<>’
This option is identical to the Macro quote chars option in the Assembler category
in the IAR Embedded Workbench.

-N -N
Use this option to omit the header section that is printed by default in the beginning of
the list file.
This option is useful in conjunction with the list file options -L or -l; see page 16 for
additional information.
This option is related to the List file option in the Assembler category in the
IAR Embedded Workbench.

-n -n

By default, multibyte characters cannot be used in assembler source code. If you use this
option, multibyte characters in the source code are interpreted according to the host
computer’s default setting for multibyte support.
Multibyte characters are allowed in C and C++ style comments, in string literals, and in
character constants. They are transferred untouched to the generated code.

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Descriptions of assembler options

Project>Options>Assembler >Language>Enable multibyte support

-O -Oprefix
Use this option to set the prefix to be used on the name of the object file. Notice that
you must not include a space before the prefix.
By default the prefix is null, so the object filename corresponds to the source filename
(unless -o is used). The -O option lets you specify a prefix, for example to direct the
object file to a subdirectory.
Notice that -O may not be used at the same time as -o.

Example
To send the object code to the file obj\prog.r79 rather than to the default file
prog.r79:
aarm prog -Oobj\
This option is related to the Output directories option in the General Options
category in the IAR Embedded Workbench.

-o -o filename
This option sets the filename to be used for the object file. Notice that you must
include a space before the filename. If no extension is specified, r79 is used.
The option -o may not be used at the same time as the option -O.

Example
For example, the following command puts the object code to the file obj.r79 instead
of the default prog.r79:
aarm prog -o obj
Notice that you must include a space between the option itself and the filename.
This option is related to the filename and directory that you specify when creating a
new source file or project in the IAR Embedded Workbench.

-p -plines
The -p option sets the number of lines per page to lines, which must be in the range
10 to 150.

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 Assembler options

This option is used in conjunction with the list options -L or -l; see page 16 for
additional information.
This option is identical to the Lines/page option in the Assembler category in the
IAR Embedded Workbench.

-r -r
The -r option makes the assembler generate debug information that allows a
symbolic debugger such as the IAR C-SPY Debugger to be used on the program.
To reduce the size and link time of the object file, the assembler does not generate debug
information by default.
Project>Options>Assembler >Output>Generate debug information

-S -S
The -S option causes the assembler to operate without sending any messages to the
standard output stream.
By default, the assembler sends various insignificant messages via the standard output
stream. Use the -S option to prevent this.
The assembler sends error and warning messages to the error output stream, so they
are displayed regardless of this setting.

-s -s{+|-}
Use the -s option to control whether the assembler is sensitive to the case of user
symbols:
Command line option Description

-s+ Case sensitive user symbols

-s- Case insensitive user symbols
Table 11: Controlling case sensitivity in user symbols (-s)

By default, case sensitivity is on. This means that, for example, LABEL and label
refer to different symbols. Use -s- to turn case sensitivity off, in which case LABEL
and label will refer to the same symbol.
This option is identical to the Case sensitive user symbols option in the Assembler
category in the IAR Embedded Workbench.

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Descriptions of assembler options

-t -tn
By default the assembler sets 8 character positions per tab stop. The -t option allows
you to specify a tab spacing to n, which must be in the range 2 to 9.
This option is useful in conjunction with the list options -L or -l; see page 16 for
additional information.
This option is identical to the Tab spacing option in the Assembler category in the
IAR Embedded Workbench.

-U -Usymbol
Use the -U option to undefine the predefined symbol symbol.
By default, the assembler provides certain predefined symbols; see Predefined
symbols, page 5. The -U option allows you to undefine such a predefined symbol to
make its name available for your own use through a subsequent -D option or source
definition.

Example
To use the name of the predefined symbol _ _TIME_ _ for your own purposes, you
could undefine it with:
aarm prog -U _ _TIME_ _
This option is identical to the #undef option in the Assembler category in the
IAR Embedded Workbench.

-w -w[string][s]
By default, the assembler displays a warning message when it detects an element of
the source which is legal in a syntactical sense, but may contain a programming error;
see Assembler diagnostics, page 109, for details.
Use this option to disable warnings. The -w option without a range disables all
warnings. The -w option with a range performs the following:
Command line option Description

-w+ Enables all warnings.

-w- Disables all warnings.
-w+n Enables just warning n.
-w-n Disables just warning n.
Table 12: Disabling assembler warnings (-w)

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Command line option Description

-w+m-n Enables warnings m to n.

-w-m-n Disables warnings m to n.
Table 12: Disabling assembler warnings (-w) (Continued)

Only one -w option may be used on the command line.

By default, the assembler generates exit code 0 for warnings. Use the -ws option to
generate exit code 1 if a warning message is produced.

Example
To disable just warning 0 (unreferenced label), use the following command:
aarm prog -w-0
To disable warnings 0 to 8, use the following command:
aarm prog -w-0-8
This option is identical to the Warnings option in the Assembler category in the
IAR Embedded Workbench.

-x -x{DI2}
Use this option to make the assembler include a cross-reference table at the end of the
list file.
This option is useful in conjunction with the list options -L or -l; see page 16 for
additional information.
The following parameters are available:
Command line option Description

-xD #defines
-xI Internal symbols
-x2 Dual line spacing
Table 13: Including cross-references in assembler list file (-x)

This option is identical to the Include cross-reference option in the Assembler

category in the IAR Embedded Workbench.

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 Assembler operators
This chapter first describes the precedence of the assembler operators, and
then summarizes the operators, classified according to their precedence.
Finally, this chapter provides reference information about each operator,
presented in alphabetical order.

Precedence of operators
Each operator has a precedence number assigned to it that determines the order in
which the operator and its operands are evaluated. The precedence numbers range
from 1 (the highest precedence, i.e. first evaluated) to 7 (the lowest precedence, i.e.
last evaluated).
The following rules determine how expressions are evaluated:
● The highest precedence operators are evaluated first, then the second highest
precedence operators, and so on until the lowest precedence operators are
evaluated.
● Operators of equal precedence are evaluated from left to right in the expression.
● Parentheses ( and ) can be used for grouping operators and operands and for
controlling the order in which the expressions are evaluated. For example, the
following expression evaluates to 1:
7/(1+(2*3))

Summary of assembler operators

The following tables give a summary of the operators, in order of priority. Synonyms,
where available, are shown in brackets after the operator name.

UNARY OPERATORS – 1
+ Unary plus.
– Unary minus.
! Logical NOT.
~ Bitwise NOT.
LOW Low byte.
HIGH High byte.
BYTE1 First byte.

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Summary of assembler operators

BYTE2 Second byte.

BYTE3 Third byte.
BYTE4 Fourth byte
LWRD Low word.
HWRD High word.
DATE Current time/date.
SFB Segment begin.
SFE Segment end.
SIZEOF Segment size.

MULTIPLICATIVE ARITHMETIC OPERATORS – 2

* Multiplication.
/ Division.
% Modulo.

ADDITIVE ARITHMETIC OPERATORS – 3

+ Addition.
– Subtraction.

SHIFT OPERATORS – 4
>> Logical shift right.
<< Logical shift left.

AND OPERATORS – 5
&& Logical AND.
& Bitwise AND.

OR OPERATORS – 6
|| Logical OR.
| Bitwise OR.
XOR Logical exclusive OR.
^ Bitwise exclusive OR.

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COMPARISON OPERATORS – 7
=, == Equal.
<>, != Not equal.
> Greater than.
< Less than.
UGT Unsigned greater than.
ULT Unsigned less than.
>= Greater than or equal.
<= Less than or equal.

OPERATOR SYNONYMS
A number of operator synonyms have been defined for compatibility with other
assemblers. The operator synonyms are enabled by the option -j. For details, see the
chapter Migrating to the ARM IAR Assembler.
Operator synonym Operator Function

:AND: & Bitwise AND

:EOR: ^ Bitwise exclusive OR
:LAND: && Logical AND
:LEOR: XOR Logical exclusive OR
:LNOT: ! Logical NOT
:LOR: || Logical OR
:MOD: % Modulo
:NOT: ~ Bitwise NOT
:OR: | Bitwise OR
:SHL: << Logical shift left
:SHR: >> Logical shift right
Table 14: Operator synonyms

Note: The ARM operators and the operator synonyms may have different precedence.
For more information about the precedence of the operators and their synonyms, see
the following reference sections. See also the chapter Migrating to the ARM IAR
Assembler.

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Descriptions of operators

Descriptions of operators
The following sections give detailed descriptions of each assembler operator. See
Assembler expressions, page 2, for related information.

* Multiplication (2).

* produces the product of its two operands. The operands are taken as signed 32-bit
integers and the result is also a signed 32-bit integer.

Examples
2*2 → 4
-2*2 → -4

+ Unary plus (1).

Unary plus operator.

Examples
+3 → 3
3*+2 → 6

+ Addition (3).

The + addition operator produces the sum of the two operands which surround it. The
operands are taken as signed 32-bit integers and the result is also a signed 32-bit
integer.

Examples
92+19 → 111
-2+2 → 0
-2+-2 → -4

– Unary minus (1).

The unary minus operator performs arithmetic negation on its operand.

The operand is interpreted as a 32-bit signed integer and the result of the operator is
the two’s complement negation of that integer.

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– Subtraction (3).

The subtraction operator produces the difference when the right operand is taken away
from the left operand. The operands are taken as signed 32-bit integers and the result
is also signed 32-bit integer.

Examples
92-19 → 73
-2-2 → -4
-2--2 → 0

/ Division (2).

/ produces the integer quotient of the left operand divided by the right operator. The
operands are taken as signed 32-bit integers and the result is also a signed 32-bit
integer.

Examples
9/2 → 4
-12/3 → -4
9/2*6 → 24

< Less than (7).

< evaluates to 1 (true) if the left operand has a lower numeric value than the right
operand.

Examples
-1 < 2 → 1
2 < 1 → 0
2 < 2 → 0

<= Less than or equal (7)

<= evaluates to 1 (true) if the left operand has a lower or equal numeric value to the
right operand.

Examples
1 <= 2 → 1
2 <= 1 → 0
1 <= 1 → 1

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Descriptions of operators

<>, != Not equal (7).

<> evaluates to 0 (false) if its two operands are identical in value or to 1 (true) if its
two operands are not identical in value.

Examples
1 <> 2 → 1
2 <> 2 → 0
'A' <> 'B' → 1

=, == Equal (7).

= evaluates to 1 (true) if its two operands are identical in value, or to 0 (false) if its two
operands are not identical in value.

Examples
1 = 2 → 0
2 == 2 → 1
'ABC' = 'ABCD' → 0

> Greater than (7).

> evaluates to 1 (true) if the left operand has a higher numeric value than the right
operand.

Examples
-1 > 1 → 0
2 > 1 → 1
1 > 1 → 0

>= Greater than or equal (7).

>= evaluates to 1 (true) if the left operand is equal to or has a higher numeric value
than the right operand.

Examples
1 >= 2 → 0
2 >= 1 → 1
1 >= 1 → 1

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 Assembler operators

&& (:LAND:) Logical AND (5).

Use && to perform logical AND between its two integer operands. If both operands
are non-zero the result is 1; otherwise it is zero.
Note: The precedence of :LAND: is 8.

Examples
B’1010 && B’0011 → 1
B’1010 && B’0101 → 1
B’1010 && B’0000 → 0

& (:AND:) Bitwise AND (5).

Use & to perform bitwise AND between the integer operands.

Note: The precedence of :AND: is 3.

Examples
B’1010 & B’0011 → B’0010
B’1010 & B’0101 → B’0000
B’1010 & B’0000 → B’0OOO

~ (:NOT:) Bitwise NOT (1).

Use ~ to perform bitwise NOT on its operand.

Examples
~ B’1010 → B’11111111111111111111111111110101

| (:OR:) Bitwise OR (6).

Use | to perform bitwise OR on its operands.

Note: The precedence of :OR: is 3.

Examples
B’1010 | B’0101 → B’1111
B’1010 | B’0000 → B’1010

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Descriptions of operators

^ (:EOR:) Bitwise exclusive OR (6).

Use ^ to perform bitwise XOR on its operands.

Note: The precedence of :EOR: is 3.

Examples
B’1010 ^ B’0101 → B’1111
B’1010 ^ B’0011 → B’1001

BYTE1 First byte (1).

BYTE1 takes a single operand, which is interpreted as an unsigned 32-bit integer value.
The result is the unsigned, 8-bit integer value of the lower order byte of the operand.

Examples
BYTE1 0xABCD → 0xCD

BYTE2 Second byte (1).

BYTE2 takes a single operand, which is interpreted as an unsigned 32-bit integer value.
The result is the middle-low byte (bits 15 to 8) of the operand.

Examples
BYTE2 0x12345678 → 0x56

BYTE3 Third byte (1).

BYTE3 takes a single operand, which is interpreted as an unsigned 32-bit integer value.
The result is the middle-high byte (bits 23 to 16) of the operand.

Examples
BYTE3 0x12345678 → 0x34

BYTE4 Fourth byte (1).

BYTE4 takes a single operand, which is interpreted as an unsigned 32-bit integer value.
The result is the middle-high byte (bits 23 to 16) of the operand.

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Examples
BYTE4 0x12345678 → 0x12

DATE Current time/date (1).

Use the DATE operator to specify when the current assembly began.
The DATE operator takes an absolute argument (expression) and returns:

DATE 1 Current second (0–59).

DATE 2 Current minute (0–59).
DATE 3 Current hour (0–23).
DATE 4 Current day (1–31).
DATE 5 Current month (1–12).
DATE 6 Current year MOD 100 (1998 →98, 2000 →00, 2002 →02).

Examples
To assemble the date of assembly:
today: DC8 DATE 5, DATE 4, DATE 3

HIGH High byte (1).

HIGH takes a single operand to its right which is interpreted as an unsigned, 16-bit
integer value. The result is the unsigned 8-bit integer value of the higher order byte of
the operand.

Examples
HIGH 0xABCD → 0xAB

HWRD High word (1).

HWRD takes a single operand, which is interpreted as an unsigned, 32-bit integer value.
The result is the high word (bits 31 to 16) of the operand.

Examples
HWRD 0x12345678 → 0x1234

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LOW Low byte (1).

LOW takes a single operand, which is interpreted as an unsigned, 32-bit integer value.
The result is the unsigned, 8-bit integer value of the lower order byte of the operand.

Examples
LOW 0xABCD → 0xCD

LWRD Low word (1).

LWRD takes a single operand, which is interpreted as an unsigned, 32-bit integer value.
The result is the low word (bits 15 to 0) of the operand.

Examples
LWRD 0x12345678 → 0x5678

%(:MOD:) Modulo (2).

% produces the remainder from the integer division of the left operand by the right
operand. The operands are taken as signed 32-bit integers and the result is also a
signed 32-bit integer.
X % Y is equivalent to X-Y*(X/Y) using integer division.

Examples
2 % 2 → 0
12 % 7 → 5
3 % 2 → 1

! (:LNOT:) Logical NOT (1).

Use ! to negate a logical argument.

Examples
! B’0101 → 0
! B’0000 → 1

|| (:LOR:) Logical OR (6).

Use || to perform a logical OR between two integer operands.

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 Assembler operators

Examples
B’1010 || B’0000 → 1
B’0000 || B’0000 → 0

SFB Segment begin (1).

Syntax
SFB(segment [{+ | -} offset])

Parameters
segment The name of a relocatable segment, which must be defined before
SFB is used.
offset An optional offset from the start address. The parentheses are
optional if offset is omitted.

Description
SFB accepts a single operand to its right. The operand must be the name of a
relocatable segment.
The operator evaluates to the absolute address of the first byte of that segment. This
evaluation takes place at linking time.

Examples
NAME demo
RSEG CODE
start: DC16 SFB(CODE)
Even if the above code is linked with many other modules, start will still be set to
the address of the first byte of the segment.

SFE Segment end (1).

Syntax
SFE (segment [{+ | -} offset])

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Descriptions of operators

Parameters
segment The name of a relocatable segment, which must be defined before
SFE is used.
offset An optional offset from the start address. The parentheses are
optional if offset is omitted.

Description
SFE accepts a single operand to its right. The operand must be the name of a
relocatable segment. The operator evaluates to the segment start address plus the
segment size. This evaluation takes place at linking time.

Examples
NAME demo
RSEG CODE
;...
RSEG CONST
end: DC32 SFE(CODE)
Even if the above code is linked with many other modules, end will still be set to the
address of the last byte of the CODE segment plus one.
The size of the segment MY_SEGMENT can be calculated as:
SFE(MY_SEGMENT)-SFB(MY_SEGMENT)

<< (:SHL:) Logical shift left (4).

Use << to shift the left operand, which is always treated as unsigned, to the left. The
number of bits to shift is specified by the right operand, interpreted as an integer value
between 0 and 32.

Examples
B’00011100 << 3 → B’11100000
B’00000111111111111 << 5 → B’11111111111100000
14 << 1 → 28

>> (:SHR:) Logical shift right (4).

Use >> to shift the left operand, which is always treated as unsigned, to the right.
The number of bits to shift is specified by the right operand, interpreted as an integer
value between 0 and 32.

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Note: The precedence of :SHR: is 2.5.

Examples
B’01110000 >> 3 → B’00001110
B’1111111111111111 >> 20 → 0
14 >> 1 → 7

SIZEOF Segment size (1).

Syntax
SIZEOF segment

Parameters
segment The name of a relocatable segment, which must be defined
before SIZEOF is used.

Description
SIZEOF generates SFE-SFB for its argument, which should be the name of a
relocatable segment; i.e. it calculates the size in bytes of a segment. This is done when
modules are linked together.

Examples
NAME demo
RSEG CODE
size: DC16 SIZEOF CODE
sets size to the size of segment CODE.

UGT Unsigned greater than (7).

UGT evaluates to 1 (true) if the left operand has a larger value than the right operand.
The operation treats its operands as unsigned values.

Examples
2 UGT 1 → 1
-1 UGT 1 → 1

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Descriptions of operators

ULT Unsigned less than (7).

ULT evaluates to 1 (true) if the left operand has a smaller value than the right operand.
The operation treats its operands as unsigned values.

Examples
1 ULT 2 → 1
-1 ULT 2 → 0

XOR (:LEOR:) Logical exclusive OR (6).

Use XOR to perform logical XOR on its two operands.

Note: The precedence of :LEOR: is 8.

Examples
B’0101 XOR B’1010 → 0
B’0101 XOR B’0000 → 1

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 Assembler directives
This chapter gives an alphabetical summary of the assembler directives. It then
describes the syntax conventions and provides detailed reference information
for each category of directives.

Summary of directives
The following table gives a summary of all the assembler directives.
Directive Description Section

$ Includes a file. Assembler control

#define Assigns a value to a label. C-style preprocessor
#elif Introduces a new condition in a #if…#endif C-style preprocessor
block.
#else Assembles instructions if a condition is false. C-style preprocessor
#endif Ends a #if, #ifdef, or #ifndef block. C-style preprocessor
#error Generates an error. C-style preprocessor
#if Assembles instructions if a condition is true. C-style preprocessor
#ifdef Assembles instructions if a symbol is defined. C-style preprocessor
#ifndef Assembles instructions if a symbol is undefined. C-style preprocessor
#include Includes a file. C-style preprocessor
#message Generates a message on standard output. C-style preprocessor
#undef Undefines a label. C-style preprocessor
/*comment*/ C-style comment delimiter. Assembler control
// C++ style comment delimiter. Assembler control
= Assigns a permanent value local to a module. Value assignment
ALIAS Assigns a permanent value local to a module. Value assignment
ALIGNRAM Aligns the program counter by incrementing it. Segment control
ALIGNROM Aligns the program counter by inserting Segment control
zero-filled bytes.
ARM Interprets subsequent instructions as 32-bit Mode control
(ARM) instructions.
ASEG Begins an absolute segment. Segment control
Table 15: Assembler directives summary

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Summary of directives

Directive Description Section

ASEGN Begins a named absolute segment. Segment control

ASSIGN Assigns a temporary value. Value assignment
CASEOFF Disables case sensitivity. Assembler control
CASEON Enables case sensitivity. Assembler control
CFI Specifies call-frame information. Call-frame
information
CODE16 Interprets subsequent instructions as 16-bit Mode control
(Thumb) instructions.
CODE32 Interprets subsequent instructions as 32-bit Mode control
(ARM) instructions.
COL Sets the number of columns per page. Listing control
COMMON Begins a common segment. Segment control
DATA Defines an area of data within a code segment. Mode control
DC8 Generates 8-bit byte constants, including strings. Data definition or
allocation
DC16 Generates 16-bit word constants, including Data definition or
strings. allocation
DC24 Generates 24-bit word constants. Data definition or
allocation
DC32 Generates 32-bit long word constants. Data definition or
allocation
DCB Generates 8-bit byte constants, including strings. Data definition or
allocation
DCD Generates 32-bit long word constants. Data definition or
allocation
DCW Generates 16-bit word constants, including Data definition or
strings. allocation
DEFINE Defines a file-wide value. Value assignment
DF32 Generates 32-bit floats. Data definition or
allocation
DF64 Generates 64-bit floats. Data definition or
allocation
DS8 Allocates space for 8-bit bytes. Data definition or
allocation
DS16 Allocates space for 16-bit words. Data definition or
allocation
Table 15: Assembler directives summary (Continued)

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Directive Description Section

DS24 Allocates space for 24-bit words. Data definition or

allocation
DS32 Allocates space for 32-bit words. Data definition or
allocation
ELSE Assembles instructions if a condition is false. Conditional assembly
ELSEIF Specifies a new condition in an IF…ENDIF Conditional assembly
block.
END Terminates the assembly of the last module in a Module control
file.
ENDIF Ends an IF block. Conditional assembly
ENDM Ends a macro definition. Macro processing
ENDMOD Terminates the assembly of the current module. Module control
ENDR Ends a repeat structure. Macro processing
EQU Assigns a permanent value local to a module. Value assignment
EVEN Aligns the program counter to an even address. Segment control
EXITM Exits prematurely from a macro. Macro processing
EXPORT Exports symbols to other modules. Symbol control
EXTERN Imports an external symbol. Symbol control
EXTRN Imports an external symbol. Symbol control
IF Assembles instructions if a condition is true. Conditional assembly
IMPORT Imports an external symbol. Symbol control
INCLUDE Includes a file. Assembler control
LIBRARY Begins a library module. Module control
LIMIT Checks a value against limits. Value assignment
LOCAL Creates symbols local to a macro. Macro processing
LSTCND Controls conditional assembler listing. Listing control
LSTCOD Controls multi-line code listing. Listing control
LSTEXP Controls the listing of macro generated lines. Listing control
LSTMAC Controls the listing of macro definitions. Listing control
LSTOUT Controls assembler-listing output. Listing control
LSTPAG Controls the formatting of output into pages. Listing control
Table 15: Assembler directives summary (Continued)

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Directive Description Section

LSTREP Controls the listing of lines generated by repeat Listing control

directives.
LSTXRF Generates a cross-reference table. Listing control
LTORG Directs the current literal pool to be assembled Assembler control
immediately following the directive.
MACRO Defines a macro. Macro processing
MULTWEAK Exports symbols to other modules; multiple Symbol control
definitions allowed.
MODULE Begins a library module. Module control
NAME Begins a program module. Module control
ODD Aligns the program counter to an odd address. Segment control
ORG Sets the location counter. Segment control
PAGE Generates a new page. Listing control
PAGSIZ Sets the number of lines per page. Listing control
PROGRAM Begins a program module. Module control
PUBLIC Exports symbols to other modules. Symbol control
PUBWEAK Exports symbols to other modules; multiple Symbol control
definitions allowed.
RADIX Sets the default base. Assembler control
REPT Assembles instructions a specified number of Macro processing
times.
REPTC Repeats and substitutes characters. Macro processing
REPTI Repeats and substitutes strings. Macro processing
REQUIRE Forces a symbol to be referenced. Symbol control
RSEG Begins a relocatable segment. Segment control
RTMODEL Declares runtime model attributes. Module control
SET Assigns a temporary value. Value assignment
SETA Assigns a temporary value. Value assignment
STACK Begins a stack segment. Segment control
THUMB Interprets subsequent instructions as Thumb Mode control
execution-mode instructions.
VAR Assigns a temporary value. Value assignment
Table 15: Assembler directives summary (Continued)

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 Assembler directives

Syntax conventions
In the syntax definitions the following conventions are used:
● Parameters, representing what you would type, are shown in italics. So, for
example, in:
ORG expr
expr represents an arbitrary expression.
● Optional parameters are shown in square brackets. So, for example, in:
END [expr]
the expr parameter is optional.
● An ellipsis indicates that the previous item can be repeated an arbitrary number of
times. For example:
PUBLIC symbol [,symbol] …
indicates that PUBLIC can be followed by one or more symbols, separated by
commas.
● Alternatives are enclosed in { and } brackets, separated by a vertical bar, for
example:
LSTOUT{+|-}
indicates that the directive must be followed by either + or -.

LABELS AND COMMENTS

Where a label must precede a directive, this is indicated in the syntax, as in:
label VAR expr
An optional label, which will assume the value and type of the current program
location counter (PLC), can precede all directives. For clarity, this is not included in
each syntax definition.
In addition, unless explicitly specified, all directives can be followed by a comment,
preceded by ; (semicolon).

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Module control directives

PARAMETERS
The following table shows the correct form of the most commonly used types of
parameter:
Parameter What it consists of

expr An expression; see Assembler expressions, page 2.

label A symbolic label.
symbol An assembler symbol.
Table 16: Assembler directive parameters

Module control directives

Module control directives are used for marking the beginning and end of source
program modules, and for assigning names and types to them.
Directive Description

END Terminates the assembly of the last module in a file.

ENDMOD Terminates the assembly of the current module.
LIBRARY Begins a library module.
MODULE Begins a library module.
NAME Begins a program module.
PROGRAM Begins a program module.
RTMODEL Declares runtime model attributes.
Table 17: Module control directives

SYNTAX
END [label]
ENDMOD [label]
LIBRARY symbol [(expr)]
MODULE symbol [(expr)]
NAME symbol [(expr)]
PROGRAM symbol [(expr)]
RTMODEL key, value

PARAMETERS
expr Optional expression (0–255) used by the IAR compiler to encode
programming language, memory model, and processor configuration.

key A text string specifying the key.

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label An expression or label that can be resolved at assembly time. It is output in the
object code as a program entry address.

symbol Name assigned to module, used by XLINK and XLIB when processing object
files.

value A text string specifying the value.

DESCRIPTION

Beginning a program module

Use NAME to begin a program module, and to assign a name for future reference by the
IAR XLINK Linker™ and the IAR XLIB Librarian™.
Program modules are unconditionally linked by XLINK, even if other modules do not
reference them.

Beginning a library module

Use MODULE to create libraries containing lots of small modules—like runtime
systems for high-level languages—where each module often represents a single
routine. With the multi-module facility, you can significantly reduce the number of
source and object files needed.
Library modules are only copied into the linked code if other modules reference a
public symbol in the module.

Terminating a module
Use ENDMOD to define the end of a module.

Terminating the last module

Use END to indicate the end of the source file. Any lines after the END directive are
ignored.

Assembling multi-module files

Program entries must be either relocatable or absolute, and will show up in XLINK
load maps, as well as in some of the hexadecimal absolute output formats. Program
entries must not be defined externally.
The following rules apply when assembling multi-module files:
● At the beginning of a new module all user symbols are deleted, except for those
created by DEFINE, #define, or MACRO, the location counters are cleared, and
the mode is set to absolute.

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Module control directives

● Listing control directives remain in effect throughout the assembly.

Note: END must always be used in the last module, and there must not be any source
lines (except for comments and listing control directives) between an ENDMOD and a
MODULE directive.
If the NAME or MODULE directive is missing, the module will be assigned the name of
the source file and the attribute program.

Declaring runtime model attributes

Use RTMODEL to enforce consistency between modules. All modules that are linked
together and define the same runtime attribute key must have the same value for the
corresponding key value, or the special value *. Using the special value * is equivalent
to not defining the attribute at all. It can however be useful to explicitly state that the
module can handle any runtime model.
A module can have several runtime model definitions.
Note: The compiler runtime model attributes start with double underscores. In order
to avoid confusion, this style must not be used in the user-defined assembler attributes.
If you are writing assembler routines for use with C/C++ code, and you want to control
the module consistency, refer to the ARM® IAR C/C++ Compiler Reference Guide.

Examples
The following example defines three modules where:
● MOD_1 and MOD_2 cannot be linked together since they have different values for
runtime model foo.
● MOD_1 and MOD_3 can be linked together since they have the same definition of
runtime model bar and no conflict in the definition of foo.
● MOD_2 and MOD_3 can be linked together since they have no runtime model
conflicts. The value * matches any runtime model value.
MODULE MOD_1
RTMODEL "foo", "1"
RTMODEL "bar", "XXX"
...
ENDMOD

MODULE MOD_2
RTMODEL "foo", "2"
RTMODEL "bar", "*"
...
ENDMOD

MODULE MOD_3

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 Assembler directives

RTMODEL "bar", "XXX"

...
END

Symbol control directives

These directives control how symbols are shared between modules.
Directive Description

EXTERN, EXTRN, IMPORT Imports an external symbol.

MULTWEAK Exports symbols to other modules; multiple definitions
allowed.
PUBLIC, EXPORT Exports symbols to other modules.
PUBWEAK Exports symbols to other modules; multiple definitions
allowed.
REQUIRE Forces a symbol to be referenced.
Table 18: Symbol control directives

SYNTAX
EXTERN symbol [,symbol] …
MULTWEAK symbol [,symbol] …
PUBLIC symbol [,symbol] …
PUBWEAK symbol [,symbol] …
REQUIRE symbol [,symbol] …

PARAMETERS
symbol Symbol to be imported or exported.

DESCRIPTION

Exporting symbols to other modules

Use PUBLIC to make one or more symbols available to other modules. The symbols
declared as PUBLIC can only be assigned values by using them as labels. Symbols
declared PUBLIC can be relocated or absolute, and can also be used in expressions
(with the same rules as for other symbols).
The PUBLIC directive always exports full 32-bit values, which makes it feasible to use
global 32-bit constants also in assemblers for 8-bit and 16-bit processors. With the
LOW, HIGH, >>, and << operators, any part of such a constant can be loaded in an 8-bit
or 16-bit register or word.

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There are no restrictions on the number of PUBLIC-declared symbols in a module.

Exporting symbols with multiple definitions to other modules

PUBWEAK and MULTWEAK are similar to PUBLIC except that they allow the same
symbol to be defined several times. For PUBWEAK, only one of those definitions will
be used by XLINK. For MULTWEAK, XLINK will keep as many of those definitions as
required by your application. If a module containing a PUBLIC definition of a symbol
is linked with one or more modules containing PUBWEAK definitions of the same
symbol, XLINK will use the PUBLIC definition.
A symbol defined as PUBWEAK or MULTWEAK must be a label in a segment part, and it
must be the only symbol defined as PUBLIC or PUBWEAK in that segment part.
Note: Library modules are only linked if a reference to a symbol in that module is
made, and that symbol has not already been linked. During the module selection
phase, no distinction is made between PUBLIC, PUBWEAK, and MULTWEAK definitions.
This means that to ensure that the module containing the PUBLIC definition is
selected, you should link it before the other modules, or make sure that a reference is
made to some other PUBLIC symbol in that module.

Importing symbols
Use EXTERN to import an untyped external symbol.
The REQUIRE directive marks a symbol as referenced. This is useful if the segment
part containing the symbol must be loaded for the code containing the reference to
work, but the dependence is not otherwise evident.

EXAMPLES

The following example defines a subroutine to print an error message, and exports the
entry address err so that it can be called from other modules. It defines print as an
external routine; the address will be resolved at link time.
MODULE error
EXTERN print
PUBLIC err
CODE16
PUSH {LR}
err ADR R0,msg
BL print
POP {PC}
DATA
msg DC8 "**Error **"
RET
END

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 Assembler directives

Mode control directives

These directives provide control over the processor mode:
Directive Description

ARM, CODE32 Subsequent instructions are assembled as 32-bit (ARM) instructions. Labels
within a CODE32 area have bit 0 set to 0. Force 4-byte alignment.
CODE16 Subsequent instructions are assembled as 16-bit (Thumb) instructions, using
the traditional CODE16 syntax. Labels within a CODE16 area have bit 0 set
to 1. Force 2-byte alignment.
DATA Defines an area of data within a code segment, where labels work as in a
CODE32 area.
THUMB Subsequent instructions are assembled either as 16-bit Thumb instructions,
or as 32-bit Thumb-2 instructions if the specified core supports the
Thumb-2 instruction set. The assembler syntax follows the Unified
Assembler syntax as specified by Advanced RISC Machines Ltd.
Table 19: Mode control directives

SYNTAX
ARM
CODE16
CODE32
DATA
THUMB

DESCRIPTION
To change between the Thumb and ARM processor modes, use the CODE16/THUMB
and CODE32/ARM directives with the BX instruction (Branch and Exchange) or some
other instruction that changes the execution mode. The CODE16/THUMB and
CODE32/ARM mode directives do not assemble to instructions that change the mode,
they only instruct the assembler how to interpret the following instructions.
Always use the DATA directive when defining data in a Thumb code segment with
DC8, DC16, or DC32, otherwise labels on the data will have bit 0 set.
Note: Be careful when porting assembler source code written for other assemblers.
AARM always sets bit 0 on Thumb code labels (local, external or public). See the
chapter Migrating to the ARM IAR Assembler for details.
The assembler will initially be in CODE32/ARM mode, except if you specified a core
which does not support ARM mode. In this case, the assembler will initially be in
THUMB mode.

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EXAMPLES

Changing the processor mode

ADR R0, Into_THUMB ; Generate branch target
; address, bit 0 is set
; since it is a THUMB code
; label.
BX R0 ; Branch and change to THUMB
; state.
CODE16 ; Assemble subsequent code as
Into_THUMB ; THUMB instructions
.
.
ADR R5, Back_to_ARM ; Generate branch target to
; word aligned address-hence
; bit 0 is low and so
; change back to ARM state.
BX R5 ; Branch and change back to
; ARM state.
.
.

CODE32 ; Assemble subsequent code as

Back_to_ARM ; ARM instructions

Using the DATA directive

The following example shows how 32-bit labels are initialized after the DATA
directive. The labels can be used within a CODE16 segment.
CODE16 ; Thumb instruction set used
my_code_label1 ldr r0,my_data_label1
my_code_label2 nop

DATA ; Remember the data directive,

; so that bit 0 is not set
; on labels
my_data_label1 DC32 0x12345678
my_data_label2 DC32 0x12345678

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Segment control directives

The segment directives control how code and data are generated.
Directive Description

ALIGNRAM Aligns the location counter by incrementing it,

ALIGNROM Aligns the location counter by inserting zero-filled bytes.
ASEG Begins an absolute segment.
ASEGN Begins a named absolute segment.
COMMON Begins a common segment.
EVEN Aligns the program counter to an even address.
ODD Aligns the program counter to an odd address.
ORG Sets the location counter.
RSEG Begins a relocatable segment.
STACK Begins a stack segment.
Table 20: Segment control directives

SYNTAX
ALIGNRAM align
ALIGNROM align [,value]
ASEG [start [(align)]]
ASEGN segment [:type], address
COMMON segment [:type] [(align)]
EVEN [value]
ODD [value]
ORG expr
RSEG segment [:type] [flag] [(align)]
STACK segment [:type] [(align)]

PARAMETERS
address Address where this segment part will be placed.

align Exponent of the value to which the address should be aligned, in the range 0
to 30. For example, align 1 results in word alignment 2.

expr Address to set the location counter to.

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Segment control directives

flag NOROOT
This segment part may be discarded by the linker even if no symbols in this
segment part are referred to. Normally all segment parts except startup
code and interrupt vectors should set this flag. The default mode is ROOT
which indicates that the segment part must not be discarded.

REORDER
Allows the linker to reorder segment parts. For a given segment, all segment
parts must specify the same state for this flag.

SORT
The linker will sort the segment parts in decreasing alignment order. For a
given segment, all segment parts must specify the same state for this flag.

segment The name of the segment.

start A start address that has the same effect as using an ORG directive at the
beginning of the absolute segment.

type The memory type, typically CODE, or DATA. In addition, any of the types
supported by the IAR XLINK Linker.

value Byte value used for padding, default is zero.

DESCRIPTION

Beginning an absolute segment

Use ASEG to set the absolute mode of assembly, which is the default at the beginning
of a module.
If the parameter is omitted, the start address of the first segment is 0, and subsequent
segments continue after the last address of the previous segment.
The ASEGN directive can be used to start a named absolute segment; it allows a
segment type to be specified.

Beginning a relocatable segment

Use RSEG to set the current mode of the assembly to relocatable assembly mode. The
assembler maintains separate location counters (initially set to zero) for all segments,
which makes it possible to switch segments and mode anytime without the need to
save the current segment location counter.
Up to 65536 unique, relocatable segments may be defined in a single module.

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Beginning a stack segment

Use STACK to allocate code or data allocated from high to low addresses (in contrast
with the RSEG directive that causes low-to-high allocation).
Note: The contents of the segment are not generated in reverse order.

Beginning a common segment

Use COMMON to place data in memory at the same location as COMMON segments from
other modules that have the same name. In other words, all COMMON segments of the
same name will start at the same location in memory and overlay each other.
Obviously, the COMMON segment type should not be used for overlaid executable code.
A typical application would be when you want a number of different routines to share
a reusable, common area of memory for data.
It can be practical to have the interrupt vector table in a COMMON segment, thereby
allowing access from several routines.
The final size of the COMMON segment is determined by the size of largest occurrence
of this segment. The location in memory is determined by the XLINK -Z command;
see the IAR Linker and Library Tools Reference Guide.
Use the align parameter in any of the above directives to align the segment start
address.

Setting the program location counter (PLC)

Use ORG to set the program location counter of the current segment to the value of an
expression. The optional label will assume the value and type of the new location
counter.
The result of the expression must be of the same type as the current segment, i.e. it is
not valid to use ORG 10 during RSEG, since the expression is absolute; use ORG .+10
instead. The expression must not contain any forward or external references.
All program location counters are set to zero at the beginning of an assembly module.

Aligning a segment
Use ALIGNROM to align the program location counter to a specified address boundary.
The expression gives the power of two to which the program counter should be
aligned.
The alignment is made relative to the segment start; normally this means that the
segment alignment must be at least as large as that of the alignment directive to give
the desired result.

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ALIGNROM aligns by inserting zero/filled bytes. The EVEN directive aligns the
program counter to an even address (which is equivalent to ALIGNROM 1) and the
ODD directive aligns the program counter to an odd address.
Use ALIGNRAM to align the program location counter to a specified address boundary.
The expression gives the power of two to which the program location counter should
be aligned. ALIGNRAM aligns by incrementing the program location counter; no data
is generated.

EXAMPLES

Beginning an absolute segment

The following example assembles a branch to the function main in address 0. On

reset, the chip starts execution at address 0:
MODULE reset

EXTERN main

ASEG
ORG 0 ; RESET vector address

CODE32
reset: B main

END

Beginning a relocatable segment

In this example, the data following the first RSEG directive is placed in a relocatable
segment called dataseg(2).
The code following the second RSEG directive is placed in a relocatable segment
called CODE:
ASEG
ORG 0
B main ; RESET vector

EXTERN subrtn, divrtn

RSEG dataseg:DATA(2)

DATA
functable:
f1: DC32 subrtn
DC32 divrtn

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 Assembler directives

RSEG codeseg:CODE(2)

CODE32
main:
LDR R0,=f1 ; get address
LDR PC,[R0] ; jump to it
END

Beginning a stack segment

This example defines two 100-byte stacks in a relocatable segment called rpnstack:
STACK rpnstack
DATA
parms DC8 100
opers DC8 100
END
The data is allocated from high to low addresses.

Beginning a common segment

The following example defines two common segments containing variables:

NAME common1
COMMON dataseg(2)
DATA
count DC32 1
ENDMOD
NAME common2
COMMON dataseg
DATA
up DC8 1
ORG .+2
down DC8 1
END
Because the common segments have the same name, dataseg, the variables up and
down refer to the same locations in memory as the first and last bytes of the 4-byte
variable count.

Aligning a segment

This example starts a relocatable segment, moves to an even address, and adds some
data. It then aligns to a 64-byte boundary before creating a 64-byte table.
NAME align
RSEG dataseg (6) ; Start a relocatable data
; segment and verify that it

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Value assignment directives

; is correctly aligned
DATA
target DS16 1 ; Target is on an even
ALIGNROM 6 ; Zero fill to a 64-byte
; boundary
results DS32 64 ; Create a 64-byte table
DS32
ALIGNROM 3 ; Align to an 8-byte boundary
ages DS32 64 ; Create another 64-byte table
END

Value assignment directives

These directives are used for assigning values to symbols.
Directive Description

= Assigns a permanent value local to a module.

ALIAS Assigns a permanent value local to a module.
ASSIGN Assigns a temporary value.
DEFINE Defines a file-wide value.
EQU Assigns a permanent value local to a module.
LIMIT Checks a value against limits.
SET Assigns a temporary value.
SETA Assigns a temporary value.
VAR Assigns a temporary value.
Table 21: Value assignment directives

SYNTAX
label = expr
label ALIAS expr
label ASSIGN expr
label DEFINE expr
label EQU expr
LIMIT expr, min, max, message
label SET expr
label SETA expr
label VAR expr

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PARAMETERS
expr Value assigned to symbol or value to be tested.

label Symbol to be defined.

message A text message that will be printed when expr is out of range.

min, max The minimum and maximum values allowed for expr.

DESCRIPTION

Defining a temporary value

Use either of ASSIGN and VAR to define a symbol that may be redefined, such as for
use with macro variables. Symbols defined with VAR cannot be declared PUBLIC.

Defining a permanent local value

Use EQU or = to assign a value to a symbol.
Use EQU to create a local symbol that denotes a number or offset.
The symbol is only valid in the module in which it was defined, but can be made
available to other modules with a PUBLIC directive.
Use EXTERN to import symbols from other modules.

Defining a permanent global value

Use DEFINE to define symbols that should be known to all modules in the source file.
A symbol which has been given a value with DEFINE can be made available to
modules in other files with the PUBLIC directive.
Symbols defined with DEFINE cannot be redefined within the same file.

Checking symbol values

Use LIMIT to check that expressions lie within a specified range. If the expression is
assigned a value outside the range, an error message will appear.
The check will occur as soon as the expression is resolved, which will be during
linking if the expression contains external references. The min and max expressions
cannot involve references to forward or external labels, i.e. they must be resolved
when encountered.

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EXAMPLES

Redefining a symbol

The following example uses SET to redefine the symbol cons in a loop to generate a
table of the first 8 powers of 3:
NAME table

; Generate table of powers of 3

cons SET 1

cr_tabl MACRO times

DC32 cons
cons SET cons*3
IF times>1
cr_tabl times-1
ENDIF
ENDM

table: DATA
cr_tabl 4
END table

It generates the following code:

1 00000000 NAME table
2 00000000 ; Generate table of powers of 3
3 00000001 cons SET 1
11 00000000 table:
12 00000000 cr_tabl 4
12 00000000 01000000 cr_tabl 4
12.1 00000003 cons SET cons*3
12.2 00000004 IF 4>1
12 00000004 cr_tabl 4-1
12 00000004 03000000 cr_tabl 4
12.1 00000009 cons SET cons*3
12.2 00000008 IF 4-1>1
12 00000008 cr_tabl 4-1-1
12 00000008 09000000 cr_tabl 4
12.1 0000001B cons SET cons*3
12.2 0000000C IF 4-1-1>1
12 0000000C cr_tabl 4-1-1-1
12 0000000C 1B000000 cr_tabl 4
12.1 00000051 cons SET cons*3
12.2 00000010 IF 4-1-1-1>1
12.3 00000010 cr_tabl 4-1-1-1-1

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12.4 00000010 ENDIF

12.5 00000010 ENDM
12.6 00000010 ENDIF
12.7 00000010 ENDM
12.8 00000010 ENDIF
12.9 00000010 ENDM
12.10 00000010 ENDIF
12.11 00000010 ENDM
13 00000010 END table

Using local and global symbols

In the following example the symbol value defined in module add1 is local to that
module; a distinct symbol of the same name is defined in module add2. The DEFINE
directive is used for declaring DAT for use anywhere in the file:
NAME add1
PUBLIC add12
CODE32
DAT DEFINE 1
value EQU 12

add12:
MOV R0, #value
ADD R0,R0, #DAT
MOV PC, LR ; Return
ENDMOD

NAME add2
PUBLIC add20
value EQU 20

add20:
MOV R0, #value
ADD R0,R0, #DAT
MOV PC, LR ; Return
END
The symbol DAT defined in module add12 is also available to module add20.

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Using the LIMIT directive

The following example sets the value of a variable called speed and then checks it,
at assembly time, to see if it is in the range 10 to 30. This might be useful if speed is
often changed at compile time, but values outside a defined range would cause
undesirable behavior.
speed VAR 23
LIMIT speed,10,30,...speed out of range...

Conditional assembly directives

These directives provide logical control over the selective assembly of source code.
Directive Description

IF Assembles instructions if a condition is true.

ELSE Assembles instructions if a condition is false.
ELSEIF Specifies a new condition in an IF…ENDIF block.
ENDIF Ends an IF block.
Table 22: Conditional assembly directives

SYNTAX
IF condition
ELSE
ELSEIF condition
ENDIF

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PARAMETERS
condition One of the following:

An absolute expression The expression must not contain forward

or external references, and any non-zero
value is considered as true.

string1=string2 The condition is true if string1 and

string2 have the same length and
contents.

string1<>string2 The condition is true if string1 and

string2 have different length or
contents.

DESCRIPTION
Use the IF, ELSE, and ENDIF directives to control the assembly process at assembly
time. If the condition following the IF directive is not true, the subsequent instructions
will not generate any code (i.e. it will not be assembled or syntax checked) until an
ELSE or ENDIF directive is found.
Use ELSEIF to introduce a new condition after an IF directive. Conditional assembler
directives may be used anywhere in an assembly, but have their greatest use in
conjunction with macro processing.
All assembler directives (except END) as well as the inclusion of files may be disabled
by the conditional directives. Each IF directive must be terminated by an ENDIF
directive. The ELSE directive is optional, and if used, it must be inside an
IF...ENDIF block. IF...ENDIF and IF...ELSE...ENDIF blocks may be nested
to any level.

EXAMPLES

The following macro defines two different implementations of an addition depending

on the number of arguments used in the macro:
CODE32
?add MACRO a,b,c
IF _args <3
ADD a,a, #b
ELSE
ADD a,b, #c
ENDIF
ENDM

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If two macro-arguments are supplied then the first and second argument of the add
instruction are assumed to be the same:
main:
MOV R1, #0xF0
?add R1, 0xFF ;this
?add R1, R1, 0xFF ;and this
add R1, R1, #0xFF ;are the same as this

END

Macro processing directives

These directives allow user macros to be defined.
Directive Description

ENDM Ends a macro definition.

ENDR Ends a repeat structure.
EXITM Exits prematurely from a macro.
LOCAL Creates symbols local to a macro.
MACRO Defines a macro.
REPT Assembles instructions a specified number of times.
REPTC Repeats and substitutes characters.
REPTI Repeats and substitutes strings.
Table 23: Macro processing directives

SYNTAX
ENDM
ENDR
EXITM
LOCAL symbol [,symbol] …
name MACRO [,argument] …
REPT expr
REPTC formal,actual
REPTI formal,actual [,actual] …

PARAMETERS
actual String to be substituted.

argument A symbolic argument name.

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expr An expression.

formal Argument into which each character of actual (REPTC) or each actual
(REPTI) is substituted.

name The name of the macro.

symbol Symbol to be local to the macro.

DESCRIPTION
A macro is a user-defined symbol that represents a block of one or more assembler
source lines. Once you have defined a macro you can use it in your program like an
assembler directive or assembler mnemonic.
When the assembler encounters a macro, it looks up the macro’s definition, and inserts
the lines that the macro represents as if they were included in the source file at that
position.
Macros perform simple text substitution effectively, and you can control what they
substitute by supplying parameters to them.

Defining a macro
You define a macro with the statement:
macroname MACRO [,arg] [,arg] …
Here macroname is the name you are going to use for the macro, and arg is an
argument for values that you want to pass to the macro when it is expanded.

For example, you could define a macro ERROR as follows:

EXTERN abort
errmac MACRO text
BL abort
DATA
DC8 text,0
ENDM
This macro uses a parameter text to set up an error message for a routine abort.
You would call the macro with a statement such as:
CODE32
errmac 'Disk not ready'
END
The assembler will expand this to:
BL abort
DATA

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DC8 'Disk not ready',0

If you omit a list of one or more arguments, the arguments you supply when calling
the macro are called \1 to \9 and \A to \Z.
The previous example could therefore be written as follows:
EXTERN abort
errmac MACRO
BL abort
DATA
DC8 \1,0
ENDM
Use the EXITM directive to generate a premature exit from a macro.
EXITM is not allowed inside REPT...ENDR, REPTC...ENDR, or REPTI...ENDR blocks.
Use LOCAL to create symbols local to a macro. The LOCAL directive must be used
before the symbol is used.
Each time that a macro is expanded, new instances of local symbols are created by the
LOCAL directive. Therefore, it is legal to use local symbols in recursive macros.
Note: It is illegal to redefine a macro.

Passing special characters

Macro arguments that include commas or white space can be forced to be interpreted
as one argument by using the matching quote characters < and > in the macro call.

For example:
cmp_reg MACRO op
CMP op
ENDM
The macro can be called using the macro quote characters:
CODE32
cmp_reg <R3, R4>

END
You can redefine the macro quote characters with the -M command line option; see
-M, page 17.

Predefined macro symbols

The symbol _args is set to the number of arguments passed to the macro. The
following example shows how _args can be used:

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 Assembler directives

ORG 0x00 ; reset vector address

CODE32 ; ARM mode
B main

RSEG ICODE
DO_ADD MACRO
IF _args == 3
ADD \1,\2,\3
ELSE
ADD \1,\1,\2
ENDIF
ENDM

main: RSEG ICODE

DO_ADD R1,#5
DO_ADD R1,R2,#6

END

The following listing is generated:

1 00000000 ORG 0x00 ; reset vector
; address

2 00000000 CODE32 ; ARM mode

2.1 00000000 ALIGNROM 2
2 00000000 CODE32 ; ARM mode
3 00000000 ........ B main
4 00000004
5 00000000 RSEG ICODE
13 00000000
14 00000000 main: RSEG ICODE
15 00000000 DO_ADD R1,#5
15.1 00000000 IF _args == 3
15.2 00000000 ADD R1,#5,
15.3 00000000 ELSE
15.4 00000000 051081E2 ADD R1,R1,#5
15.5 00000004 ENDIF
15.6 00000004 ENDM
16 00000004 DO_ADD R1,R2,#6
16.1 00000004 IF _args == 3
16.2 00000004 061082E2 ADD R1,R2,#6
16.3 00000008 ELSE
16.4 00000008 ADD R1,R1,R2
16.5 00000008 ENDIF
16.6 00000008 ENDM
17 00000008
18 00000008 END

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How macros are processed

There are three distinct phases in the macro process:
● The assembler performs scanning and saving of macro definitions. The text
between MACRO and ENDM is saved but not syntax checked. Include-file references
$file are recorded and will be included during macro expansion.
● A macro call forces the assembler to invoke the macro processor (expander). The
macro expander switches (if not already in a macro) the assembler input stream
from a source file to the output from the macro expander. The macro expander
takes its input from the requested macro definition.
The macro expander has no knowledge of assembler symbols since it only deals
with text substitutions at source level. Before a line from the called macro
definition is handed over to the assembler, the expander scans the line for all
occurrences of symbolic macro arguments, and replaces them with their expansion
arguments.
● The expanded line is then processed as any other assembler source line. The input
stream to the assembler will continue to be the output from the macro processor,
until all lines of the current macro definition have been read.

Repeating statements
Use the REPT...ENDR structure to assemble the same block of instructions a number
of times. If expr evaluates to 0 nothing will be generated.
Use REPTC to assemble a block of instructions once for each character in a string. If
the string contains a comma it should be enclosed in quotation marks.
Use REPTI to assemble a block of instructions once for each string in a series of
strings. Strings containing commas should be enclosed in quotation marks.

EXAMPLES
This section gives examples of the different ways in which macros can make
assembler programming easier.

Coding in-line for efficiency

In time-critical code it is often desirable to code routines in-line to avoid the overhead
of a subroutine call and return. Macros provide a convenient way of doing this.

The following example outputs bytes from a buffer to a port:

IO_PORT EQU 0x0100
DATA
ASEG
ORG 0

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 Assembler directives

start: DC32 main ; reset vector

RSEG DATASEG
DATA
buffer DS8 512 ; Reserve a buffer of
; 512 bytes

RSEG CODESEG(2)
CODE32
main: BL play
done: B done

play:
LDR R1,=buffer ; Use R1 as pointer
; into buffer
LDR R2,=IO_PORT ; Use R2 as pointer
; to the port
LDR R3,=512 ; Buffersize in R3
ADD R3,R3,R1 ; R3 = one past the
; buffer loop:
LDRB R4,[R1],#1 ; Get byte data in R4,
; increment pointer
; into buffer
STRB R4,[R2] ; Write to the address
; pointed to by R2
CMP R1, R3 ; Compare R1 to the
; address
; one past the buffer
BNE loop ; NOT EQUAL --> repeat
MOV PC,LR ; return
END main
For efficiency we can recode this using a macro:
play: MACRO buf, size, port
LOCAL loop

LDR R1,=buf ; Use R1 as pointer

; into buffer
LDR R2,=port ; Use R2 as pointer
; to the port
LDR R3,=size ; Buffersize in R3
ADD R3,R3,R1 ; R3 = one past the
; buffer
loop:
LDRB R4,[R1],#1 ; Get byte data in R4
; increment pointer
; into buffer

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STRB R4,[R2] ; Write to the

; address
; pointed to by R2

CMP R1, R3 ; Compare R1 to the

; address
; one past the buffer
BNE loop ; NOT EQUAL -->repeat
ENDM
IO_PORT EQU 0x0100
DATA
ASEG
ORG 0
start: B main

RSEG DATASEG
DATA
buffer: DS8 512 ; Reserve a buffer of
; 512 bytes

RSEG CODESEG(2)
CODE32
main:
play buffer,512,IO_PORT
done: B done
END main
Notice the use of the LOCAL directive to make the label loop local to the macro;
otherwise an error will be generated if the macro is used twice, as the loop label will
already exist.

Using REPTC and REPTI

The following example assembles a series of calls to a subroutine plot to plot each
character in a string:
NAME signon
EXTERN plotc
CODE32

banner REPTC chr, "Welcome"

MOV R0,#’chr’ ; Pass char in R0 as
; parameter

BL plotc
ENDR
END

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This produces the following code:

1 00000000 NAME signon
2 00000000 EXTERN plotc
3 00000000 CODE32
3.1 00000000 ALIGNRAM 2
4 00000000
5 00000000 banner REPTC chr, "Welcome"
6 00000000 MOV R0,#’chr’ ; Pass char in R0
; as parameter
7 00000000 BL plotc
8 00000000 ENDR
8.1 00000000 5700A0E3 MOV R0,#’W’ ; Pass char in R0
; as parameter
8.2 00000004 ........ BL plotc
8.3 00000008 6500A0E3 MOV R0,#’e’ ; Pass char in R0
; as parameter
8.4 0000000C ........ BL plotc
8.5 00000010 6C00A0E3 MOV R0,#’l’ ; Pass char in R0
; as parameter
8.6 00000014 ........ BL plotc
8.7 00000018 6300A0E3 MOV R0,#’c’ ; Pass char in R0
; as parameter
8.8 0000001C ........ BL plotc
8.9 00000020 6F00A0E3 MOV R0,#’o’ ; Pass char in R0
; as parameter
8.10 00000024 ........ BL plotc
8.11 00000028 6D00A0E3 MOV R0,#’m’ ; Pass char in R0
; as parameter
8.12 0000002C ........ BL plotc
8.13 00000030 6500A0E3 MOV R0,#’e’ ; Pass char in R0
; as parameter
8.14 00000034 ........ BL plotc
9 00000038
10 00000038 END

The following example uses REPTI to clear a number of memory locations:

NAME repti
ASEG
DATA
ORG 0
B main

base EQU 0xFFFFF100

count EQU 0xFFFFF200
init EQU 0xFFFFF300

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Macro processing directives

CODE32

PUBLIC main
main MOV R0, #0
REPTI a, base, count, init
LDR R1, =a
STRB R0, [R1, #0]
ENDR

B .

END main

This produces the following code:

1 00000000 NAME repti
2 00000000 ASEG
3 00000000 DATA
4 00000000 ORG 0
5 00000000 00E0 B main
6 00000002
7 FFFFF100 base EQU 0xFFFFF100
8 FFFFF200 count EQU 0xFFFFF200
9 FFFFF300 init EQU 0xFFFFF300
10 00000002
11 00000002 CODE32
11.1 00000002FFFFF ALIGNRAM 2
12 00000004
13 00000004
14 00000000 PUBLIC main
15 00000004 0000A0E3 main MOV R0,#0
16 00000008 REPTI a, base, count, init
17 00000008 LDR R1,=a
18 00000008 STRB R0,[R1,#0]
19 00000008 ENDR
19.1 00000008 14109FE5 LDR R1,= base
19.2 0000000C 0000C1E5 STRB R0,[R1,#0]
19.3 00000010 10109FE5 LDR R1,= count
19.4 00000014 0000C1E5 STRB R0,[R1,#0]
19.5 00000018 0C109FE5 LDR R1,= init
19.6 0000001C 0000C1E5 STRB R0,[R1,#0]
20 00000020
21 00000020 FEFFFFEA B .
22 00000024
23 00000024 END main
23.1 00000024 TABLE
23.2 00000024 00F1FFFF Reference on line 19
23.3 00000028 00F2FFFF Reference on line 19

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 Assembler directives

23.4 0000002C 00F3FFFF Reference on line 19

23.5 00000030 END (including table)

Listing control directives

These directives provide control over the assembler list file.
Directive Description

COL Sets the number of columns per page.

LSTCND Controls conditional assembly listing.
LSTCOD Controls multi-line code listing.
LSTEXP Controls the listing of macro-generated lines.
LSTMAC Controls the listing of macro definitions.
LSTOUT Controls assembler-listing output.
LSTPAG Controls the formatting of output into pages.
LSTREP Controls the listing of lines generated by repeat directives.
LSTXRF Generates a cross-reference table.
PAGE Generates a new page.
PAGSIZ Sets the number of lines per page.
Table 24: Listing control directives

SYNTAX
COL columns
LSTCND{+ | -}
LSTCOD{+ | -}
LSTEXP{+ | -}
LSTMAC{+ | -}
LSTOUT{+ | -}
LSTPAG{+ | -}
LSTREP{+ | -}
LSTXRF{+ | -}
PAGE
PAGSIZ lines

PARAMETERS
columns An absolute expression in the range 80 to 132, default is 80

lines An absolute expression in the range 10 to 150, default is 44

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DESCRIPTION

Turning the listing on or off

Use LSTOUT- to disable all list output except error messages. This directive overrides
all other listing control directives.
The default is LSTOUT+, which lists the output (if a list file was specified).

Listing conditional code and strings

Use LSTCND+ to force the assembler to list source code only for the parts of the
assembly that are not disabled by previous conditional IF statements, ELSE, or END.
The default setting is LSTCND-, which lists all source lines.
Use LSTCOD- to restrict the listing of output code to just the first line of code for a
source line.
The default setting is LSTCOD+, which lists more than one line of code for a source
line, if needed; i.e. long ASCII strings will produce several lines of output. Code
generation is not affected.

Controlling the listing of macros

Use LSTEXP- to disable the listing of macro-generated lines. The default is LSTEXP+,
which lists all macro-generated lines.
Use LSTMAC+ to list macro definitions. The default is LSTMAC-, which disables the
listing of macro definitions.

Controlling the listing of generated lines

Use LSTREP- to turn off the listing of lines generated by the directives REPT, REPTC,
and REPTI.
The default is LSTREP+, which lists the generated lines.

Generating a cross-reference table

Use LSTXRF+ to generate a cross-reference table at the end of the assembler list for
the current module. The table shows values and line numbers, and the type of the
symbol.
The default is LSTXRF-, which does not give a cross-reference table.

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 Assembler directives

Specifying the list file format

Use COL to set the number of columns per page of the assembler list. The default
number of columns is 80.
Use PAGSIZ to set the number of printed lines per page of the assembler list. The
default number of lines per page is 44.
Use LSTPAG+ to format the assembler output list into pages.
The default is LSTPAG-, which gives a continuous listing.
Use PAGE to generate a new page in the assembler list file if paging is active.

EXAMPLES

Turning the listing on or off

To disable the listing of a debugged section of program:
LSTOUT-
; Debugged section
LSTOUT+
; Not yet debugged

Listing conditional code and strings

The following example shows how LSTCND+ hides a call to a subroutine that is
disabled by an IF directive:
NAME lstcndtst
CODE32
EXTERN print

RSEG prom

debug SET 0
begin IF debug
BL print
ENDIF

LSTCND+
begin2 IF debug
BL print
NOP
ENDIF

END

This will generate the following listing:

1 00000000 NAME lstcndtst
2 00000000 CODE32

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Listing control directives

2.1 00000000 ALIGNRAM 2

3 00000000 EXTERN print
4 00000000 RSEG prom
5 00000000 debug SET 0
6 00000000
7 00000000 begin IF debug
8 00000000 BL print
9 00000000 ENDIF
10 00000000
11 00000000 LSTCND+
12 00000000
13 00000000 begin2 IF debug
15 00000000 ENDIF
16 00000000
17 00000000 END

The following example shows the effect of LSTCOD- on the generated code by a DATA
directive:
NAME lstcodtst
DATA

table1: DC32 1,10,100,1000,10000

LSTCOD-
table2: DC32 1,10,100,1000,10000
END
This will generate the following listing:
1 00000000 NAME lstcodtst
2 00000000 DATA
3 00000000
4 00000000 010000000A00 table1: DC32 1,10,100,1000,10000
000064000000
E80300001027
0000
5 00000014 LSTCOD-
6 00000014 010000000A00*table2: DC32 1,10,100,1000,10000
7 00000028 END

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 Assembler directives

Controlling the listing of macros

The following example shows the effect of LSTMAC and LSTEXP:

CODE32
dec2 MACRO arg
ADD R1,R1,#-arg
ADD R1,R1,#-arg
ENDM

LSTMAC-

inc2 MACRO arg

ADD R1,R1,#arg
ADD R1,R1,#arg
ENDM
begin:
dec2 127
LSTEXP-
inc2 0x20
END begin

This will produce the following output:

1 00000000 CODE32
1.1 00000000 ALIGNRAM 2
6 00000000
7 00000000 LSTMAC-
8 00000000
13 00000000 begin:
14 00000000 dec2 127
14.1 00000000 7F1041E2 ADD R1,R1,#-127
14.2 00000004 7F1041E2 ADD R1,R1,#-127
14.3 00000008 ENDM
15 00000008 LSTEXP-
16 00000008 inc2 0x20
17 00000010 END begin
19 00000004
20 00000004 LSTEXP-
21 00000004 inc2 0x20
22 00000008
23 00000008
24 00000008 END begin

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Formatting listed output

The following example formats the output into pages of 66 lines each with 132
columns. The LSTPAG directive organizes the listing into pages, starting each module
on a new page. The PAGE directive inserts additional page breaks.
PAGSIZ 66 ; Page size
COL 132
LSTPAG+
...
ENDMOD
MODULE
...
PAGE
...

C-style preprocessor directives

The following C-language preprocessor directives are available:
Directive Description

#define Assigns a value to a label.

#elif Introduces a new condition in a #if...#endif block.
#else Assembles instructions if a condition is false.
#endif Ends a #if, #ifdef, or #ifndef block.
#error Generates an error.
#if Assembles instructions if a condition is true.
#ifdef Assembles instructions if a symbol is defined.
#ifndef Assembles instructions if a symbol is undefined.
#include Includes a file.
#message Generates a message on standard output.
#undef Undefines a label.
Table 25: C-style preprocessor directives

SYNTAX
#define label text
#elif condition
#else
#endif
#error "message"
#if condition

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#ifdef label
#ifndef label
#include {"filename" | <filename>}
#message "message"
#undef label

PARAMETERS
condition One of the following:

An absolute expression The expression must not

contain forward or external
references, and any non-zero
value is considered as true.

string1=string The condition is true if

string1 and string2 have
the same length and contents.

string1<>string2 The condition is true if

string1 and string2 have
different length or contents.

filename Name of file to be included.

label Symbol to be defined, undefined, or tested.

message Text to be displayed.

text Value to be assigned.

DESCRIPTION

Defining and undefining labels

Use #define to define a temporary label.
#define label value
is similar to:
label VAR value
Use #undef to undefine a label; the effect is as if it had not been defined.

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Conditional directives
Use the #if...#else...#endif directives to control the assembly process at assembly
time. If the condition following the #if directive is not true, the subsequent
instructions will not generate any code (i.e. it will not be assembled or syntax checked)
until a #endif or #else directive is found.
All assembler directives (except for END) and file inclusion may be disabled by the
conditional directives. Each #if directive must be terminated by a #endif directive.
The #else directive is optional and, if used, it must be inside a #if...#endif block.
#if...#endif and #if...#else...#endif blocks may be nested to any level.
Use #ifdef to assemble instructions up to the next #else or #endif directive only
if a symbol is defined.
Use #ifndef to assemble instructions up to the next #else or #endif directive only
if a symbol is undefined.

Including source files

Use #include to insert the contents of a file into the source file at a specified point.
#include "filename" searches the following directories in the specified order:
1 The source file directory.
2 The directories specified by the -I option, or options.
3 The current directory.
#include <filename> searches the following directories in the specified order:
1 The directories specified by the -I option, or options.
2 The current directory.

Displaying errors
Use #error to force the assembler to generate an error, such as in a user-defined test.

Using C-style preprocessor directives

Note: It is important to avoid mixing the assembler language with the C-style
preprocessor directives. Conceptually they are different languages and mixing them
may lead to unexpected behavior since an assembler directive is not necessarily
accepted as a part of the C language.

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 Assembler directives

The following example illustrates some problems that may occur when assembler
comments are used in the C-style preprocessor:

#define five 5 ; comment

MOV R0,five+addr ; syntax error!
; expanded to "MOV R0,5 ; comment+addr"

LDR R0,[R1,#five] ; syntax error!

; expanded to "LDR R0,[R1,#5 ; comment]"
END

EXAMPLES

Using conditional directives

The following example uses #ifdef to check that a certain symbol is defined and in
that case use two internally defined symbols. Otherwise, the same symbols are
declared EXTERN and a message displayed by #message. The STAND_ALONE symbol
can, for example, be defined on the command line via the -D option, see -D, page 13.
PROGRAM target
CODE32
PUBLIC main

#ifdef STAND_ALONE
alpha EQU 0x20
beta EQU 0x22
#else
EXTERN alpha, beta
#message "Program depends on additional link information"
#endif

main:
MOV R1,#alpha
MOV R2,#beta
ADD R2,R2,R1
EOR R1,R1,R2 ; R1 = (alpha XOR (alpha + beta))
END main

Including a source file

The following example uses #include to include a file defining macros into the
source file. For example, the following macros could be defined in macros.s79:
; exchange a and b using c as temporary
xch MACRO a,b, c
MOV c,a

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MOV a,b
MOV b,c
ENDM
The macro definitions can then be included by use of #include:
NAME include
; standard macro definitions
#include "macros.s79"

; program
main:
xch R0,R1,R2
END main

Data definition or allocation directives

These directives define temporary values or reserve memory.
Directive Description

DC8 Generates 8-bit byte constants, including strings.

DC16 Generates 16-bit word constants, including strings.
DC24 Generates 24-bit word constants.
DC32 Generates 32-bit double word constants.
DCB Generates 8-bit byte constants, including strings.

DCD Generates 32-bit double word constants.

DCW Generates 16-bit word constants, including strings.
DF32 Generates 32-bit floats.
DF64 Generates 64-bit floats.
DS8 Allocates space for 8-bit bytes.
DS16 Allocates space for 16-bit words.
DS24 Allocates space for 24-bit words.
DS32 Allocates space for 32-bit words.
Table 26: Data definition or allocation directives

SYNTAX
DC8 expr [,expr] ...
DC16 expr [,expr] ...
DC24 expr [,expr] ...
DC32 expr [,expr] ...

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DCB expr[,expr]
DCD expr[,expr]
DCW expr[,expr]
DF32 constant[,constant]
DF64 constant[,constant]
DS16 expr [,expr] ...
DS24 expr [,expr] ...
DS32 expr [,expr] ...
DS8 expr [,expr] ...

PARAMETERS
expr A valid absolute, relocatable, or external expression, or an ASCII string. ASCII
strings will be zero filled to a multiple of the size. Double-quoted strings will be
zero-terminated.

DESCRIPTION
Use DC8, DC16, DC24, DC32, DCB, DCD, DCW, DF32, or DF64 to reserve and initialize
memory space.
Use DS8, DS16, DS24, or DS32 to reserve uninitialized memory space.

EXAMPLES

Generating lookup table

The following example generates a lookup table of addresses to routines:

ADD_SELECTOR DEFINE 0
SUB_SELECTOR DEFINE 4
DIV_SELECTOR DEFINE 8
MUL_SELECTOR DEFINE 12

NAME table
CODE32
EXTERN add_f, sub_f, div_f, mul_f
ASEG
ORG 0
start B main ; RESET vector

RSEG DATASEG(2)
DATA
; pointer table to floating point
; routines
table: DC32 add_f, sub_f, div_f, mul_f
PI: DC32 3.1415927

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radius: DC32 1.3e2

RSEG CODESEG(2)
CODE32
main:
LDR R1, =PI ; Read up
; address to P1
LDR R2, =radius ; Do the same
; with radius...
LDR R0, =table ; Put base
; address to
; table in R0
LDR R0, [R0,#MUL_SELECTOR] ; Read address
; to mul_f from
; table
MOV PC,R0 ; goto mul_f
END main

Defining strings
To define a string:
mymsg DC8 'Please enter your name'
To define a string which includes a trailing zero:
myCstr DC8 "This is a string."
To include a single quote in a string, enter it twice; for example:
errmsg DC8 'Don''t understand!'

Reserving space
To reserve space for 0xA bytes:
table DS8 0xA

Assembler control directives

These directives provide control over the operation of the assembler.
Directive Description

$ Includes a file.
/*comment*/ C-style comment delimiter.
Table 27: Assembler control directives

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Directive Description

// C++ style comment delimiter.

CASEOFF Disables case sensitivity.
CASEON Enables case sensitivity.
INCLUDE Includes a file.
LTORG Directs the current literal pool to be assembled immediately after the
directive.
RADIX Sets the default base.
Table 27: Assembler control directives

SYNTAX
$filename
/*comment*/
//comment
CASEOFF
CASEON
INCLUDE filename
LTORG
RADIX expr

PARAMETERS
comment Comment ignored by the assembler.

expr Default base; default 10 (decimal).

filename Name of file to be included. The $ character must be the first

character on the line.

DESCRIPTION
Use $ to insert the contents of a file into the source file at a specified point.
Use RADIX to set the default base for use in conversion of constants from ASCII
source to the internal binary format.
To reset the base from 16 to 10, expr must be written in hexadecimal format, for
example:
RADIX 0x0A
Use LTORG to direct the current literal pool to be assembled. This is done by default
at every END, ENDMOD, and RSEG directive.

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Defining comments
Use /* ... */ to comment sections of the assembler listing.
Use // to mark the rest of the line as comment.

Controlling case sensitivity

Use CASEON or CASEOFF to turn on or off case sensitivity for user-defined symbols.
By default case sensitivity is off.
When CASEOFF is active all symbols are stored in upper case, and all symbols used
by XLINK should be written in upper case in the XLINK definition file.

EXAMPLES

Including a source file

The following example uses $ to include a file defining macros into the source file.
For example, the following macros could be defined in mymacros.s79:
; exchange a and b using c as temporary
xch MACRO a,b, c

MOV c, a
MOV a, b
MOV b, c

ENDM
The macro definitions can be included with a $ directive, as
in:
NAME include
CODE32

; standard macro definitions

$mymacros.s79

; program
main:
xch R0,R1,R2

END main

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Defining comments
The following example shows how /*...*/ can be used for a multi-line comment:
/*
Program to read serial input.
Version 4: 19.9.01
Author: mjp
*/

Changing the base

To set the default base to 16:

CODE32
RADIX 16D
MOV R0,#12

END
The immediate argument will then be interpreted as H'12.

Controlling case sensitivity

When CASEOFF is set, label and LABEL are identical in the following example:
label NOP ; Stored as "LABEL"
BL LABEL
NOP
The following will generate a duplicate label error:
CASEOFF

label NOP
LABEL NOP ; Error, "LABEL" already defined

END

Call frame information directives

These directives allow backtrace information to be defined.
Directive Description

CFI BASEADDRESS Declares a base address CFA (Canonical Frame Address).

CFI BLOCK Starts a data block.
Table 28: Call frame information directives

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Directive Description

CFI CODEALIGN Declares code alignment.

CFI COMMON Starts or extends a common block.
CFI CONDITIONAL Declares data block to be a conditional thread.
CFI DATAALIGN Declares data alignment.
CFI ENDBLOCK Ends a data block.
CFI ENDCOMMON Ends a common block.
CFI ENDNAMES Ends a names block.
CFI FRAMECELL Creates a reference into the caller’s frame.
CFI FUNCTION Declares a function associated with data block.
CFI INVALID Starts range of invalid backtrace information.
CFI NAMES Starts a names block.
CFI NOFUNCTION Declares data block to not be associated with a function.
CFI PICKER Declares data block to be a picker thread.
CFI REMEMBERSTATE Remembers the backtrace information state.
CFI RESOURCE Declares a resource.
CFI RESOURCEPARTS Declares a composite resource.
CFI RESTORESTATE Restores the saved backtrace information state.
CFI RETURNADDRESS Declares a return address column.
CFI STACKFRAME Declares a stack frame CFA.
CFI STATICOVERLAYFRAME Declares a static overlay frame CFA.
CFI VALID Ends range of invalid backtrace information.
CFI VIRTUALRESOURCE Declares a virtual resource.
CFI cfa Declares the value of a CFA.
CFI resource Declares the value of a resource.
Table 28: Call frame information directives (Continued)

SYNTAX
The syntax definitions below show the syntax of each directive. The directives are
grouped according to usage.

Names block directives

CFI NAMES name
CFI ENDNAMES name

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CFI RESOURCE resource : bits [, resource : bits] …

CFI VIRTUALRESOURCE resource : bits [, resource : bits] …
CFI RESOURCEPARTS resource part, part [, part] …
CFI STACKFRAME cfa resource type [, cfa resource type] …
CFI STATICOVERLAYFRAME cfa segment [, cfa segment] …
CFI BASEADDRESS cfa type [, cfa type] …

Extended names block directives

CFI NAMES name EXTENDS namesblock
CFI ENDNAMES name
CFI FRAMECELL cell cfa (offset): size [, cell cfa (offset):
size] …

Common block directives

CFI COMMON name USING namesblock
CFI ENDCOMMON name
CFI CODEALIGN align
CFI DATAALIGN align
CFI RETURNADDRESS resource type
CFI cfa { NOTUSED | USED }
CFI cfa { resource | resource + constant | resource - constant }
CFI cfa cfiexpr
CFI resource { UNDEFINED | SAMEVALUE | CONCAT }
CFI resource { resource | FRAME(cfa, offset) }
CFI resource cfiexpr

Extended common block directives

CFI COMMON name EXTENDS commonblock USING namesblock
CFI ENDCOMMON name

Data block directives

CFI BLOCK name USING commonblock
CFI ENDBLOCK name
CFI { NOFUNCTION | FUNCTION label }
CFI { INVALID | VALID }
CFI { REMEMBERSTATE | RESTORESTATE }
CFI PICKER
CFI CONDITIONAL label [, label] …
CFI cfa { resource | resource + constant | resource - constant }
CFI cfa cfiexpr
CFI resource { UNDEFINED | SAMEVALUE | CONCAT }
CFI resource { resource | FRAME(cfa, offset) }
CFI resource cfiexpr

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PARAMETERS
align The power of two to which the address should be aligned. The
allowed range for align is 0 to 31. As an example, the value 1 results
in alignment on even addresses since 21 equals 2. The default align
value is 0, except for segments of type CODE where the default is 1.
bits The size of the resource in bits.
cell The name of a frame cell.
cfa The name of a CFA (canonical frame address).
cfiexpr A CFI expression (see CFI expressions, page 92).
commonblock The name of a previously defined common block.
constant A constant value or an assembler expression that can be evaluated
to a constant value.
label A function label.
name The name of the block.
namesblock The name of a previously defined names block.
offset The offset relative the CFA. An integer with an optional sign.
part A part of a composite resource. The name of a previously declared
resource.
resource The name of a resource.
segment The name of a segment.
size The size of the frame cell in bytes.
type The memory type, such as CODE, CONST or DATA. In addition, any
of the memory types supported by the IAR XLINK Linker. It is used
solely for the purpose of denoting an address space.

DESCRIPTIONS
The Call Frame Information directives (CFI directives) are an extension to the
debugging format of the IAR C-SPY Debugger. The CFI directives are used to define
the backtrace information for the instructions in a program. The compiler normally
generates this information, but for library functions and other code written purely in
assembler language, backtrace information has to be added if you want to use the call
frame stack in the debugger.

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The backtrace information is used to keep track of the contents of resources, such as
registers or memory cells, in the assembler code. This information is used by the IAR
C-SPY Debugger to go “back” in the call stack and show the correct values of registers
or other resources before entering the function. In contrast with traditional
approaches, this permits the debugger to run at full speed until it reaches a breakpoint,
stop at the breakpoint, and retrieve backtrace information at that point in the program.
The information can then be used to compute the contents of the resources in any of
the calling functions—assuming they have call frame information as well.

Backtrace rows and columns

At each location in the program where it is possible for the debugger to break
execution, there is a backtrace row. Each backtrace row consists of a set of columns,
where each column represents an item that should be tracked. There are three kinds of
columns:
● The resource columns keep track of where the original value of a resource can be
found.
● The canonical frame address columns (CFA columns) keep track of the top of the
function frames.
● The return address column keeps track of the location of the return address.
There is always exactly one return address column and usually only one CFA column,
although there may be more than one.

Defining a names block

A names block is used to declare the resources available for a processor. Inside the
names block, all resources that can be tracked are defined.
Start and end a names block with the directives:
CFI NAMES name
CFI ENDNAMES name
where name is the name of the block.
Only one names block can be open at a time.
Inside a names block, four different kinds of declarations may appear: a resource
declaration, a stack frame declaration, a static overlay frame declaration, or a base
address declaration:
● To declare a resource, use one of the directives:
CFI RESOURCE resource : bits
CFI VIRTUALRESOURCE resource : bits

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The parameters are the name of the resource and the size of the resource in bits. A
virtual resource is a logical concept, in contrast to a “physical” resource such as a
processor register. Virtual resources are usually used for the return address.
More than one resource can be declared by separating them with commas.
A resource may also be a composite resource, made up of at least two parts. To
declare the composition of a composite resource, use the directive:
CFI RESOURCEPARTS resource part, part, …
The parts are separated with commas. The resource and its parts must have been
previously declared as resources, as described above.
● To declare a stack frame CFA, use the directive:
CFI STACKFRAME cfa resource type
The parameters are the name of the stack frame CFA, the name of the associated
resource (the stack pointer), and the segment type (to get the address space). More
than one stack frame CFA can be declared by separating them with commas.
When going “back” in the call stack, the value of the stack frame CFA is copied
into the associated stack pointer resource to get a correct value for the previous
function frame.
● To declare a static overlay frame CFA, use the directive:
CFI STATICOVERLAYFRAME cfa segment
The parameters are the name of the CFA and the name of the segment where the
static overlay for the function is located. More than one static overlay frame CFA
can be declared by separating them with commas.
● To declare a base address CFA, use the directive:
CFI BASEADDRESS cfa type
The parameters are the name of the CFA and the segment type. More than one base
address CFA can be declared by separating them with commas.
A base address CFA is used to conveniently handle a CFA. In contrast to the stack
frame CFA, there is no associated stack pointer resource to restore.

Extending a names block

In some special cases you have to extend an existing names block with new resources.
This occurs whenever there are routines that manipulate call frames other than their
own, such as routines for handling entering and leaving C/EC++ functions; these
routines manipulate the caller’s frame. Extended names blocks are normally used only
by compiler developers.

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Extend an existing names block with the directive:

CFI NAMES name EXTENDS namesblock
where namesblock is the name of the existing names block and name is the name of
the new extended block. The extended block must end with the directive:
CFI ENDNAMES name

Defining a common block

The common block is used to declare the initial contents of all tracked resources.
Normally, there is one common block for each calling convention used.
Start a common block with the directive:
CFI COMMON name USING namesblock
where name is the name of the new block and namesblock is the name of a
previously defined names block.
Declare the return address column with the directive:
CFI RETURNADDRESS resource type
where resource is a resource defined in namesblock and type is the segment
type. You have to declare the return address column for the common block.
End a common block with the directive:
CFI ENDCOMMON name
where name is the name used to start the common block.
Inside a common block you can declare the initial value of a CFA or a resource by
using the directives listed last in Common block directives, page 85. For more
information on these directives, see Simple rules, page 90, and CFI expressions, page
92.

Extending a common block

Since you can extend a names block with new resources, it is necessary to have a
mechanism for describing the initial values of these new resources. For this reason, it
is also possible to extend common blocks, effectively declaring the initial values of
the extra resources while including the declarations of another common block.
Similarly to extended names blocks, extended common blocks are normally only used
by compiler developers.
Extend an existing common block with the directive:
CFI COMMON name EXTENDS commonblock USING namesblock

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where name is the name of the new extended block, commonblock is the name of the
existing common block, and namesblock is the name of a previously defined names
block. The extended block must end with the directive:
CFI ENDCOMMON name

Defining a data block

The data block contains the actual tracking information for one continuos piece of
code. No segment control directive may appear inside a data block.
Start a data block with the directive:
CFI BLOCK name USING commonblock
where name is the name of the new block and commonblock is the name of a
previously defined common block.
If the piece of code is part of a defined function, specify the name of the function with
the directive:
CFI FUNCTION label
where label is the code label starting the function.
If the piece of code is not part of a function, specify this with the directive:
CFI NOFUNCTION
End a data block with the directive:
CFI ENDBLOCK name
where name is the name used to start the data block.
Inside a data block you may manipulate the values of the columns by using the
directives listed last in Data block directives, page 85. For more information on these
directives, see Simple rules, page 90, and CFI expressions, page 92.

SIMPLE RULES
To describe the tracking information for individual columns, there is a set of simple
rules with specialized syntax:
CFI cfa { NOTUSED | USED }
CFI cfa { resource | resource + constant | resource - constant }
CFI resource { UNDEFINED | SAMEVALUE | CONCAT }
CFI resource { resource | FRAME(cfa, offset) }
These simple rules can be used both in common blocks to describe the initial
information for resources and CFAs, and inside data blocks to describe changes to the
information for resources or CFAs.

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In those rare cases where the descriptive power of the simple rules are not enough, a
full CFI expression can be used to describe the information (see CFI expressions, page
92). However, whenever possible, you should always use a simple rule instead of a
CFI expression.
There are two different sets of simple rules: one for resources and one for CFAs.

Simple rules for resources

The rules for resources conceptually describe where to find a resource when going
back one call frame. For this reason, the item following the resource name in a CFI
directive is referred to as the location of the resource.
To declare that a tracked resource is restored, that is, already correctly located, use
SAMEVALUE as the location. Conceptually, this declares that the resource does not
have to be restored since it already contains the correct value. For example, to declare
that a register REG is restored to the same value, use the directive:
CFI REG SAMEVALUE
To declare that a resource is not tracked, use UNDEFINED as location. Conceptually,
this declares that the resource does not have to be restored (when going back one call
frame) since it is not tracked. Usually it is only meaningful to use it to declare the
initial location of a resource. For example, to declare that REG is a scratch register and
does not have to be restored, use the directive:
CFI REG UNDEFINED
To declare that a resource is temporarily stored in another resource, use the resource
name as its location. For example, to declare that a register REG1 is temporarily
located in a register REG2 (and should be restored from that register), use the directive:
CFI REG1 REG2
To declare that a resource is currently located somewhere on the stack, use
FRAME(cfa, offset) as location for the resource, where cfa is the CFA identifier
to use as “frame pointer” and offset is an offset relative the CFA. For example, to
declare that a register REG is located at offset -4 counting from the frame pointer
CFA_SP, use the directive:
CFI REG FRAME(CFA_SP,-4)
For a composite resource there is one additional location, CONCAT, which declares that
the location of the resource can be found by concatenating the resource parts for the
composite resource. For example, consider a composite resource RET with resource
parts RETLO and RETHI. To declare that the value of RET can be found by
investigating and concatenating the resource parts, use the directive:
CFI RET CONCAT

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This requires that at least one of the resource parts has a definition, using the rules
described above.

Simple rules for CFAs

In contrast with the rules for resources, the rules for CFAs describe the address of the
beginning of the call frame. The call frame often includes the return address pushed
by the subroutine calling instruction. The CFA rules describe how to compute the
address to the beginning of the current call frame. There are two different forms of
CFAs, stack frames and static overlay frames, each declared in the associated names
block. See Names block directives, page 84.
Each stack frame CFA is associated with a resource, such as the stack pointer. When
going back one call frame the associated resource is restored to the current CFA. For
stack frame CFAs there are two possible simple rules: an offset from a resource (not
necessarily the resource associated with the stack frame CFA) or NOTUSED.
To declare that a CFA is not used, and that the associated resource should be tracked
as a normal resource, use NOTUSED as the address of the CFA. For example, to declare
that the CFA with the name CFA_SP is not used in this code block, use the directive:
CFI CFA_SP NOTUSED
To declare that a CFA has an address that is offset relative the value of a resource,
specify the resource and the offset. For example, to declare that the CFA with the
name CFA_SP can be obtained by adding 4 to the value of the SP resource, use the
directive:
CFI CFA_SP SP + 4
For static overlay frame CFAs, there are only two possible declarations inside
common and data blocks: USED and NOTUSED.

CFI EXPRESSIONS
Call Frame Information expressions (CFI expressions) can be used when the
descriptive power of the simple rules for resources and CFAs is not enough. However,
you should always use a simple rule when one is available.
CFI expressions consist of operands and operators. Only the operators described
below are allowed in a CFI expression. In most cases, they have an equivalent operator
in the regular assembler expressions.
In the operand descriptions, cfiexpr denotes one of the following:
● A CFI operator with operands
● A numeric constant
● A CFA name

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● A resource name.

Unary operators
Overall syntax: OPERATOR(operand)
Operator Operand Description

UMINUS cfiexpr Performs arithmetic negation on a CFI expression.

NOT cfiexpr Negates a logical CFI expression.
COMPLEMENT cfiexpr Performs a bitwise NOT on a CFI expression.
LITERAL expr Get the value of the assembler expression. This can insert
the value of a regular assembler expression into a CFI
expression.
Table 29: Unary operators in CFI expressions

Binary operators
Overall syntax: OPERATOR(operand1,operand2)
Operator Operands Description

ADD cfiexpr,cfiexpr Addition

SUB cfiexpr,cfiexpr Subtraction
MUL cfiexpr,cfiexpr Multiplication
DIV cfiexpr,cfiexpr Division
MOD cfiexpr,cfiexpr Modulo
AND cfiexpr,cfiexpr Bitwise AND
OR cfiexpr,cfiexpr Bitwise OR
XOR cfiexpr,cfiexpr Bitwise XOR
EQ cfiexpr,cfiexpr Equal
NE cfiexpr,cfiexpr Not equal
LT cfiexpr,cfiexpr Less than
LE cfiexpr,cfiexpr Less than or equal
GT cfiexpr,cfiexpr Greater than
GE cfiexpr,cfiexpr Greater than or equal
LSHIFT cfiexpr,cfiexpr Logical shift left of the left operand. The number of
bits to shift is specified by the right operand. The sign
bit will not be preserved when shifting.
Table 30: Binary operators in CFI expressions

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Operator Operands Description

RSHIFTL cfiexpr,cfiexpr Logical shift right of the left operand. The number of
bits to shift is specified by the right operand. The sign
bit will not be preserved when shifting.
RSHIFTA cfiexpr,cfiexpr Arithmetic shift right of the left operand. The number
of bits to shift is specified by the right operand. In
contrast with RSHIFTL the sign bit will be preserved
when shifting.
Table 30: Binary operators in CFI expressions

Ternary operators
Overall syntax: OPERATOR(operand1,operand2,operand3)
Operator Operands Description

FRAME cfa,size,offset Get value from stack frame. The operands are:
cfa An identifier denoting a previously declared CFA.
size A constant expression denoting a size in bytes.
offset A constant expression denoting an offset in bytes.
Gets the value at address cfa+offset of size size.
IF cond,true,false Conditional operator. The operands are:
cond A CFA expression denoting a condition.
true Any CFA expression.
false Any CFA expression.
If the conditional expression is non-zero, the result is the
value of the true expression; otherwise the result is the
value of the false expression.
LOAD size,type,addr Get value from memory. The operands are:
size A constant expression denoting a size in bytes.
type A memory type.
addr A CFA expression denoting a memory address.
Gets the value at address addr in segment type type of
size size.
Table 31: Ternary operators in CFI expressions

EXAMPLE
The following is a generic example and not an example specific to the ARM core. This
will simplify the example and clarify the usage of the CFI directives. A target-specific
example can be obtained by generating assembler output when compiling a C source
file.

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Consider a generic processor with a stack pointer SP, and two registers R0 and R1.
Register R0 will be used as a scratch register (the register is destroyed by the function
call), whereas register R1 has to be restored after the function call. For reasons of
simplicity, all instructions, registers, and addresses will have a width of 16 bits.
Consider the following short code sample with the corresponding backtrace rows and
columns. At entry, assume that the stack contains a 16-bit return address. The stack
grows from high addresses towards zero. The CFA denotes the top of the call frame,
that is, the value of the stack pointer after returning from the function.
Address CFA SP R0 R1 RET Assembler code

0000 SP + 2 — SAME CFA - 2 func1: PUSH R1

0002 SP + 4 CFA - 4 MOV R1,#4
0004 CALL func2
0006 POP R0
0008 SP + 2 R0 MOV R1,R0
000A SAME RET
Table 32: Code sample with backtrace rows and columns

Each backtrace row describes the state of the tracked resources before the execution
of the instruction. As an example, for the MOV R1,R0 instruction the original value of
the R1 register is located in the R0 register and the top of the function frame (the CFA
column) is SP + 2. The backtrace row at address 0000 is the initial row and the result
of the calling convention used for the function.
The SP column is empty since the CFA is defined in terms of the stack pointer. The
RET column is the return address column—that is, the location of the return address.
The R0 column has a ‘—’ in the first line to indicate that the value of R0 is undefined
and does not need to be restored on exit from the function. The R1 column has SAME
in the initial row to indicate that the value of the R1 register will be restored to the
same value it already has.

Defining the names block

The names block for the small example above would be:
CFI NAMES trivialNames
CFI RESOURCE SP:16, R0:16, R1:16
CFI STACKFRAME CFA SP DATA

;; The virtual resource for the return address column

CFI VIRTUALRESOURCE RET:16
CFI ENDNAMES trivialNames

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Defining the common block

The common block for the simple example above would be:
CFI COMMON trivialCommon USING trivialNames
CFI RETURNADDRESS RET DATA
CFI CFA SP + 2
CFI R0 UNDEFINED
CFI R1 SAMEVALUE
CFI RET FRAME(CFA,-2) ; Offset -2 from top of frame
CFI ENDCOMMON trivialCommon
Note: SP may not be changed using a CFI directive since it is the resource associated
with CFA.

Defining the data block

Continuing the simple example, the data block would be:
RSEG CODE:CODE
CFI BLOCK func1block USING trivialCommon
CFI FUNCTION func1
func1:
PUSH R1
CFI CFA SP + 4
CFI R1 FRAME(CFA,-4)
MOV R1,#4
CALL func2
POP R0
CFI R1 R0
CFI CFA SP + 2
MOV R1,R0
CFI R1 SAMEVALUE
RET
CFI ENDBLOCK func1block
Note that the CFI directives are placed after the instruction that affects the backtrace
information.

ARM® IAR Assembler

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AARM-7
 Assembler
pseudo-instructions
The ARM IAR Assembler accepts a number of pseudo-instructions, which are
translated into correct code. This chapter lists the pseudo-instructions and
gives examples of their use.

Summary
In the following table, as well as in the following descriptions, ARM denotes
pseudo-instructions available after the ARM directive, CODE16 denotes
pseudo-instructions available after the CODE16 directive, and THUMB denotes
pseudo-instructions available after the THUMB directive. Note that the properties of
THUMB pseudo-instructions depend on whether the used core has the Thumb-2
instruction set or not.
The following table shows a summary of the available pseudo-instructions:
Pseudo-instruction Directive Translated to Description

ADR ARM ADD, SUB Loads a program-relative address

into a register.
ADR CODE16 ADD Loads a program-relative address
into a register.
ADR THUMB ADD, SUB Loads a program-relative address
into a register.
ADRL ARM ADD, SUB Loads a program-relative address
into a register.
ADRL THUMB ADD, SUB Loads a program-relative address
into a register.
_BF ARM B Used by the compiler when calling
functions that might be far away.
_BF THUMB B Used by the compiler when calling
functions that might be far away.
_BLF ARM BL Used by the compiler when calling
functions that might be far away or
in Thumb mode.
_BLF CODE16 BL Used by the compiler when
branching to labels that might be far
away or in ARM mode.
_BLF THUMB BL Used by the compiler when
branching to labels that might be far
away or in ARM mode.
Table 33: Pseudo-instructions

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Descriptions of pseudo-instructions

Pseudo-instruction Directive Translated to Description

LDR ARM MOV, MVN, LDR Loads a register with any 32-bit
expression.
LDR CODE16 MOV, LDR Loads a register with any 32-bit
expression.
LDR THUMB MOV, MVN, LDR Loads a register with any 32-bit
expression.
MOV CODE16 ADD Moves the value of a low register to
another low register (R0–R7).
MOV32 THUMB MOV, MOVT Loads a register with any 32-bit
value.
NOP ARM MOV Generates the preferred ARM
no-operation code.
NOP CODE16 MOV Generates the preferred Thumb
no-operation code.
Table 33: Pseudo-instructions (Continued)

Descriptions of pseudo-instructions
The following section gives reference information about each pseudo-instruction.

ADR (ARM) ADR{condition} register,expression

Parameters
{condition} Can be one of the following: EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE,
LT, GT, LE, and AL.
register The register to load.

expression A program location counter-relative expression that evaluates to an address

that is not word-aligned within the range -247 to +263 bytes, or a
word-aligned address within the range -1012 to +1028 bytes. Unresolved
expressions (for example expressions that contain external labels, or labels
in other segments) must be within the range -247 to +263 bytes.

Description
ADR always assembles to one instruction. The assembler attempts to produce a single
ADD or SUB instruction to load the address:
CODE32
ADR r0,thumb ; => ADD r0,pc,#1

ARM® IAR Assembler

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AARM-7
 Assembler pseudo-instructions

BX r0
CODE16
thumb

ADR (CODE16) ADR register, expression

Parameters
register The register to load.

expression A program-relative expression that evaluates to a word-aligned address

within the range +4 to +1024 bytes.

Description
In Thumb mode, ADR can generate word-aligned addresses only (i. e. addresses
divisible by 4). Use the ALIGNROM directive to ensure that the address is aligned
(unless DC32 is used, because it is always word aligned):
ADR r0,my_data ; => ADD r0,pc,#4
ADD r0,r0,r1
BX lr
DATA
ALIGNROM
my_data DC32 0xABCD19

ADR (THUMB) ADR{condition} register,expression

Parameters
{condition} An optional condition code if the instruction is placed after an IT
instruction.

register The register to load.

expression A program-relative expression that evaluates to an address within the range

-4095 to 4095 bytes.

Description
Similar to ADR (CODE16), but the address range can be larger if a 32-bit Thumb-2
instruction is generated. If only 16-bit Thumb instructions are available, see ADR
(CODE16), page 99.
If the address offset is positive and the address is word-aligned, the 16-bit ADR
(CODE16) version will be generated by default.

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 Descriptions of pseudo-instructions

The 16-bit version can be specified explicitly with the ADR.N instruction. The 32-bit
version can be specified explicitly with the ADR.W instruction.

ADRL (ARM) ADRL{condition} register,expression

Parameters
{condition} Can be one of the following: EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE,
LT, GT, LE, and AL.
register The register to load.

expression A register-relative expression that evaluates to an address that is not

word-aligned within 64 Kbytes, or a word-aligned address within 256
Kbytes. Unresolved expressions (for example expressions that contain
external labels, or labels in other segments) must be within 64 Kbytes. The
address can be either before or after the address of the instruction.

Description
The ADRL pseudo-instruction loads a program-relative address into a register. It is
similar to the ADR pseudo-instruction. ADRL can load a wider range of addresses than
ADR because it generates two data processing instructions. ADRL always assembles to
two instructions. Even if the address can be reached in a single instruction, a second,
redundant instruction is produced. If the assembler cannot construct the address in two
instructions, it generates an error message and the assembly fails.
Note: ADRL is not available when assembling Thumb instructions. Use it only in ARM
code.

Example
ADRL r1,my_data+0x2345 ; => ADD r1,pc,#0x45
; => ADD r1,r1,#0x2300
DATA
my_data: DC32 0

ADRL (THUMB) ADRL{condition} register,expression

Parameters
{condition} An optional condition code if the instruction is placed after an IT
instruction.

register The register to load.

ARM® IAR Assembler

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AARM-7
 Assembler pseudo-instructions

expression A program-relative expression that evaluates to an address within the range

± 1 Mbyte.

Description
Similar to ADRL (ARM), but the address range can be larger. This instruction is only
available in a core supporting the Thumb-2 instruction set.

_BF (ARM) _BF{condition} label1, label2

_BF (THUMB) _BF{condition} label1, label2

Parameters
{condition} An optional condition code if the instruction is placed after an IT
instruction.

label1 Direct label.

label2 Alternative label.

Description
Similar to the _BLF (ARM)and _BLF (THUMB) instructions, respectively, but a B
instruction is generated instead of a BL instruction.
The _BF (THUMB) instruction is only available in a core supporting the Thumb-2
instruction set.

_BLF (ARM) _BLF{condition} label1, label2

Parameters
condition An optional condition code.

label1 Direct label.

label2 Alternative label.

Description
The instruction is used by the compiler when calling functions that may be far away
or in Thumb mode. If the first label is within range of a BL instruction, and is in ARM
mode, a BL instruction to that label is produced. Otherwise a BL instruction to the
second label is produced:

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AARM-7
 Descriptions of pseudo-instructions

ext_fun EQU 1 ; Odd label (Thumb mode)

_BLF ext_fun,relay_fun ; => BL relay_fun
relay_fun LDR r0,=ext_fun
BX r0

_BLF (CODE16) _BLF label1, label2

Parameters
label1 Direct label.

label2 Alternative label.

Description
If the first label is within range of a BL instruction, and is in Thumb mode, a BL
instruction to that label is produced. Otherwise a BL instruction to the second label is
produced:
_BLF ext_fun,relay_fun

_BLF (THUMB) _BLF{condition} label1, label2

Parameters
{condition} An optional condition code if the instruction is placed after an IT
instruction.

label1 Direct label.

label2 Alternative label.

Description
Similar to the _BLF (CODE16) instruction, but the address range for BL is larger in
Thumb-2 mode so the direct label has a higher chance of being selected.
If only 16-bit Thumb instructions are available, see _BLF (CODE16), page 102.

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AARM-7
 Assembler pseudo-instructions

LDR (ARM) LDR{condition} register,=expression1

or
LDR{condition} register,expression2

Parameters
condition An optional condition code.

register The register to be loaded.

expression1 Any 32-bit expression.

expression2 A program location counter-relative expression in the range -4087 to

+4103 from the program location counter.

Description
The first form of the LDR pseudo-instruction loads a register with any 32-bit
expression. The second form of the instruction reads a 32-bit value from an address
specified by the expression. Note that there is also a true LDR instruction.
If the value of expression1 is within the range of a MOV or MVN instruction, the
assembler generates the appropriate instruction. If the value of expression1 is not
within the range of a MOV or MVN instruction, or if the expression1 is unsolved, the
assembler places the constant in a literal pool and generates a program-relative LDR
instruction that reads the constant from the literal pool. The offset from the program
location counter to the constant must be less than 4 Kbytes. See also the LTORG
directive in the section Assembler control directives, page 80, for more information.

Example
LDR r1,=0x12345678 ; => LDR r1,[pc,#4]
; loads 0x12345678 from the
; literal pool into r1
LDR r2,my_data ; loads 0xFFEEDDCC into r2
; => LDR r2,[pc,#-4]
DATA
my_data DC32 0xFFEEDDCC
LTORG

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AARM-7
 Descriptions of pseudo-instructions

LDR (CODE16) LDR register, =expression1

or
LDR register, expression2

Parameters
register The register to be loaded. LDR can access the low registers (R0–R7) only.

expression1 Any 32-bit expression.

expression2 A program location counter-relative expression +4 to +1024 from the

program location counter.

Description
As in ARM mode, the first form of the LDR pseudo-instruction in Thumb mode loads
a register with any 32-bit expression. The second form of the instruction reads a 32-bit
value from an address specified by the expression. However, the offset from the
program location counter to the constant must be positive and less than 1 Kbyte.

Example
LDR r1,=ext_label ; => LDR r1,[pc,#8]
; loads ext_label from the
; literal pool into r1
NOP
LDR r2,my_data ; loads 0xFFEEDDCC into r2
NOP ; => LDR r2,[pc,#0]
DATA
my_data DC32 0xFFEEDDCC
LTORG

ARM® IAR Assembler

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AARM-7
 Assembler pseudo-instructions

LDR (THUMB) LDR{condition} register,=expression

Parameters
condition An optional condition code if the instruction is placed after an IT
instruction.

register The register to be loaded.

expression Any 32-bit expression.

Description
Similar to the LDR (CODE16) instruction, but by using a 32-bit instruction, a larger
value can be loaded directly with a MOV or MVN instruction without requiring the
constant to be placed in a literal pool.
If only 16-bit Thumb instructions are available, see LDR (CODE16), page 104.
By specifying a 16-bit version explicitly with the LDR.N instruction, a 16-bit
instruction is always generated. This may lead to the constant being placed in the
literal pool, even though a 32-bit instruction could have loaded the value directly using
MOV or MVN.
By specifying a 32-bit version explicitly with the LDR.W instruction, a 32-bit
instruction is always generated.
If you do not specify either .N or .W, the 16-bit LDR (CODE16) instruction will be
generated, unless Rd is R8-R15, which leads to the 32-bit variant being generated.
Note: The syntax LDR{condition} register, expression2, as described for
LDR (ARM) and LDR (CODE16), is no longer considered a pseudo-instruction. It is
part of the normal instruction set as specified in the Unified Assembler syntax from
Advanced RISC Machines Ltd.

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AARM-7
 Descriptions of pseudo-instructions

MOV (CODE16) MOV Rd, Rs

Parameters
Rd The destination register.

Rs The source register.

Description
The Thumb MOV pseudo-instruction moves the value of a low register to another low
register (R0-R7). The Thumb MOV instruction cannot move values from one low
register to another.
Note: The ADD immediate instruction generated by the assembler has the side-effect
of updating the condition codes.
The MOV pseudo-instruction uses an ADD immediate instruction with a zero immediate
value.
Note: This description is only valid when using the CODE16 directive. After the
THUMB directive, the interpretation of the instruction syntax is defined by the
Undefined Assembler syntax from Advanced RISC Machines Ltd.

Example
MOV r2,r3 ; generates the opcode for ADD r2,r3,#0

MOV32 (THUMB) MOV32{condition} register,expression

Parameters
condition An optional condition code if the instruction is placed after an IT
instruction.

register The register to be loaded.

expression Any 32-bit expression.

Description
Similar to the LDR (THUMB) instruction, but will load the constant by generating a
pair of the MOV (MOVW) and the MOVT instructions.
This pseudo-instruction always generates two 32-bit instructions and it is only
available in a core supporting the Thumb-2 instruction set.

ARM® IAR Assembler

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AARM-7
 Assembler pseudo-instructions

NOP (ARM) NOP

Description
NOP generates the preferred ARM no-operation code:
MOV r0,r0

NOP (CODE16) NOP

Description
NOP generates the preferred Thumb no-operation code:
MOV r8,r8

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 Descriptions of pseudo-instructions

ARM® IAR Assembler

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AARM-7
 Assembler diagnostics
This chapter describes the format of the diagnostic messages and explains how
diagnostic messages are divided into different levels of severity.

Message format
All diagnostic messages are issued as complete, self-explanatory messages. A typical
diagnostic message from the assembler is produced in the form:
filename,linenumber level[tag]: message
where filename is the name of the source file in which the error was encountered;
linenumber is the line number at which the assembler detected the error; level is
the level of seriousness of the diagnostic; tag is a unique tag that identifies the
diagnostic message; message is a self-explanatory message, possibly several lines
long.
Diagnostic messages are displayed on the screen, as well as printed in the optional list
file.

Severity levels
The diagnostic messages produced by the ARM IAR Assembler reflect problems or
errors that are found in the source code or occur at assembly time.

ASSEMBLY WARNING MESSAGES

Assembly warning messages are produced when the assembler has found a construct
which is probably the result of a programming error or omission.

COMMAND LINE ERROR MESSAGES

Command line errors occur when the assembler is invoked with incorrect parameters.
The most common situation is when a file cannot be opened, or with duplicate,
misspelled, or missing command line options.

ASSEMBLY ERROR MESSAGES

Assembly error messages are produced when the assembler has found a construct
which violates the language rules.

ASSEMBLY FATAL ERROR MESSAGES

Assembly fatal error messages are produced when the assembler has found a user error
so severe that further processing is not considered meaningful. After the diagnostic
message has been issued the assembly is immediately terminated.

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 Severity levels

ASSEMBLER INTERNAL ERROR MESSAGES

During assembly a number of internal consistency checks are performed and if any of
these checks fail, the assembler will terminate after giving a short description of the
problem. Such errors should normally not occur. However, if you should encounter an
error of this type, please report it to your software distributor or to IAR Technical
Support. Please include information enough to reproduce the problem. This would
typically include:
● The exact internal error message text.
● The source file of the program that generated the internal error.
● A list of the options that were used when the internal error occurred.
● The version number of the assembler. To display it at sign-on, run the assembler,
aarm, without parameters.

ARM® IAR Assembler

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AARM-7
 Migrating to the ARM IAR
Assembler
Assembly source code that was originally written for other assemblers can
also be used with the ARM IAR Assembler. The assembler option -j allows you
to use a number of alternative register names, mnemonics and operators.
This chapter contains information that is useful when migrating from an
existing product to the ARM IAR Assembler.

Introduction
The ARM IAR Assembler (AARM) was designed using the same look and feel as
other IAR assemblers, while still making it easy to translate source code written for
the TASM assembler from Advanced RISC Machines Ltd.
When the option -j (Allow alternative register names, mnemonics and operands)
is selected, the instruction syntax is the same in AARM as in TASM. Many features,
such as directives and macros, are, however, incompatible and cause syntax errors.
There are also differences in Thumb code labels that may cause problems without
generating errors or warnings. Be extra careful when you use such labels in situations
other than jumps.
Note: For new code, use the ARM IAR Assembler register names, mnemonics and
operators.

THUMB CODE LABELS

Labels placed in Thumb code, i.e. that appear after a CODE16 directive, always have
bit 0 set (i.e. an odd label) in AARM. TASM, on the other hand, does not set bit 0 on
symbols in expressions that are solved at assembly time. In the following example, the
symbol T is local and placed in Thumb code. It will have bit 0 set when assembled
with AARM, but not when assembled with TASM (except in DCD, since it is solved at
link time for relocatable segments). Thus, the instructions will be assembled
differently.

Example
CODE32
ADR R0,T+1
MOV R1,#T-.
DD DATA

111

AARM-7
 Alternative register names

DCD T
CODE16
T NOP
Rewrite instructions like this to make them portable (i.e. have the same effect when
assembled using both AARM and TASM). Note that ADR is equivalent to an ADD with
PC.
CODE32
ADD R0,PC,#(T-.-8) :OR: 1
MOV R1,#(T-.) :AND: 0xFFFFFFFE
DD DATA
DCD T
CODE16
T NOP

Alternative register names

The ARM IAR Assembler will translate the register names below used in other
assemblers when the option -j is selected. These alternative register names are
allowed in both ARM and Thumb modes. The following table lists the alternative
register names and the ARM IAR Assembler register names:
Alternative register name ARM IAR Assembler register name

A1 R0
A2 R1
A3 R2
A4 R3
V1 R4
V2 R5
V3 R6
V4 R7
V5 R8
V6 R9
V7 R10
SB R9
SL R10
FP R11
IP R12
Table 34: Alternative register names

ARM® IAR Assembler

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AARM-7
 Migrating to the ARM IAR Assembler

For further descriptions of the registers, see Register symbols, page 7.

Alternative mnemonics
A number of mnemonics used by other assemblers will be translated by the ARM IAR
Assembler when the option -j is specified. These alternative mnemonics are allowed
in CODE16 mode only. The following table lists the alternative mnemonics:
Alternative mnemonic ARM IAR Assembler mnemonic

ADCS ADC
ADDS ADD
ANDS AND
ASLS LSL
ASRS ASR
BICS BIC
BNCC BCS
BNCS BCC
BNEQ BNE
BNGE BLT
BNGT BLE
BNHI BLS
BNLE BGT
BNLO BCS
BNLS BHI
BNLT BGE
BNMI BPL
BNNE BEQ
BNPL BMI
BNVC BVS
BNVS BVC
CMN{cond}S CMN{cond}
CMP{cond}S CMP{cond}
EORS EOR
LSLS LSL
Table 35: Alternative mnemonics

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AARM-7
 Operator synonyms

Alternative mnemonic ARM IAR Assembler mnemonic

LSRS LSR
MOVS MOV
MULS MUL
MVNS MVN
NEGS NEG
ORRS ORR
RORS ROR
SBCS SBC
SUBS SUB
TEQ{cond}S TEQ{cond}
TST{cond}S TST{cond}
Table 35: Alternative mnemonics (Continued)

Refer to the ARM Architecture Reference Manual (Prentice-Hall) for full descriptions
of the mnemonics.

Operator synonyms
A number of operators used by other assemblers will be translated by the ARM IAR
Assembler when the option -j is specified. The following operator synonyms are
allowed in both ARM and Thumb modes:
Operator synonym ARM IAR Assembler operator

:AND: &
:EOR: ^
:LAND: &&
:LEOR: XOR
:LNOT: !
:LOR: ||
:MOD: %
:NOT: ~
:OR: |
:SHL: <<
:SHR: >>
Table 36: Operator synonyms

ARM® IAR Assembler

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AARM-7
 Migrating to the ARM IAR Assembler

Note: ARM IAR Assembler operators and operator synonyms have different
precedence levels. For further descriptions of the operators, see the chapter Assembler
operators, page 23.

Warning messages
Unless the option -j is specified, the ARM IAR Assembler will issue warning
messages when the alternative names are used, or when illegal combinations of
operands are encountered. The following sections list the warning messages:

The first register operand omitted

The first register operand was missing in an instruction that requires three operands,
where the first two are unindexed registers (ADD, SUB, LSL, LSR, and ASR).

The first register operand duplicated

The first register operand was a register that was included in the operation, and was
also a destination register.
Example of erroneous code:
MUL R0, R0, R1
Example of correct code:
MUL R0, R1

Immediate #0 omitted in Load/Store

Immediate #0 was missing in a load/store instruction.
Example of erroneous code:
LDR R0,[R1]
Example of correct code:
LDR R0,[R1,#0]

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 Warning messages

ARM® IAR Assembler

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AARM-7
 Index

Index
A CASEOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
CASEON. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
AARM_INC (environment variable) . . . . . . . . . . . . . . . . . 10 CFI directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
absolute segments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 CODE16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
ADD (assembler instruction) . . . . . . . . . . . . . . . . . . . . . . . 98 CODE32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
ADD (CFI operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 COL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
addition (assembler operator). . . . . . . . . . . . . . . . . . . . . . . 26 comments, using . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
addresses, loading into a register . . . . . . . . . . . . . . . . 98–100 COMMON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
ADR (ARM) (pseudo-instruction) . . . . . . . . . . . . . . . . . . . 98 conditional assembly. . . . . . . . . . . . . . . . . . . . . . . . . . . 58
ADR (CODE16) (pseudo-instruction) . . . . . . . . . . . . . . . . 99 See also C-style preprocessor directives
ADR (THUMB) (pseudo-instruction) . . . . . . . . . . . . . . . . 99 C-style preprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
ADRL (ARM) (pseudo-instruction). . . . . . . . . . . . . . . . . 100 DATA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
ADRL (THUMB) (pseudo-instruction) . . . . . . . . . . . . . . 100 data definition or allocation . . . . . . . . . . . . . . . . . . . . . 78
ALIAS (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 54 DCB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
alignment, of segments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 DCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ALIGNRAM (assembler directive) . . . . . . . . . . . . . . . . . . 49 DCW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ALIGNROM (assembler directive) . . . . . . . . . . . . . . . . . . 49 DC16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
:AND: (assembler operator). . . . . . . . . . . . . . . . . . . . . . . . 29 DC24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
AND (CFI operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 DC32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
architecture, ARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix DC8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ARM (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 47 DEFINE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
_ _ARMVFP_ _ (predefined symbol) . . . . . . . . . . . . . . . . . 5 DF32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ASCII character constants . . . . . . . . . . . . . . . . . . . . . . . . . . 4 DF64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ASEG (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . 49 DS16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ASEGN (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 49 DS24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
asm (file extension) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 DS32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
ASMARM (environment variable) . . . . . . . . . . . . . . . . . . 10 DS8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
assembler control directives . . . . . . . . . . . . . . . . . . . . . . . . 80 ELSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
assembler diagnostics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 ELSEIF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
assembler directives END. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
ALIAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 ENDIF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
ALIGNRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 ENDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
ALIGNROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 ENDMOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
ARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 ENDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
ASEG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 EQU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
ASEGN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 EVEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
assembler control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 EXITM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
ASSIGN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 EXPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
call frame information. . . . . . . . . . . . . . . . . . . . . . . . . . 83 EXTERN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

117

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 IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
IMPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 SETA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
INCLUDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 STACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
labels, using. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
LIBRARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 symbol control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
LIMIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
list file control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 THUMB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
LOCAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 value assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
LSTCND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 VAR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
LSTCOD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #define. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LSTEXP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #elif . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LSTMAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #else. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LSTOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #endif. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LSTPAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LSTREP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LSTXRF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 #ifdef . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LTORG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 #ifndef . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
MACRO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 #include . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
macro processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 #message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
MODULE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 #undef . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
module control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 $. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
MULTWEAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 /*...*/ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
NAME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 //. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
ODD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
ORG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 assembler expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
PAGE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 assembler instructions
PAGSIZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 ADD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 BL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101–102
PROGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 BX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
PUBLIC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 LDR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
PUBWEAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 MOV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
RADIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 MVN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
REPT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 SUB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
REPTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 assembler labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
REPTI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 assembler directives, using with . . . . . . . . . . . . . . . . . . 41
REQUIRE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 defining and undefining . . . . . . . . . . . . . . . . . . . . . . . . 75
RSEG. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 format of . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
RTMODEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 in Thumb code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
segment control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

ARM® IAR Assembler

118 Reference Guide

AARM-7
 Index

assembler list files LWRD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

conditional code and strings . . . . . . . . . . . . . . . . . . . . . 70 precedence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
conditions, specifying . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
cross-references SFE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
generating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SIZEOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
table, generating . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 synonyms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
disabling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 UGT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
enabling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 ULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
filename, specifying . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 XOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
format, specifying . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 ! . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
generated lines, controlling . . . . . . . . . . . . . . . . . . . . . . 70 != . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
generating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
header section, omitting . . . . . . . . . . . . . . . . . . . . . . . . 17 & . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
lines per page, specifying . . . . . . . . . . . . . . . . . . . . . . . 18 &&. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
macro execution information, including . . . . . . . . . . . . 12 *. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
macro-generated lines, controlling . . . . . . . . . . . . . . . . 70 + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
tab spacing, specifying . . . . . . . . . . . . . . . . . . . . . . . . . 20 - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26–27
using directives to format . . . . . . . . . . . . . . . . . . . . . . . 71 / . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
#include files, specifying. . . . . . . . . . . . . . . . . . . . . . . . 15 :AND: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
assembler macros :EOR:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
arguments, passing to . . . . . . . . . . . . . . . . . . . . . . . . . . 62 :LAND: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
defining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 :LEOR: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
generated lines, controlling in list file. . . . . . . . . . . . . . 70 :LNOT: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
in-line routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 :LOR:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
predefined symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 :MOD: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 :NOT:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
quote characters, specifying . . . . . . . . . . . . . . . . . . . . . 17 :OR: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
special characters, using . . . . . . . . . . . . . . . . . . . . . . . . 62 :SHL: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
assembler object file, specifying filename . . . . . . . . . . . . . 18 :SHR:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
assembler operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 < . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
BYTE1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 << . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
BYTE2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 <= . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
BYTE3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 <> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
BYTE4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 = . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DATE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 == . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
HIGH. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 > . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
HWRD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 >= . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
in expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 >> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
LOW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 ^. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

119

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 | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 assembler source files, including . . . . . . . . . . . . . . . . . 76, 82
|| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 assembler source format. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
~. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 assembler subversion number . . . . . . . . . . . . . . . . . . . . . . . 6
assembler options assembler symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
command line, setting . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 exporting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
extended command file, setting. . . . . . . . . . . . . . . . . . . . 9 importing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 in relocatable expressions . . . . . . . . . . . . . . . . . . . . . . . . 2
typographic convention . . . . . . . . . . . . . . . . . . . . . . . . . . x local . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
-B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 predefined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
-c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 undefining. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
-D. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 redefining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
-E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 assembly error messages . . . . . . . . . . . . . . . . . . . . . . . . . 109
-e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 assembly warning messages. . . . . . . . . . . . . . . . . . . . . . . 109
-endian. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 disabling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
-f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9, 14 ASSIGN (assembler directive). . . . . . . . . . . . . . . . . . . . . . 54
-G. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 assumptions (programming experience) . . . . . . . . . . . . . . ix
-I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
-i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
-j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 B
-L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 -B (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
-l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 backtrace information, defining . . . . . . . . . . . . . . . . . . . . . 83
-M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 bitwise AND (assembler operator) . . . . . . . . . . . . . . . . . . 29
-N. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 bitwise exclusive OR (assembler operator) . . . . . . . . . . . . 30
-n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 bitwise NOT (assembler operator) . . . . . . . . . . . . . . . . . . . 29
-O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 bitwise OR (assembler operator) . . . . . . . . . . . . . . . . . . . . 29
-o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 BL (assembler instruction). . . . . . . . . . . . . . . . . . . . 101–102
-p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 _ _BUILD_NUMBER_ _ (predefined symbol) . . . . . . . . . . 6
-r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 BX (assembler instruction) . . . . . . . . . . . . . . . . . . . . . . . . 47
-S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 byte order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
-s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 specifying . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
-t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 BYTE1 (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 30
-U. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 BYTE2 (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 30
-v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13–14 BYTE3 (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 30
-w. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 BYTE4 (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 30
-x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
assembler output format. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
assembler output, including debug information. . . . . . . . . 19
C
assembler pseudo-instructions . . . . . . . . . . . . . . . . . . . . . . 97 -c (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
assembler source code, porting . . . . . . . . . . . . . . . . . . . . . 47 call frame information directives . . . . . . . . . . . . . . . . . . . . 83
case-sensitive user symbols . . . . . . . . . . . . . . . . . . . . . . . . 19

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case sensitivity, controlling . . . . . . . . . . . . . . . . . . . . . . . . 82 DATA (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 47

CASEOFF (assembler directive) . . . . . . . . . . . . . . . . . . . . 81 data, defining in Thumb code segment . . . . . . . . . . . . . . . 47
CASEON (assembler directive) . . . . . . . . . . . . . . . . . . . . . 81 _ _DATE_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . 6
CFI directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 DATE (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 31
CFI expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 DCB (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 78
CFI operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 DCD (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . . 78
character constants, ASCII. . . . . . . . . . . . . . . . . . . . . . . . . . 4 DCW (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
CODE16 (assembler directive) . . . . . . . . . . . . . . . . . . . . . 47 DC8 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 78
CODE32 (assembler directive) . . . . . . . . . . . . . . . . . . . . . 47 DC16 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
COL (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 69 DC24 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
command line error messages, assembler . . . . . . . . . . . . 109 DC32 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
command line options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 debug information, including in assembler output. . . . . . . 19
command line, extending . . . . . . . . . . . . . . . . . . . . . . . . . . 14 #define (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 74
comments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 DEFINE (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 54
assembler directives, using with . . . . . . . . . . . . . . . . . . 41 DF32 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
in assembler souce code . . . . . . . . . . . . . . . . . . . . . . . . . 1 DF64 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
multi-line, using with assembler directives. . . . . . . . . . 83 diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
common segments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 directives. See assembler directives
COMMON (assembler directive). . . . . . . . . . . . . . . . . . . . 49 DIV (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
COMPLEMENT (CFI operator) . . . . . . . . . . . . . . . . . . . . 93 division (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 27
computer style, typographic convention . . . . . . . . . . . . . . . x document conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
conditional assembly directives . . . . . . . . . . . . . . . . . . . . . 58 DS8 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 78
See also C-style preprocessor directives DS16 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
conditional code and strings, listing. . . . . . . . . . . . . . . . . . 70 DS24 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
conditional list file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 DS32 (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 78
configuration, processor. . . . . . . . . . . . . . . . . . . . . . . . 13–14
constants, integer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
conventions, typographic . . . . . . . . . . . . . . . . . . . . . . . . . . . x E
CPU, defining in assembler. See processor configuration -E (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
cross-references, in assembler list file edition notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
generating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 efficient coding techniques. . . . . . . . . . . . . . . . . . . . . . . . . . 7
table, generating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 #elif (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 74
current time/date (assembler operator) . . . . . . . . . . . . . . . 31 #else (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 74
C-style preprocessor directives . . . . . . . . . . . . . . . . . . . . . 74 ELSE (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 58
ELSEIF (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 58

D END (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 42

endianess. See byte order
-D (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 #endif (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 74
data allocation directives . . . . . . . . . . . . . . . . . . . . . . . . . . 78 ENDIF (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 58
data definition directives . . . . . . . . . . . . . . . . . . . . . . . . . . 78 ENDM (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 60

121

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 ENDMOD (assembler directive) . . . . . . . . . . . . . . . . . . . . 42 formats
ENDR (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 60 assembler output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
environment variables assembler source code. . . . . . . . . . . . . . . . . . . . . . . . . . . 1
AARM_INC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 fourth byte (assembler operator) . . . . . . . . . . . . . . . . . . . . 30
ASMARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 --fpu (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . 14
:EOR: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 30 FRAME (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
EQ (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
EQU (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 54
equal (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . 28 G
#error (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 74 -G (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
error messages GE (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
maximum number, specifying. . . . . . . . . . . . . . . . . . . . 13 global value, defining. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
using #error to display. . . . . . . . . . . . . . . . . . . . . . . . . . 76 greater than or equal (assembler operator). . . . . . . . . . . . . 28
EVEN (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . 49 greater than (assembler operator). . . . . . . . . . . . . . . . . . . . 28
EXITM (assembler directive). . . . . . . . . . . . . . . . . . . . . . . 60 GT (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
experience, programming. . . . . . . . . . . . . . . . . . . . . . . . . . ix
EXPORT (assembler directive) . . . . . . . . . . . . . . . . . . . . . 45
expressions. See assembler expressions
H
extended command line file (extend.xcl) . . . . . . . . . . . . 9, 14 header files, SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
EXTERN (assembler directive) . . . . . . . . . . . . . . . . . . . . . 45 header section, omitting from assembler list file . . . . . . . . 17
high byte (assembler operator). . . . . . . . . . . . . . . . . . . . . . 31
high word (assembler operator) . . . . . . . . . . . . . . . . . . . . . 31
F HIGH (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 31
-f (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9, 14 HWRD (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 31
false value, in assembler expressions . . . . . . . . . . . . . . . . . . 2
fatal errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
_ _FILE_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . . 6
I
file extensions -I (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
asm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 -i (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
msa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 _ _IAR_SYSTEMS_ASM_ _ (predefined symbol). . . . . . . 6
r79 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 #if (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . . . . 74
s79 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 IF (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
xcl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9, 14 IF (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
file types #ifdef (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 74
assembler source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 #ifndef (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 74
extended command line. . . . . . . . . . . . . . . . . . . . . . . 9, 14 IMPORT (assembler directive) . . . . . . . . . . . . . . . . . . . . . 45
#include . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 #include files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
filenames, specifying for assembler object file . . . . . . . . . 18 #include (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 74
first byte (assembler operator) . . . . . . . . . . . . . . . . . . . . . . 30 include paths, specifying . . . . . . . . . . . . . . . . . . . . . . . . . . 15
floating-point constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 INCLUDE (assembler directive) . . . . . . . . . . . . . . . . . . . . 81

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instruction set, ARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix low byte (assembler operator) . . . . . . . . . . . . . . . . . . . . . . 32

integer constants. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 low register values, moving . . . . . . . . . . . . . . . . . . . . . . . 106
internal errors, assembler . . . . . . . . . . . . . . . . . . . . . . . . . 110 low word (assembler operator). . . . . . . . . . . . . . . . . . . . . . 32
in-line coding, using macros . . . . . . . . . . . . . . . . . . . . . . . 64 LOW (assembler operator). . . . . . . . . . . . . . . . . . . . . . . . . 32
iomacros.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 LSHIFT (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
LSTCND (assembler directive) . . . . . . . . . . . . . . . . . . . . . 69

L LSTCOD (assembler directive) . . . . . . . . . . . . . . . . . . . . . 69

LSTEXP (assembler directives) . . . . . . . . . . . . . . . . . . . . . 69
-L (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 LSTMAC (assembler directive) . . . . . . . . . . . . . . . . . . . . . 69
-l (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 LSTOUT (assembler directive) . . . . . . . . . . . . . . . . . . . . . 69
labels. See assembler labels LSTPAG (assembler directive). . . . . . . . . . . . . . . . . . . . . . 69
:LAND: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . 29 LSTREP (assembler directive). . . . . . . . . . . . . . . . . . . . . . 69
LDR (ARM) (pseudo-instruction) . . . . . . . . . . . . . . . . . . 103 LSTXRF (assembler directive) . . . . . . . . . . . . . . . . . . . . . 69
LDR (assembler instruction) . . . . . . . . . . . . . . . . . . . . . . 103 LT (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
LDR (CODE16) (pseudo-instruction) . . . . . . . . . . . . . . . 104 LTORG (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 81
LDR (THUMB) (pseudo-instruction) . . . . . . . . . . . . . . . 105 LWRD (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 32
LE (CFI operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
:LEOR: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 36
less than or equal (assembler operator) . . . . . . . . . . . . . . . 27 M
less than (assembler operator) . . . . . . . . . . . . . . . . . . . . . . 27 -M (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
library modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 macro execution information, including in list file . . . . . . 12
LIBRARY (assembler directive) . . . . . . . . . . . . . . . . . . . . 42 macro processing directives . . . . . . . . . . . . . . . . . . . . . . . . 60
LIMIT (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 54 macro quote characters. . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
_ _LINE_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . . 6 specifying . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
lines per page, in assembler list file . . . . . . . . . . . . . . . . . . 18 MACRO (assembler directive). . . . . . . . . . . . . . . . . . . . . . 60
listing control directives . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 macros. See assembler macros
literal pool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 memory, reserving space in . . . . . . . . . . . . . . . . . . . . . . . . 78
LITERAL (CFI operator). . . . . . . . . . . . . . . . . . . . . . . . . . 93 #message (assembler directive) . . . . . . . . . . . . . . . . . . . . . 74
_ _LITTLE_ENDIAN_ _ (predefined symbol) . . . . . . . . . . 6 messages, excluding from standard output stream. . . . . . . 19
:LNOT: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 32 migration to the ARM IAR Assembler . . . . . . . . . . . . . . 111
LOAD (CFI operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 alternative mnemonics. . . . . . . . . . . . . . . . . . . . . . . . . 113
local value, defining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 alternative register names . . . . . . . . . . . . . . . . . . . . . . 112
LOCAL (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 60 operator synonyms . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
logical AND (assembler operator) . . . . . . . . . . . . . . . . . . . 29 warning messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
logical exclusive OR (assembler operator) . . . . . . . . . . . . 36 :MOD: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 32
logical NOT (assembler operator) . . . . . . . . . . . . . . . . . . . 32 MOD (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
logical OR (assembler operator) . . . . . . . . . . . . . . . . . . . . 32 mode control directives . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
logical shift left (assembler operator) . . . . . . . . . . . . . . . . 34 module consistency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
logical shift right (assembler operator) . . . . . . . . . . . . . . . 34 module control directives . . . . . . . . . . . . . . . . . . . . . . . . . . 42
:LOR: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 32 MODULE (assembler directive) . . . . . . . . . . . . . . . . . . . . 42

123

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 modules, terminating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 ORG (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . . 49
modulo (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . 32 output format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
MOV (assembler instruction). . . . . . . . . . . . . . . . . . . . . . 103
MOV (CODE16) (pseudo-instruction). . . . . . . . . . . . . . . 106
MOV (THUMB) (pseudo-instruction) . . . . . . . . . . . . . . . 106 P
msa (file extension) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 -p (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MUL (CFI operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 PAGE (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 69
multibyte character support . . . . . . . . . . . . . . . . . . . . . . . . 17 PAGSIZ (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 69
multiplication (assembler operator) . . . . . . . . . . . . . . . . . . 26 parameters
multi-module files, assembling . . . . . . . . . . . . . . . . . . . . . 43 in assembler directives . . . . . . . . . . . . . . . . . . . . . . . . . 42
MULTWEAK (assembler directive) . . . . . . . . . . . . . . . . . 45 typographic convention . . . . . . . . . . . . . . . . . . . . . . . . . . x
MVN (assembler instruction). . . . . . . . . . . . . . . . . . . . . . 103 porting assembler source code . . . . . . . . . . . . . . . . . . . . . . 47
precedence, of assembler operators . . . . . . . . . . . . . . . . . . 23

N predefined register symbols . . . . . . . . . . . . . . . . . . . . . . . . . 7

predefined symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
-N (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 in assembler macros . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
-n (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 undefining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
NAME (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 42 _ _ARMVFP_ _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
NE (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 _ _BUILD_NUMBER_ _ . . . . . . . . . . . . . . . . . . . . . . . . 6
NOP (ARM) (pseudo-instruction) . . . . . . . . . . . . . . . . . . 107 _ _DATE_ _. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
NOP (CODE16) (pseudo-instruction) . . . . . . . . . . . . . . . 107 _ _FILE_ _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
:NOT: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 29 _ _IAR_SYSTEMS_ASM_ _ . . . . . . . . . . . . . . . . . . . . . 6
not equal (assembler operator) . . . . . . . . . . . . . . . . . . . . . . 28 _ _LINE_ _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
NOT (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 _ _LITTLE_ENDIAN_ _ . . . . . . . . . . . . . . . . . . . . . . . . 6
no-operation code, generating . . . . . . . . . . . . . . . . . . . . . 107 _ _SUBVERSION_ _ . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
_ _TID_ _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–7

O _ _TIME_ _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
_ _VER_ _. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
-O (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 preprocessor symbol, defining . . . . . . . . . . . . . . . . . . . . . . 13
-o (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 prerequisites (programming experience) . . . . . . . . . . . . . . ix
ODD (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . . 49 processor configuration, specifying . . . . . . . . . . . . . . . 13–14
operands processor mode, directives . . . . . . . . . . . . . . . . . . . . . . . . . 47
format of . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 program location counter (PLC) . . . . . . . . . . . . . . . . . . . 1, 4
in assembler expressions . . . . . . . . . . . . . . . . . . . . . . . . . 2 setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
operations, format of . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 program modules, beginning . . . . . . . . . . . . . . . . . . . . . . . 43
operation, silent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PROGRAM (assembler directive) . . . . . . . . . . . . . . . . . . . 42
operators. See assembler operators programming experience, required . . . . . . . . . . . . . . . . . . ix
option summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 programming hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
:OR: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . 29 pseudo-instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
OR (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 ADR (ARM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

ARM® IAR Assembler

124 Reference Guide

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 Index

ADR (CODE16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
ADR (THUMB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 S
ADRL (ARM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 -S (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
ADRL (THUMB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 -s (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
LDR (ARM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 second byte (assembler operator). . . . . . . . . . . . . . . . . . . . 30
LDR (CODE16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 segment begin (assembler operator). . . . . . . . . . . . . . . . . . 33
LDR (THUMB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 segment control directives . . . . . . . . . . . . . . . . . . . . . . . . . 49
MOV (CODE16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 segment end (assembler operator) . . . . . . . . . . . . . . . . . . . 33
MOV (THUMB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 segment size (assembler operator) . . . . . . . . . . . . . . . . . . . 35
NOP (ARM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 segments
NOP (CODE16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 absolute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
_BF (ARM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 aligning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
_BF (THUMB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 common, beginning. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
_BLF (ARM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 relocatable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
_BLF (CODE16). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 stack, beginning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
_BLF (THUMB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 SET (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 54
PUBLIC (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 45 SETA (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 54
PUBWEAK (assembler directive) . . . . . . . . . . . . . . . . . . . 45 SFB (assembler operator). . . . . . . . . . . . . . . . . . . . . . . . . . 33
SFE (assembler operator). . . . . . . . . . . . . . . . . . . . . . . . . . 33

R SFR. See special function registers

:SHL: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 34
-r (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 :SHR: (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . 34
RADIX (assembler directive). . . . . . . . . . . . . . . . . . . . . . . 81 silent operation, specifying in assembler . . . . . . . . . . . . . . 19
reference information, typographic convention . . . . . . . . . xi simple rules, in CFI directives . . . . . . . . . . . . . . . . . . . . . . 90
registered trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii SIZEOF (assembler operator) . . . . . . . . . . . . . . . . . . . . . . 35
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 source files, including . . . . . . . . . . . . . . . . . . . . . . . . . 76, 82
alternative names of . . . . . . . . . . . . . . . . . . . . . . . . . . 112 source format, assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
relocatable expressions, using symbols in . . . . . . . . . . . . . . 2 special function registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
relocatable segments, beginning . . . . . . . . . . . . . . . . . . . . 50 stack segments, beginning . . . . . . . . . . . . . . . . . . . . . . . . . 51
repeating statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 STACK (assembler directive). . . . . . . . . . . . . . . . . . . . . . . 49
REPT (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 60 standard input stream (stdin), reading from . . . . . . . . . . . . 15
REPTC (assembler directive). . . . . . . . . . . . . . . . . . . . . . . 60 standard output stream, disabling messages to . . . . . . . . . 19
REPTI (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 60 statements, repeating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
REQUIRE (assembler directive) . . . . . . . . . . . . . . . . . . . . 45 SUB (assembler instruction) . . . . . . . . . . . . . . . . . . . . . . . 98
RSEG (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 49 SUB (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
RSHIFTA (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . 94 subtraction (assembler operator) . . . . . . . . . . . . . . . . . . . . 27
RSHIFTL (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . 94 _ _SUBVERSION_ _ (predefined symbol) . . . . . . . . . . . . . 6
RTMODEL (assembler directive) . . . . . . . . . . . . . . . . . . . 42 symbol control directives . . . . . . . . . . . . . . . . . . . . . . . . . . 45
rules, in CFI directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 symbol values, checking . . . . . . . . . . . . . . . . . . . . . . . . . . 55
runtime model attributes, declaring . . . . . . . . . . . . . . . . . . 44

125

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 symbols user symbols, case sensitive . . . . . . . . . . . . . . . . . . . . . . . . 19
exporting to other modules . . . . . . . . . . . . . . . . . . . . . . 46
predefined, in assembler . . . . . . . . . . . . . . . . . . . . . . . . . 5
predefined, in assembler macro. . . . . . . . . . . . . . . . . . . 62 V
user-defined, case sensitive . . . . . . . . . . . . . . . . . . . . . . 19 -v (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . 13–14
See also assembler symbols value assignment directives . . . . . . . . . . . . . . . . . . . . . . . . 54
synonyms, of assembler operators . . . . . . . . . . . . . . . . . . . 25 values, defining temporary. . . . . . . . . . . . . . . . . . . . . . . . . 78
syntax VAR (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 54
assembler directives . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 _ _VER_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . . 6
See also assembler source format version, of assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
s79 (file extension) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
W
T -w (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
-t (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
tab spacing, specifying in assembler list file . . . . . . . . . . . 20 disabling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
target core, specifying. See processor configuration
target processor, specifying . . . . . . . . . . . . . . . . . . . . . 13–14
TASM assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
X
temporary values, defining. . . . . . . . . . . . . . . . . . . . . . 55, 78 -x (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
third byte (assembler operator) . . . . . . . . . . . . . . . . . . . . . 30 xcl (file extension) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9, 14
THUMB (assembler directive). . . . . . . . . . . . . . . . . . . . . . 47 XOR (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . 36
_ _TID_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . 6–7 XOR (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
_ _TIME_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . 6
time-critical code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
Symbols
! (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
true value, in assembler expressions . . . . . . . . . . . . . . . . . . 2
!= (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
typographic conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . x
#define (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 74
#elif (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 74
U #else (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . 74
#endif (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 74
-U (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
UGT (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . 35 #error (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 74
ULT (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . 36 #if (assembler directive). . . . . . . . . . . . . . . . . . . . . . . . . . . 74
UMINUS (CFI operator) . . . . . . . . . . . . . . . . . . . . . . . . . . 93 #ifdef (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 74
unary minus (assembler operator) . . . . . . . . . . . . . . . . . . . 26 #ifndef (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 74
unary plus (assembler operator) . . . . . . . . . . . . . . . . . . . . . 26 #include files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
#undef (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 74 #include (assembler directive) . . . . . . . . . . . . . . . . . . . . . . 74
unsigned greater than (assembler operator) . . . . . . . . . . . . 35 #message (assembler directive) . . . . . . . . . . . . . . . . . . . . . 74
unsigned less than (assembler operator) . . . . . . . . . . . . . . 36 #undef (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . 74

ARM® IAR Assembler

126 Reference Guide

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 Index

$ (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 < (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

$ (program location counter) . . . . . . . . . . . . . . . . . . . . . . . . 4 << (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
% (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 <= (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
& (assembler operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 <> (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
&& (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . 29 = (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
* (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 = (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
+ (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 == (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
- (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . 26–27 > (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
-B (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 >= (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
-c (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 >> (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
-D (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ^ (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
-E (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 _ _ARMVFP_ _ (predefined symbol) . . . . . . . . . . . . . . . . . 5
-e (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 _ _BUILD_NUMBER_ _ (predefined symbol) . . . . . . . . . . 6
-f (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9, 14 _ _DATE_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . 6
-G (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 _ _FILE_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . . 6
-I (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 _ _IAR_SYSTEMS_ASM_ _ (predefined symbol). . . . . . . 6
-i (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 _ _LINE_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . . 6
-j (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 _ _LITTLE_ENDIAN_ _ (predefined symbol) . . . . . . . . . . 6
-L (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 _ _SUBVERSION_ _ (predefined symbol) . . . . . . . . . . . . . 6
-l (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 _ _TID_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . 6–7
-M (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 _ _TIME_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . 6
-N (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 _ _VER_ _ (predefined symbol) . . . . . . . . . . . . . . . . . . . . . 6
-n (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 _args, predefined macro symbol . . . . . . . . . . . . . . . . . . . . 62
-O (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 _BF (ARM) (pseudo-instruction). . . . . . . . . . . . . . . . . . . 101
-o (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 _BF (THUMB) (pseudo-instruction) . . . . . . . . . . . . . . . . 101
-p (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 _BLF ( ARM) (pseudo-instruction) . . . . . . . . . . . . . . . . . 101
-r (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 _BLF (CODE16) (pseudo-instruction) . . . . . . . . . . . . . . 102
-S (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 _BLF (THUMB) (pseudo-instruction). . . . . . . . . . . . . . . 102
-s (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 | (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
-t (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 || (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
-U (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ~ (assembler operator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
-v (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . 13–14
-w (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
-x (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Numerics
--endian (assembler option) . . . . . . . . . . . . . . . . . . . . . . . . 14 32-bit expressions, loading in register . . . . . . . . . . . . . . . 103
--fpu (assembler option). . . . . . . . . . . . . . . . . . . . . . . . . . . 14
/ (assembler operator). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
/*...*/ (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . 80
// (assembler directive) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

127

AARM-7