HCF4047BE
HCF4047BE
PIN CONNECTION
BLOCK DIAGRAM
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HCF4047B
Astable Multivibrator
Free Running 4, 5, 6, 14 7, 8, 9, 12 - 10, 11, 13 tA (10,11) = 4.40RC
True Gating 4, 6, 14 7, 8, 9, 12 5 10, 11, 13
Complement Gating 6, 14 5, 7, 8, 9, 12 4 10, 11, 13 tA (13) = 2.20RC
Monostable Multivibrator
Positive - Edge Trigger 4, 14 5, 6, 7, 9, 12 8 10, 11
Negative - Edge Trigger 4, 8, 14 5, 7, 9, 12 6 10, 11
Retriggerable 4, 14 5, 6, 7, 9 8, 12 10, 11 tM (10,11) = 2.48RC
External Countdown** 14 5, 6, 7, 8, 9, - 10, 11
12
* In all cases external capacitor and resistor between pins, 1, 2 and 3 (see logic diagrams).
** Input pulse to Reset of External Counting Chip.
External Counting Chip Output to pin 4.
LOGIC DIAGRAM
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HCF4047B
DETAIL FOR FLIP-FLOPS FF1 AND FF3 (a) AND FOR FLIP-FLOPS FF2 AND FF4 (b)
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HCF4047B
DC SPECIFICATIONS
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HCF4047B
coupling "Q" to an external "N" counter and power-on reset pulse, must be applied to the
resetting the counter with the trigger pulse. The EXTERNAL RESET whenever VDD is applied.
counter output pulse is fed back to the ASTABLE
input and has a duration equal to N times the
2 - ASTABLE MODE
period of the multivibrator. A high level on the
EXTERNAL RESET input assures no output pulse The following analysis presents worst-case
during an "ON" power condition. This input can variations from unit-to-unit as a function of
also be activated to terminate the output pulse at transfer-voltage (VTR) shift (33% - 67% VDD) for
any time. In the monostable mode, a high-level or free-running (astable) operation.
VTR
t1 = -RC In —————
VDD + VTR
VDD - VTR
t2 = -RC In —————
2VDD - VTR
(VTR)(VDD - VTR)
t3 = 2(t1+t2)= -2RC In ———————————
(VDD + VTR)(2VDD - VTR)
MONOSTABLE WAVEFORMS
VTR
t1 = -RC In ———
2VDD
VDD - VTR
t2 = -RC In —————
2VDD - VTR
(VTR)(VDD - VTR)
tM = (t1+t2)= -RC In —————————
(2VDD - VTR)(2VDD)
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HCF4047B
Where tM = monostable mode pulse width. Values to extend the output-pulse duration, or to compare
for tM are as follows : the frequency of an input signal with that of the
Typ : VTR = 0.5 VDD tM = 2.48 RC internal oscillator. In the retrigger mode the input
Min : VTR = 0.33 VDD tM = 2.71 RC pulse is applied to terminals 8 and 12, and the
Max : VTR = 0.67 VDD tM = 2.48 RC output is taken from terminal 10 or 11. As shown in
Thus if tM = 2.48 RC is used, the maximum fig.A normal monostable action is obtained when
variation will be (+ 9.3%, - 0.0%). one retrigger pulse is applied. Extended pulse
Note : In the astable mode, the first positive half
duration is obtained when more than one pulse is
cycle has a duration of TM ; succeeding durations
are tA/2. applied. For two input pulses, tRE = t 1’ + t1 + 2t2.
In addition to variations from unit to unit, the For more than two pulses, tRE (Q OUTPUT)
monostable pulse width may vary as a function of terminates at some variable time tD after the
frequency with respect to VDD and temperature. termination of the last retrigger pulse. tD is variable
because tRE (Q OUTPUT) terminates after the
4 - RETRIGGER MODE second positive edge of the oscillator output
The HCF4047B can be used in the retrigger mode appears at flip-flop 4 (see logic diagram).
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HCF4047B
TEST CIRCUIT
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HCF4047B
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
a1 0.51 0.020
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 15.24 0.600
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
P001A
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HCF4047B
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S 8° (max.)
PO13G
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HCF4047B
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