Assembly Language

1 (a) The current contents of main memory and selected values from the ASCII character set are
given.

(i) Trace the program currently in memory using the trace table.

Instruction Memory address

ACC IX Output
Address Instruction address 100 101 110 111 112
77 LDR #0
0 0 66 65 35
78 LDX 110
79 CMP #35
80 JPE 92
81 ADD 100
82 STO 101
83 LDM #1
84 ADD 100
85 STO 100
86 INC IX
87 LDX 110
88 CMP #35
89 JPN 81
90 LDD 100
91 ADD #48
92 OUT
93 END
…
100 0
101 0
…
110 66
111 65
112 35

ASCII
Character
value
49 1
50 2
51 3
52 4

65 A
66 B
67 C
68 D
[Turn over

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(ii) The following instructions are repeated for your reference.

Instruction
Explanation
Opcode Operand
LDD <address> Direct addressing. Load the contents of the location at the given
address to ACC
STO <address> Store contents of ACC at the given address

State the purpose of this part of an assembly language program.

LDD 100
STO 165
LDD 101
STO 100
LDD 165
STO 101
...........................................................................................................................................

...........................................................................................................................................
[1]
 3

(b) The following table shows another part of the instruction set for the processor.

(i) The current contents of the ACC are:

1 0 0 1 0 0 1 1

Show the result after the execution of the following instruction.

XOR B00011111
...........................................................................................................................................

...........................................................................................................................................

[1]

(ii) The current contents of the ACC are:

1 0 0 1 0 0 1 1

Show the result after the execution of the following instruction.

AND B11110000
...........................................................................................................................................

...........................................................................................................................................

[1]
 (iii) The current contents of the ACC are:

1 0 0 1 0 0 1 1

Show the result after the execution of the following instruction.

OR B11001100
...........................................................................................................................................

...........................................................................................................................................

[1]
(iv) The current contents of the ACC are:

1 0 0 1 0 0 1 1

Show the result after the execution of the following instruction.

LSR #2
...........................................................................................................................................

...........................................................................................................................................

[1]

(c) Tick (3) one or more boxes in each row to indicate whether the task is performed in the first
pass or the second pass of a two-pass assembler.

Task First pass Second pass

Remove comments.

Read the assembly language program one line at a time.

Generate the object code.

Check the opcode is in the instruction set.

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 5

2 (a) There are two errors in the following register transfer notation for the fetch‑execute cycle.

1 MAR [PC]

2 PC [PC] − 1

3 MDR [MAR]

4 CIR [MDR]

Complete the following table by:

• identifying the line number of each error
• describing the error
• writing the correct statement.

Line
Description of the error Correct statement
number

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 6

3 The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
Immediate addressing. Load the denary number n to
LDM #n 0000 0001
ACC.
Direct addressing. Load the contents of the location
LDD <address> 0000 0010
at the given address to ACC.
Indirect addressing. At the given address is the
LDI <address> 0000 0101 address to be used. Load the contents of this second
address to ACC.
Indexed addressing. Form the address from
<address> + the contents of the Index Register
LDX <address> 0000 0110
(IX). Copy the contents of this calculated address to
ACC.
LDR #n 0000 0111 Immediate addressing. Load number n to IX.
STO <address> 0000 1111 Store the contents of ACC at the given address.

The following diagram shows the contents of a section of main memory and the Index Register (IX).

(a) Show the contents of the Accumulator (ACC) after each instruction is executed.

IX 0 0 0 0 0 0 1 1

Main
(i) LDM #500
Memory
Address contents
ACC ................................................................[1]
495 13
(ii) LDD 500
496 86
ACC ................................................................[1] 497 92

(iii) LDX 500 498 486

499 489
ACC ................................................................[1]
500 496
(iv) LDI 500 501 497
ACC ................................................................[1] 502 499
503 502
 7

(b) Each machine code instruction is encoded as 16-bits (8-bit op code followed by an 8-bit
operand).

Write the machine code for the following instructions:

LDM #17

LDX #97

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(c) Using an 8-bit operand, state the maximum number of memory locations, in denary, that can
be directly addressed.

...............................................................................................................................................[1]

(d) Computer scientists often write binary representations in hexadecimal.

(i) Write the hexadecimal representation for this instruction:

0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0

.......................................................................................................................................[2]

(ii) A second instruction has been written in hexadecimal as:

05 3F

Write the equivalent assembly language instruction, with the operand in denary.

.......................................................................................................................................[2]
 (c) The table shows assembly language instructions for a processor which has one general
purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Explanation
Op code Operand
LDM #n Immediate addressing. Load the denary number n to ACC.
Direct addressing. Load the contents of the location at the given address to
LDD <address>
ACC.
Indexed addressing. Form the address from <address> + the contents of the
LDX <address>
Index Register. Copy the contents of this calculated address to ACC.
LDR #n Immediate addressing. Load the denary number n to IX.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
INC <register> Add 1 to the contents of the register (ACC or IX).
CMP #n Compare contents of ACC with denary number n.
JPE <address> Following a compare instruction, jump to <address> if the compare was True.
JPN <address> Following a compare instruction, jump to <address> if the compare was False.
JMP <address> Jump to the given address.
OUT Output to screen the character whose ASCII value is stored in ACC.
END Return control to the operating system.

The current contents of the main memory, Index Register (IX) and selected values from the
ASCII character set are:

Address Instruction ASCII code table (Selected codes only)

20 LDM #0 ASCII Code Character
21 STO 300
22 CMP #0 65 A
23 JPE 28 66 B
24 LDX 100 67 C
25 ADD 301
26 OUT 68 D
27 JMP 30 69 E
28 LDX 100 97 a
29 OUT
30 LDD 300 98 b
31 INC ACC 99 c
32 STO 300 100 d
33 INC IX
101 e
34 CMP #2
35 JPN 22
36 END
…
100 65
101 67
102 69
103 69
104 68
…
300
301 33

IX 0
 Trace the program currently in memory using the following trace table. The first instruction
has been completed for you.

Instruction Memory address

ACC IX OUTPUT
address 100 101 102 103 104 300 301

65 67 69 69 68 33 0

20 0

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