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Tugas Extracted Pages From Solid State Circuits

1) A square wave with an amplitude of ±15 V and source resistance of 1 kΩ needs to be clamped to a maximum positive level of approximately 9 V. The square wave frequency ranges from 500 Hz to 5 kHz, and the output tilt is not to exceed 1%. 2) Using the equations for maximum output tilt and required capacitance and resistance, the designer calculates values of 1 mF for the capacitor and 100 kΩ for the resistance. 3) Based on the calculated maximum positive output voltage of 8.3 V, and reviewing the diode data sheet, the designer selects 1N756 Zener diodes for the clamping circuit.

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0% found this document useful (0 votes)
24 views

Tugas Extracted Pages From Solid State Circuits

1) A square wave with an amplitude of ±15 V and source resistance of 1 kΩ needs to be clamped to a maximum positive level of approximately 9 V. The square wave frequency ranges from 500 Hz to 5 kHz, and the output tilt is not to exceed 1%. 2) Using the equations for maximum output tilt and required capacitance and resistance, the designer calculates values of 1 mF for the capacitor and 100 kΩ for the resistance. 3) Based on the calculated maximum positive output voltage of 8.3 V, and reviewing the diode data sheet, the designer selects 1N756 Zener diodes for the clamping circuit.

Uploaded by

Agus Suwardono
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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80 Chap.

3 DIODE SWITCHING

EXAMPLE 3-9

A square wave having an amplitude of ±15 V and a source resistance R,


of 1 kfi isclamped to a maximum positive level of approximately
to be
9 V. The square wave frequency ranges from 500 Hz to 5 kHz, and the
output tilt is not to exceed 1%. Design a suitable Zener diode clamping
circuit.

solution

Maximum tilt occurs when the PW is longest, i.e., when/is a minimum.

Maximum / = -— = TT-r-rz- = 2 ms
/min 500 Hz
PW = 4r = 1ms

From Equation (3-1),

PW 1 ms
C = = = 1 mF [standard value (see Appendix 2)]
R, 1 kft

For l%tih, V = 0.01 X 2E.

From Equation (3-2),

2E X PW
R, =
0.01 X 2£' X C
2£' X 1 ms
= 100 kfi [standard value (see Appendix 2)]
0.01 X 2£ X 1 mF

V - V — V
= 9 V - 0.7 V = 8.3 V

From the regulator diode data sheet (Appendix 1-3), the 1N756 has V^ =
8.2 V; therefore use 1N756 diodes. The capacitor voltage should be at
least Vj + V^, i.e., minimum capacitor voltage is 23.2 V for this circuit.

REVIEW QUESTIONS AND PROBLEMS


3-1 Sketch typical characteristics for a low-current silicon diode.
Briefly explain why the diode can be thought of as a one-way
device.
REVIEW QUESTIONS AND PROBLEMS 81

3-2 Sketch ideal diode characteristics, and approximate characteristics


for siUcon and germanium diodes. Briefly discuss the parameters
that should be considered when selecting a diode.

3-3 Explain the origin of reverse recovery time for a semiconductor


diode. By means of sketches, explain why a large reverse current
flows when a very fast reverse bias is applied to a diode. Also show
how the reverse current can be minimized.

3-4 Sketch typical characteristics for a Zener diode. Indicate all im-
portant quantities related to the characteristics, and define each
quantity.

3-5 Sketch the circuit of a positive series clipper, showing the input and
output waveforms. Briefly explain its operation.
3-6 Repeat Problem 3-5 for a negative series clipper.

3-7 A negative series clipping circuit employs a diode with Vp = 0.3 V


and /^ = 10 //A. The input voltage is ±9 V, and the output current
is to be a maximum of 10 mA. Calculate the value of the resistance
/?,. Specify the diode in terms of forward current, power dissipa-
tion, and peak reverse voltage. The negative output voltage is to be
maximum at 0.2 V.

3-8 Design a circuit to clip the positive peaks off" a ±20 V square wave.
A silicon diode is available with a maximum reverse leakage current
of 10 nA. The positive output voltage is not to exceed 0.5 V. Cal-
culate the amplitude of the negative output peak.

3-9 From the diode data sheets in Appendix 1 select a suitable device
for the circuit designed in Problem 3-8.
3-10 Sketch the circuit of a diode noise clipper, showing typical input
and output waveforms., Briefly explain how the circuit operates.

3-11 Repeat Problem 3-10 for a Zener diode noise clipper.


3-12 A Zener diode noise clipper has an input pulse signal with an am-
plitude of ±7 V and with noise amplitude of ±3 V. Design a cir-
cuit and select suitable Zener diodes and resistance value. Also
calculate the amplitude of the output signal.

3-13 A pnp transistor which can take a maximum of 5 V in reverse at


its base-emitter junction is from excessive input
to be protected
signal amplitude. Identify the required circuit and sketch the input
and output waveforms. Briefly explain the operation of the circuit.
3-14 Repeat Problem 3-13 for an npn transistor.

3-15 A negative shunt clipper circuit has a square wave input of ±15 V.
The output voltage is to be 13 V and -0.7 V, and the output cur-
rent is to be 250m A. Calculate the required resistance value, and
the diode forward current.
82 Chap. 3 DIODE SWITCHING

3-16 Sketch the circuit of a biased diode shunt clipper that has an output
limited to a maximum of approximately ±4 V. Explain the opera-
tion of the circuit.

3-17 The input Problem 3-16 is ±16 V, and the output


to the circuit of
current is500 ^ A. Determine the required resistance value,
to be
allowing the diode forward currents to be 10 mA.
3-18 Sketch a Zener diode shunt clipper circuit, and select suitable

-AA/W- -W-

Input Output Input Output


5 Y ^^

(a) (b)

O *^^^/\r- o \AAAr
6 V ,25

Input Output Input Output


6 V

(c) (d)

-WW o o VWV 1
o
i I 1 r Output
Input
6V 1
1
Output Input
^ + 5 V
1 o

(e) (0

o WW- -^W\Ar
Output Output
Input Input
-5 V ^ 5 V

(g) (h)

-M- AAAAr

Input Output Input Output

(i) U)

FIGURE 3-13. Circuits for Problem 3-24.


REVIEW QUESTIONS AND PROBLEMS 83

diodes which will clip off input peaks greater than approximately
6 V. Explain the operation of the circuit.

3-19 A =b 14 V square wave is applied to the circuit of Problem 3-18. The


output current is to be 2 mA maximum. Design a suitable current.
3-20 Define the difference between clipping and clamping circuits. A
±10V square wave is applied to the input terminals of a negative
voltage clamping circuit, and to the input of a negative shunt clip-
per. Sketch the output waveform that will result in each case.

3-21 Sketch a negative voltage clamping circuit, showing input and out-
put waveforms. Briefly explain the operation of the circuit.
3-22 Repeat Problem 3-21 for a positive voltage clamper.

3-23 A negative voltage clamper has a 5 kHz square wave input with an
amplitude of ±6 V. The signal source resistance is 1 k 12, and the tilt
on the output waveform is not to exceed 1%. Design a suitable
circuit.

3-24 Sketch the output waveforms you would expect from each of the
shown in Figure 3-13. Assume the input to each circuit is a
circuits
± 12 V square wave.
3-25 Sketch the output waveforms you would expect from each of the
circuits shown in Figure 3-14. Assume the input to each circuit is a
±9 V square wave.
3-26 Design a biased clamper circuit to clamp a ± 12 V square wave to a
minimum level of -1-3 V. The input waveform has a frequency
which ranges from IkHz to 10 kHz, and the signal source resistance
is 500S2. The tilt on the output is not to exceed 1%.

6 V
Input Output Input Output

(a) (b)

Output
Input Output Input

5 V + 5 V
o
(c) (d)

FIGURE 3-14. Circuits for Problem 3-25.


84 Chap. 3 DIODE SWITCHING

3-27 A square wave having an amplitude of =fcl8V and a source resis-

tance of 700i2 is to be clamped to a maximum positive level of


approximately 10 V. The square wave frequency is 800 Hz, and the
output tilt is not to exceed 0.5%. Design a suitable Zener diode
clamping circuit.

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