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8086 Microprocessor

The document discusses the architecture and instruction set of the 8086 CPU. It describes the 8086 as a 16-bit microprocessor that can address up to 1 MB of memory using a 20-bit address bus. The 8086 has a 16-bit data bus and internal registers. It also discusses the similarities and differences between the 8086 and 8088 microprocessors. The internal architecture of the 8086 including the Bus Interface Unit and Execution Unit is explained.

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0% found this document useful (0 votes)
25 views

8086 Microprocessor

The document discusses the architecture and instruction set of the 8086 CPU. It describes the 8086 as a 16-bit microprocessor that can address up to 1 MB of memory using a 20-bit address bus. The 8086 has a 16-bit data bus and internal registers. It also discusses the similarities and differences between the 8086 and 8088 microprocessors. The internal architecture of the 8086 including the Bus Interface Unit and Execution Unit is explained.

Uploaded by

sheham ihjam
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 32

8086 CPU ARCHITECURE AND INSTRUCTION SET

THE 8086 MICROPROCESSOR OVERVIEW

 The Intel 8086 is a 16 bit Microprocessor that is intended to be used as the CPU in a
Microcomputer.

 The term 16 bit means that it's ALU, its internal registers, and most of its instructions
are designed to work with 16 bit binary words.

 The 8086 has a 16 bit data bus, so it can read data from or write data to memory and
ports either 16 bits or 8 bits at a time.

 The 8086 has a 20 bit address bus, so it can address 2 20 or 1,048576 memory
locations.

 Sixteen bit words will be stored in two consecutive memory locations.

 If the first byte of a word is at an even address, the 8086 can read the entire word in
one operation.

 If the first byte of the word is at an odd address, the 8086 will read the first byte with
one bus operation and the second byte with another bus operation

 The main point here is that if the first byte of a 16 bit word is at an even address, the
8086 can read the entire word in one operation

8086 AND 8088

 The Intel 8088 has the same arithmetic logic unit, the same registers and the same
instruction set as the 8086.

 The 8088 also has a 20 bit address bus, so it can address any one of 1,048,576 bytes in
memory.

 The 8088 has an 8 bit data bus, so it can only read data from or write data to memory
and ports 8 bits at a time.

 The 8086 can read or write either 8 or 16 bits at a time.

 To read a 16 bit word from two successive memory locations, the 8088 will always have
to do two read operations.

 The Intel 80186 is an improved version of 8086,and 80188 is an improved version of


8088

 In addition to 16 bit CPU, the 80186 and 80188 each have programmer peripheral
devices integrated in the same package.

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8086 INTERNAL ARCHITECTURE

INTERNAL ARCHITECTURE OF 8086

Figure: Internal Architecture of 8086

 The 8086 CPU is divided into two independent functional parts : BIU (Bus Interface
Unit) and EU (Execution Unit)

 Dividing the work between these units speeds up the processing.

 The BIU send out address, fetches instructions from memory, reads data from ports and
memory, and writes data to ports and memory.

 In other words BIU handles all transfers of data and addresses on the buses for the
execution unit.

 The EU of the 8086 tells the BIU where to fetch the instructions and data from, decodes
instructions and executes instructions.

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A.THE EXECUTION UNIT
 The EU contains control circuitry which directs internal operations.

 A decoder in EU translates instructions fetched from memory into a series of actions


which the EU carries out.

 The EU has a 16 bit ALU which can add subtract, ND, OR, increment, decrement,
complement or shift binary numbers.

1. GENERAL PURPOSE REGISTERS

 The EU has eight general purpose registers, labeled AH, AL, BH, BL, CH, CL, DH and DL.

 These registers can be used individually for temporary storage of 8 bit data.

 The AL register is also called accumulator

 It has some features that the other general purpose registers do not have.

 Certain pairs of these general purpose registers can be used together to store 16 bit
words.

 The acceptable register pairs are AH and AL,BH and BL,CH and CL,DH and DL

 The AH-AL pair is referred to as the AX register, the BH-BL pair is referred to as the BX
register, the CH-CL pair is referred to as the CX register, and the DH-DL pair is referred
to as the DX register.

AX = Accumulator Register

BX = Base Register

CX = Count Register

DX = Data Register

2. FLAG REGISTER
 A Flag is a flip-flop which indicates some condition produced by the execution of an
instruction or controls certain operations of the EU.

 A 16 bit flag register in the EU contains 9 active flags.

 Figure below show shows the location of the nine flags in the flag register.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
U U U U OF DF IF TF SF ZF U AF U PF U CF

Figure: 8086 Flag Register Format

U = UNDEFINED

CONDITIONAL FLAGS
CF = CARRY FLAG [Set by Carry out of MSB]

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PF = PARITY FLAG [Set if Result has even parity]
AF= AUXILIARY CARRY FLAG FOR BCD
ZF = ZERO FLAG [Set if Result is 0]
SF = SIGN FLAG [MSB of Result]
OF = OVERFLOW FLAG

CONTROL FLAG
TF = SINGLE STEP TRAP FLAG
IF = INTERRUPT ENABLE FLAG
DF = STRING DIRECTION FLAG

 The six conditional flags in this group are the CF,PF,AF,ZF,SF and OF

 The three remaining flags in the Flag Register are used to control certain operations of
the processor.

 The six conditional flags are set or reset by the EU on the basis of the result of some
arithmetic or logic operation.

 The Control Flags are deliberately set or reset with specific instructions you put in your
program.

 The three control flags are the TF,IF and DF.

 Trap Flag is used for single stepping through a program.

 The Interrupt Flag is used to allow or prohibit the interruption of a program.

 The Direction Flag is used with string instructions.

3. POINTER REGISTERS
 The 16 bit Pointer Registers are IP,SP and BP respectively

 SP and BP are located in EU whereas IP is located in BIU

3.1 STACK POINTER (SP)


 The 16 bit SP Register provides an offset value, which when associated with the SS
register (SS:SP)

3.2 BASE POINTER (BP)


 The 16 bit BP facilitates referencing parameters, which are data and addresses that a
program passes via the stack.

 The processor combines the addresses in SS with the offset in BP.

 BP can also be combined with DI and SI as a base register for special addressing.

4. INDEX REGISTERS
 The 16 bit Index Registers are SI and DI

4.1 SOURCE INDEX (SI) REGISTER


 The 16 bit Source Index Register is required for some string handling operations

 SI is associated with the DS Register.

4.2 DESTINATION INDEX (DI) REGISTER


 The 16 bit Destination Index Register is also required for some string operations.
 In this context, DI is associated with the ES register.
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B. THE BUS INTERFACE UNIT

1. SEGMENT REGISTERS
1.1 CS REGISTER
 It contains the starting address of a program's code segment.

 This segment address plus an offset value in the IP register indicates the address of an
instruction to be fetched for execution

 For normal programming purpose, you need not directly reference this register.

1.2 DS REGISTER
 It contains the starting address of a program's data segment

 Instruction uses this address to locate data.

 This address plus an offset value in an instruction causes a reference to a specific byte
location in the data segment.

1.3 SS REGISTER
 Permits the implementation of a stack in memory
 It stores the starting address of a program's stack segment the SS register.
 This segment address plus an offset value in the Stack Pointer (SP) register indicates
the current word in the stack being addressed.

1.4 ES REGISTER
 It is used by some string operations to handle memory addressing.

 ES Register is associated with the DI Register.

2. INSTRUCTION POINTER (IP)


 The 16 bit IP Register contains the offset address of the next instruction that is to
execute.
 IP is associated with CS register as (CS:IP)

 For each instruction that executes, the processor changes the offset value in IP so that
IP in effect directs each step of execution.
3. THE QUEUE

 While the EU is decoding an instruction or executing an instruction which does not


require use of the buses, the BIU fetches up to six instructions bytes for the following
instructions.

 The BIU Stores prefetched bytes in First in First out register set called a queue.

 When the EU is ready for its next instruction, it simply reads the instruction bytes for
the instruction from the queue in the BIU.

 This is much faster than sending out an address to the system memory and waiting for
memory to send back the next instruction bytes or bytes.

 Fetching the next instruction while the current instruction executes is called pipeling.
8086 MEMORY ORGANIZATION

1. INTRODUCTION
 The Intel 8086 is a 16 bit Microprocessor that is intended to be used as the CPU in a
Microcomputer.

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 The 8086 has a 20 bit address bus so it can address any one of 2 20 or 1,048,576
memory locations.

 Each of the 1,048,576 memory address of the 8086 represents a byte-wide location.

 16 bit word will be stored in two consecutive memory locations.

 If the first byte of a word is at an even address, the 8086 can read the entire word in
one operation.

 If the first byte of a word is at an odd address, the 8086 will read the first byte with one
bus cycle and the second byte with another bus cycle.

FFFFFH FFFFEH

00003H 00002H
00001H 00000H

High bank (odd bank) Low bank (even bank)

Figure: The Physical Memory System of 8086

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2. ACCESSING DATA IN MEMORY

 An important point here is that an 8086 always stores the low byte of word in lower
address and stores high byte of word in higher address.

 Low Byte – Low Address : High Byte – High Address

 MOV AX,[437AH]

Assume DS=2000H

 To Compute the physical address Add 20000 H and 437AH

20000 H + 437A H = 2437AH

 2437A H is the physical address.

AX

52 2437BH AH AL

02 2437AH

20000 H [Start of Data Segment i.e. DS=2000H]

3. SEGMENTED MEMORY

 The 8086 BIU sends out 20 bit address so it can address any of 2 20 or 1,048,576 bytes
in memory.

 However at any given time the 8086 works with only four 65536 bytes (64 Kbyte)
segment within this 1,048,576 byte (1 Mbyte) Range

 Four segments are : Code Segment, Stack Segment, Data Segment and Extra Segment

 Four segment registers in BIU are used to hold the upper 16 bits of the starting address
of 4 memory segments that the 8086 is working with at a particular time.

 The 4 segment registers are code segment register (CS), stack segment register (SS),
data segment register (DS) and the extra segment register (ES).

 For small programs which do not need all 64 Kbytes in each segment can overlap.

 For example, the code segment holds the upper 16 bits of the starting address for the
segment from which the BIU is currently fetching instruction code bytes.

 The BIU always inserts zero for the lowest 4 bits of the 20 bit starting address.
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 If the code segment register contains 348A H then the code segment will start at
address 348A0 H

 A 64 Kbytes segment can be located anywhere within the 1 Mbyte address space, but
the segment will always start at an address with zeros in the lowest 4 bits.

ADVANTAGES OF SEGMENTATION [SEGMENT: OFFSET SCHEME]

Intel designed the 8086 family devices to access memory using the segment: offset approach
rather than accessing memory directly with 20 bit. The advantages are listed below.
 The segment: offset scheme requires only a 16 bit number to represent the base
address for a segment and only a 16 bit offset to access any location in a segment. This
means that 8086 has to manipulate and store only 16 bit quantities instead of 20 bit
quantities.

 This makes easier interface with 8 and 16 bit wide memory boards and with 16 bit
registers in the 8086.

 It allows programs to be relocated in memory system. A relocatable program is one


that can be placed in any area of memory and executed without change.

 It allows programs written to function in the real mode to operate in protected mode.

 Segmentation also makes easy to keep user's program and data separate from one
another and segmentation makes it easy to switch from one user's program to another
user's program.

DISADVANTAGE OF SEGMENT: OFFSET APPROACH

 The segment: offset scheme introduces complexity in hardware and software design.

DIFFERENT SEGMENT OFFSET COMBINATION


SEGMENT OFFSET SPECIAL PURPOSE

CS [CODE SEGMENT] IP [INSTRUCTION POINTER] INSTRUCTION ADDRESS

SS [STACK SEGMENT] SP [STACK POINTER] STACK ADDRESS


BP [BASE POINTER]

DS [DATA SEGMENT] BX [BASE REGISTER] DATA ADDRESS


DI [DESTINATION INDEX]
SI [SOURCE INDEX]
8 BIT NUMBER
16 BIT NUMBER

ES [EXTRA SEGMENT] DI [DESTINATION INDEX] STRING DESTINATION


ADDRESS

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ADDRESSING MODES

 The different ways in which a processor can access data are referred to as its
addressing modes.

 In assembly language statements, the addressing mode is indicated in the instruction


itself.

 The various addressing modes are

1. Register Addressing Mode


2. Immediate Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Base plus Index Addressing Mode
6. Register Relative Addressing Mode
7. Base Relative Plus Index Addressing Mode

1. REGISTER ADDRESSING MODE

 It is the most common form of data addressing.

 Transfers a copy of a byte/word from source register to destination register.

INSTRUCTION SOURCE DESTINATION


MOV AX,BX REGISTER BX REGISTER AX

 It is carried out with 8 bit registers AH,AL,BH,BL,CH,CL,DH & DL or with 16 bit registers
AX,BX,CX,DX,SP,BP,SI and DI.

 It is important to use registers of same size.

 Never mix an 8 bit register with a 16 bit register i.e. MOV AX,BL

EXAMPLES
MOV AL,BL : Copys BL into AL
MOV ES,DS : Copys DS into ES
MOV AX,CX : Copys CX into AX

2. IMMEDIATE ADDRESSING MODE

 The term immediate implies that the data immediately follow the hexadecimal opcode
in the memory.

 Note that immediate data are constant data.

 It transfers the source immediate byte/word of data in destination register or memory


location.

INSTRUCTION SOURCE DESTINATION


MOV CH,3AH DATA 3AH REGISTER AX

EXAMPLES
MOV AL,90 : Copys 90 into AL
MOV AX,1234H : Copys 1234H into AX
MOV CL,10000001B : Copys 100000001 binary value into CL

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3. DIRECT ADDRESSING MODE

 In this scheme, the address of the data is defined in the instruction itself.

 When a memory location is to be referenced, its offset address must be specified

INSTRUCTION SOURCE DESTINATION


MOV AL,[1234H] ASSUME DS=1000H REGISTER AL
10000 H + 1234 H
11234H

MEMORY LOCATION
11234 H

EXAMPLES
MOV AL,[1234H] : Copys the byte content of data segment memory location
11234H into AL.

MOV AL, NUMBER : Copys the byte content of data segment memory location
NUMBER into AL.

4. REGISTER INDIRECT ADDRESSING MODE

 Register Indirect Addressing allows data to be addressed at any memory location


through an offset address held in any of the following registers: BP, BX, DI and SI.

 The Index and Base registers are used to specify the address of data.

 It transfers byte/word between a register and a memory location addressed by an index


or base registers.

 The symbol [ ] denote indirect addressing.

 The data segment is used by default with register indirect addressing or any other
addressing mode that uses BX,DI or SI to address memory. If BP register addresses
memory, the stack segment is used by default.

INSTRUCTION SOURCE DESTINATION


MOV CL,[BX] ASSUME DS=1000H REGISTER CL
ASSUME BX=0300H
10000 H + 0300 H
10300H

MEMORY LOCATION
10300H

EXAMPLES
MOV CX,[BX] : Copys the word contents of the data segment memory
location addressed by BX into CX.

MOV [DI],BH : Copys BH into the data segment memory location


addressed by DI.

MOV [DI],[BX] : Memory to Memory moves are not allowed except with
string instructions.
5. BASE PLUS INDEX ADDRESSING MODE

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 Base plus index addressing is similar to indirect addressing because it indirectly
addresses memory data

 This type of addressing uses one base register (BP or BX) and one Index Register (DI or
SI) to indirectly address memory.

INSTRUCTION SOURCE DESTINATION


MOV [BX+SI],CL REGISTER CL ASSUME DS=1000H
ASSUME BX=0300H
ASSUME SI =0200H
10000H + 0300H + 0200H
10500H

MEMORY LOCATION
10500H

EXAMPLES
MOV CX,[BX+DI] : Copys the word contents of the data segment memory
location addressed by BX plus DI into CX.

MOV CH,[BP+SI] : Copys the byte contents of the stack segment memory
location addressed by BP plus SI into CH.

6. REGISTER RELATIVE ADDRESSING MODE

 In this case, the data in a segment of memory are addressed by adding the
displacement to the content of base or an index register (BP,BX ,DI or SI).

 Transfers a byte/word between a register and the memory location addressed by an


index or base register plus a displacement.

INSTRUCTION SOURCE DESTINATION


MOV [BX+4],CL REGISTER CL ASSUME DS=1000H
ASSUME BX=0300H
10000H + 0300H + 4H
10304H

MEMORY LOCATION
10304H

EXAMPLES
MOV ARRAY[SI],BL : Copys BL into the data segment memory location
addressed by ARRAY plus SI.

MOV LIST[SI+2],CL : Copys CL into the data segment memory location


addressed by sum of LIST, SI and 2.

7. BASE RELATIVE PLUS INDEX ADDRESSING MODE

 The base relative plus index addressing mode is similar to the base plus index
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addressing mode but it adds a displacement to form a memory address.

 Transfers a byte or word between a register and the memory location addressed by a
base and an index register plus a displacement.

INSTRUCTION SOURCE DESTINATION


MOV [BX+SI+05],CL REGISTER CL ASSUME DS=1000H
ASSUME BX=0300H
ASSUME SI =0200H
10000H + 0300H + 0200H +05H
10505H

MEMORY LOCATION
10505H

EXAMPLES
MOV LIST[BP+DI],CL : Copys CL into the stack segment memory location
addressed by the sum of LIST, BP and DI

MOV DH,[BX+DI+20H] : Copys the byte contents of the data segment


memory location addressed by the sum of BX,DI and
20H into DH

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INSTRUCTION SETS

1. DATA TRANSFER INSTRUCTIONS

1.1 GENERAL PURPOSE BYTE OR WORD TRANSFER INSTRUCTIONS

INSTRUCTIONS COMMENTS
MOV Copy byte or word from specified source to
specified destination.
MOV Destination,Source
MOV CX,04H
PUSH Copy specified word to top of stack.

PUSH Source
PUSH BX
POP Copy word from top to stack to specified
location.
POP Destination
POP AX
XCHG Exchange word or byte.

XCHG Destination,Source
XCHG AX,BX
XLAT Translate a byte in AL using a table in memory.
It first adds AL + BX to form memory address.
It then copys the content into AL

1.2 SIMPLE INPUT AND OUTPUT PORT TRANSFER INSTRUCTIONS

INSTRUCTIONS COMMENTS
IN Copy a byte or word from specified port to
accumulator.
IN AX,Port_Addr
IN AX,34H

OUT Copy a byte or word from accumulator to


specified port.
OUT Port_Addr,AX
OUT 2CH,AX

1.3 SPECIAL ADDRESS TRANSFER INSTRUCTIONS

INSTRUCTIONS COMMENTS
LEA Load effective address of operand into
specified register.
LEA Register,Source
LEA BX,PRICE
LDS Load DS register and other specified register
from memory.
LDS Register,Source
LDS BX,[4326H]
LES Load ES register and other specified register
from memory.

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1.4 FLAG TRANSFER INSTRUCTIONS

INSTRUCTIONS COMMENTS
LAHF Copy to AH with the low byte of the flag
register.
SAHF Stores AH register to low byte of flag register.
PUSHF Copy flag register to top of stack.
POPF Copy word at top of stack to flag register.

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2. ARITHMETIC INSTRUCTIONS

2.1 ADDITION INSTRUCTIONS

INSTRUCTIONS COMMENTS
ADD Add specified byte to byte or word to word.

ADD Destination,Source
ADD AL,74H
ADC Add byte + byte + carry flag
Add word+word + carry flag
ADC Destination,Source
ADC CL,BL
INC Increment specified byte or word by 1.

INC Register
INC CX
AAA ASCII adjust after addition.
DAA Decimal adjust after addition.

2.2 SUBTRACTION INSTRUCTIONS

INSTRUCTIONS COMMENTS
SUB Subtract byte from byte or word from word.

SUB Destination,Source
SUB CX,BX
SBB Subtract byte and carry flag from byte.
Subtract word and carry flag from word.
SBB Destination,Source
SBB CH,AL
DEC Decrement specified byte or word by 1.

DEC Register
DEC CX
NEG Form 2's complement.

NEG Register
NEG AL
CMP Compare two specified bytes or words.

CMP Destination,Source
CMP CX,BX

CF ZF SF
CX = BX 0 1 0
CX > BX 0 0 0
CX < BX 1 0 1

AAS ASCII adjust after subtraction.

DAS Decimal adjust after subtraction.

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2.3 MULTIPLICATION INSTRUCTIONS

INSTRUCTIONS COMMENTS
MUL Multiply unsigned byte by byte or unsigned
word by word.

When a byte is multiplied by the content of AL,


the result is kept into AX.

When a word is multiplied by the content of


AX, MS Byte in DX and LS Byte in AX.

MUL Source
MUL CX
IMUL Multiply signed byte by byte or signed word by
word.
IMUL Source
IMUL CX
AAM ASCII adjust after multiplication.
It converts packed BCD to unpacked BCD.

2.4 DIVISION INSTRUCTIONS

INSTRUCTIONS COMMENTS
DIV Divide unsigned word by byte
Divide unsigned word double word by byte.

When a word is divided by byte, the word


must be in AX register and the divisor can be
in a register or a memory location.

After division AL (quotient)


AH (remainder)

When a double word is divided by word, the


double word must be in DX:AX pair and the
divisor can be in a register or a memory
location.

After division AX (quotient)


DX (remainder)

DIV Source
DIV BL
DIV CX
AAD ASCII adjust before division
BCD to binary convert before division.

CBW Fill upper byte of word with copies of sign bit


of lower byte.

CWD Fill upper word of double word with sign bit of


lower word.

3. BIT MANIPULATION INSTRUCTIONS

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3.1 LOGICAL INSTRUCTIONS

INSTRUCTIONS COMMENTS
NOT Invert each bit of a byte or word.
NOT Destination
NOT BX
AND AND each bit in a byte/word with the
corresponding bit in another byte or word.
AND Destination,Source
AND BH,CL
OR OR each bit in a byte or word with the
corresponding bit in another byte or word.
OR Destination,Source
OR AH,CL
XOR XOR each bit in a byte or word with the
corresponding bit in another byte or word.
XOR Destination,Source
XOR CL,BH
TEST AND operands to update flags, but don't
change the operands.
TEST Destination,Source
TEST AL,BH

3.2 SHIFT INSTRUCTIONS

INSTRUCTIONS COMMENTS
SHL/SAL Shift Bits of Word or Byte Left, Put Zero(s) in
LSB.
SAL Destination,Count
SHL Destination,Count

CFMSBLSB0
SHR Shift Bits of Word or Byte Right, Put Zero(s) in
MSB.
SHR Destination,Count

0MSBLSBCF
SAR Shift Bits of Word or Byte Right, Copy Old MSB
into New MSB.
SAR Destination,Count

MSBMSBLSBCF

3.3 ROTATE INSTRUCTIONS

INSTRUCTIONS COMMENTS
ROL Rotate Bits of Byte or Word Left,MSB to LS and
to CF.
ROR Rotate Bits of Byte or Word Right,LSB to MSB
and to CF.
RCL Rotate Bits of Byte or Word Left,MSB to CF and
CF to LSB.
RCR Rotate Bits of Byte or Word Right,LSB TO CF
and CF TO MSB.

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4. PROGRAM EXECUTION TRANSFER INSTRUCTIONS

4.1 UNCONDITIONAL TRANSFER INSTRUCTION

INSTRUCTIONS COMMENTS
CALL Call a Subprogram/Procedure.

RET Return From Procedure to Calling Program.

JMP Goto Specified Address to Get Next Instruction


(Unconditional Jump to Specified Destination).

4.2 CONDITIONAL TRANSFER INSTRUCTION

INSTRUCTIONS COMMENTS
JA/JNBE Jump if Above/Jump if Not Below or Equal.

JAE/JNB Jump if Above or Equal/Jump if Not Below.

JB/JNAE Jump if Below/Jump if Not Above or Equal.

JBE/JNA Jump if Below or Equal/Jump if Not Above.

JC Jump if Carry Flag CF=1.

JE/JZ Jump if Equal/Jump if Zero Flag (ZF=1).

JG/JNLE Jump if Greater/Jump if Not Less than or Equal.

JGE/JNL Jump if Greater than or Equal/Jump if Not Less


than.

JL/JNGE Jump if Less than/Jump if Not Greater than or


Equal.

JLE/JNG Jump if Less than or Equal/Jump if Not Greater


than.

JNC Jump if No Carry i.e. CF=0


JNE/JNZ Jump if Not Equal/Jump if Not Zero(ZF=0)

JNO Jump if No Overflow.

JNP/JPO Jump if Not Parity/Jump if Parity Odd.

JNS Jump if Not Sign(SF=0)

JP/JPE Jump if Parity/Jump if Parity Even (PF=1)

JS Jump if Sign (SF=1)

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4.3 ITERATION CONTROL INSTRUCTIONS

INSTRUCTIONS COMMENTS
LOOP Loop Through a Sequence of Instructions Until
CX=0.

LOOPE/LOOPZ Loop Through a Sequence of Instructions While


ZF=1 and CX!=0.

LOOPNE/LOOPNZ Loop Through a Sequence of Instruction While


ZF=0 & CX!=0.

JCXZ Jump to Specified Address if CX=0.

4.4 INTERRUPT INSTRUCTIONS

INSTRUCTIONS COMMENTS
INT
INT0 Interrupt Program Execution if OF=1

IRET Return From Interrupt Service Procedure to Main


Program.

5 PROCESSOR CONTROL INSTRUCTIONS

5.1 FLAG SET/CLEAR INSTRUCTION

INSTRUCTIONS COMMENTS
STC Set Carry Flag CF to 1.

CLC Clear Carry Flag to 0.

CMC Complement the State of CF.

STD Set Direction Flag to 1.

CLD Clear Direction Flag to 0.

STI Set Interrupt Flag to 1.


(Enable INTR Input).

CLI Clear Interrupt Enable to 0

5.2 NO OPERATION INSTRUCTION

INSTRUCTIONS COMMENTS
NOP No Action Except Fetch and Decode.

5.3 EXTERNAL HARDWARE SYNCHRONIZATION INST.


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INSTRUCTIONS COMMENTS
HLT Halt (Do Nothing) Until Interrupt or Reset.

WAIT Wait Until Signal On the TEST Pin is Low.

ESC Escape to External Coprocessor Such as 8087 or


8089.

LOCK Prevents Another Processor From Taking the Bus


While the Adjacent Instruction Executes.

6 STRING INSTRUCTIONS

INSTRUCTIONS COMMENTS
REP Repeat Instruction Until CX=0.

REPE/REPZ Repeat if Equal/Repeat if Zero

REPNE/REPNZ Repeat if Not Equal/Repeat if Not Zero.

MOVS/MOVSB/MOVSW Move Byte or Word From One String to Another.

COMPS/COMPSB/COMPSW Compare Two String Bytes or Two String Words.

SCAS/SCASB/SCASW Compares a Byte in AL or Word in AX With a Byte


or Word Pointed By DI in ES.

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ASSEMBLY LANGUAGE PROGRAMMING

INTRODUCTION

 Assembly Language uses two, three or 4 letter mnemonics to represent each instruction
type.

 Low level Assembly Language is designed for a specific family of Processors : the symbolic
instruction directly relate to Machine Language instructions one for one and are assembled
into machine language

 To make programming easier, many programmers write programs in assembly language

 They then translate Assembly Language program to machine language so that it can be
loaded into memory and run.

ADVANTAGES OF ASSEMBLY LANGUAGE

 A Program written in Assembly Language requires considerably less Memory and execution
time than that of High Level Language.

 Assembly Language gives a programmer the ability to perform highly technical tasks.

 Resident Programs (that resides in memory while other programs execute) and Interrupt
Service Routine (that handles I/P and O/P) are almost always developed in Assembly
Language.
 Provides more control over handling particular H/W requirements.

 Generates smaller and compact executable modules.

 Results in faster execution.

TYPICAL FORMAT OF AN ASSEMBLY LANGUAGE INSTRUCTION

LABEL OPCODE FIELD OPERAND FIELD COMMENTS


NEXT: ADD AL,07H ; Add correction factor

 Assembly language statements are usually written in a standard form that has 4 fields.

 A label is a symbol used to represent an address. They are followed by colon

 Labels are only inserted when they are needed so it is an optional field.

 The opcode field of the instruction contains the mnemonics for the instruction to be
performed

 The instruction mnemonics are sometimes called as operation codes.

 The operand field of the statement contains the data, the memory address, the port
address or the name of the register on which the instruction is to be performed.

 The final field in an assembly language statement is the comment field which starts with
semicolon. It forms a well documented program.

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ASSEMBLY LANGUAGE PROGRAM DEVELOPMENT TOOLS

1. EDITOR

 An Editor is a Program which allows you to create a file containing the Assembly Language
statements for your Program.

2. ASSEMBLER

 An Assembler Program is used to translate the assembly language mnemonics for


instruction to the corresponding binary codes.

3. LINKER

 A Linker is a Program used to join several files into one large .obj file. It produces .exe file
so that the program becomes executable.

4. LOCATOR

 A Locator is a program used to assign the specific address of where the segment of object
code are to be loaded into memory.

 It usually converts .exe file to .bin file.

 A Locator program EXE2BIN converts .exe file to .bin file.

5. DEBUGGER

 A Debugger is a program which allows you to load your .obj code program into system
memory, execute program and troubleshoot.

 It allows you to look at the content of registers and memory locations after your program
runs.

 It allows to set the breakpoint.

6. EMULATOR

 An Emulator is a mixture of hardware and software.

 It is used to test and debug the hardware and software of an external system such as the
prototype of a Microprocessor based system.

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ASSEMBLY LANGUAGE PROGRAM FEATURES

#PROGRAM COMMENTS
 The use of Comments throughout a program can improve its clarity, especially in Assembly
Language.

 A Comment begins with Semicolon.

EXAMPLE
MOV AX, BX ; Adds the Content of BX with AX

#RESERVED WORDS
 Instructions : MOV, ADD
 Directives : END,SEGMENT
 Operators : FAR,OFFSET
 Predefined Symbols : @DATA

#IDENTIFIERS

 An Identifier (or symbol) is a name that you apply to an item in your program that you
expect to reference. The two types of identifiers are NAME and LABEL.

 NAME : Refers to the Address of a data item


COUNTER DB 0

 LABEL: Refer to the Address of an instruction, procedure, or segment.

MAIN PROC
A20: MOV AL,BL

#STATEMENTS

 An Assembly Program consists of a set of statements. The two types of statements are:

1. INSTRUCTION
 Instructions such as MOV & ADD which the Assembler translates to Object Code.

2. DIRECTIVES
 Directives tell the Assembler to perform a specific action, such as define a data item
etc.

ASSEMBLY LANGUAGE PROGRAMMING USING MASM

GENERAL PATTERN FOR WRITING ALP IN MASM


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[PAGE DIRECTIVE]
[TITLE DIRECTIVE]
[MEMORY MODEL DEFINITION]
[SEGMENT DIRECTIVES]
[PROC DIRECTIVES]
……………………………………………
……………………………………………
……………………………………………
……………………………………………
[END DIRECTIVES]

BASIC FORMAT OF ALP BASED UPON THE GENERAL PATTERN

PAGE 60,80
TITLE "ALP TO PRINT FACTORIAL NO"

.MODEL [MODEL NAME]


.STACK
.DATA
……………………… ; INITIALIZE DATA VARIALBLES
.CODE

MAIN PROC

……………………………
…………………………..
…………………………..
…………………………… ; INSTRUCTION SETS
…………………………..
……………………………
…………………………..
……………………………

MAIN ENDP
END MAIN

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DIRECTIVES

 Assembly Language supports a number of statements that enable to control the way in
which a source program assembles and lists. These Statements are called Directives.

 They act only during the assembly of a program and generate no machine executable code.

 The most common Directives are PAGE, TITLE, PROC, and END.

# PAGE DIRECTIVE

 The PAGE Directive helps to control the format of a listing of an assembled program.

 It is optional Directive.

 At the start of program, the PAGE Directive designates the maximum number of lines to list
on a page and the maximum number of characters on a line.

 Its format is
PAGE [LENGTH],[WIDTH]

 Omission of a PAGE Directive causes the assembler to set the default value to PAGE 50,80

# TITLE DIRECTIVE
 The TITLE Directive is used to define the title of a program to print on line 2 of each page
of the program listing.

 It is also optional Directive.

 Its format is
TITLE [TEXT]

TITLE "PROGRAM TO PRINT FACTORIAL NO"

# SEGMENT DIRECTIVE

 The SEGMENT Directive defines the start of a segment.

 A Stack Segment defines stack storage, a data segment defines data items and a code
segment provides executable code.

 MASM provides simplified Segment Directive.

 The format (including the leading dot) for the directives that defines the stack, data and
code segment are

.STACK [SIZE]
.DATA
………………. Initialize Data Variables
.CODE

 The Default Stack size is 1024 bytes.

 To use them as above, Memory Model initialization should be carried out.


# MEMORY MODEL DEFINTION

 The different models tell the assembler how to use segments to provide space and ensure
optimum execution speed.

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 The format of Memory Model Definition is

.MODEL [MODEL NAME]

 The Memory Model may be TINY, SMALL, MEDIUM, COMPACT, LARGE AND HUGE.

MODEL TYPE DESCRIPTION


TINY All DATA, CODE & STACK Segment must fit in one Segment of
Size <=64K.

SMALL One Code Segment of Size <=64K.


One Data Segment of Size <=64 K.

MEDIUM One Data Segment of Size <=64K.


Any Number of Code Segments.

COMPACT One Code Segment of Size < =64K.


Any Number of Data Segments.

LARGE Any Number of Code and Data Segments.

HUGE Any Number of Code and Data Segments.

#THE PROC DIRECTIVE

 The Code Segment contains the executable code for a program, which consists of one or
more procedures, defined initially with the PROC Directive and ended with the ENDP
Directive.

 Its Format is given as:

PROCEDURE NAME PROC


………………..
……………….
……………….
PROCEDURE NAME ENDP

#END DIRECTIVE
 As already mentioned, the ENDP Directive indicates the end of a procedure.

 An END Directive ends the entire Program and appears as the last statement.

 Its Format is

END [PROCEDURE NAME]

#PROCESSOR DIRECTIVE

 Most Assemblers assume that the source program is to run on a basic 8086 level.

 As a result, when you use instructions or features introduced by later processors, you have
to notify the assemblers be means of a processor directive as .286,.386,.486 or .586

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 This directive may appear before the Code Segment.

#THE EQU DIRECTIVE

 It is used for redefining symbolic names

EXAMPLE
DATAX DB 25
DATA EQU DATAX

#THE .STARTUP AND .EXIT DIRECTIVE

 MASM 6.0 introduced the .STARTUP and .EXIT Directive to simplify program initialization
and Termination.

 .STARTUP generates the instruction to initialize the Segment Registers.

 .EXIT generates the INT 21H function 4ch instruction for exiting the Program.

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DEFINING TYPES OF DATA

 The Format of Data Definition is given as


[NAME] DN [EXPRESSION]

EXAMPLES
STRING DB 'HELLO WORLD'
NUM1 DB 10
NUM2 DB 90

DEFINITION DIRECTIVE
BYTE DB
WORD DW
DOUBLE WORD DD
FAR WORD DF
QUAD WORD DQ
TEN BYTES DT

 Duplication of Constants in a Statement is also possible and is given by

[NAME] DN [REPEAT-COUNT DUP (EXPRESSION)]

EXAMPLES
DATAX DB 5 DUP(12) ; 5 Bytes containing hex 0c0c0c0c0c
DATA DB 10 DUP(?) ; 10 Words Uninitialized

DATAZ DB 3 DUP(5 DUP(4)) ; 44444 44444 44444

1. CHARACTER STRINGS

 Character Strings are used for descriptive data.

 Consequently DB is the conventional format for defining character data of any length

 An Example is
DB 'Computer City'
DB "Hello World"
DB "St.Xavier's College"

2. NUMERIC CONSTANTS

#BINARY : VAL1 DB 10101010B

#DECIMAL : VAL1 DB 230

#HEXADECIMAL : VAL1 DB 23H

ALP SAMPLES USING DOS AND VIDEO BIOS FUNCTIONS


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# SAMPLE 1

;Program to Print Hello World in ALP


;BIM III : Microprocessor Programming
;St.Xavier's College,Kathmandu
;Compiled By Kumar Pudashine
;2005

;-------------------------------------------------------------
.MODEL SMALL
.STACK
.DATA
STRING DB 'HELLO WORLD $'
.CODE

;-------------------------------------------------------------

MAIN PROC
MOV AX,@DATA
MOV DS,AX ; Initialize the DATA Segment

MOV DX,OFFSET STRING ; Load the Offset Address into DX


MOV AH,09H ; AH=09H For String Display until $
INT 21H ; DOS Interrupt Function

MOV AX,4C00H ; End Request with AH=4CH


; or AX=4C00H
INT 21H
MAIN ENDP ; End Procedure
END MAIN ; End Program

;-------------------------------------------------------------

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#SAMPLE 2

;Program to Print the Sum of Two 8 Bit Numbers


;BIM III : Microprocessor Programming
;St.Xavier's College,Kathmandu
;Compiled By Kumar Pudashine
;2005

;-------------------------------------------------------------
.MODEL SMALL
.STACK
.DATA
VAL1 DB 89
VAL2 DB 10
MSG DB 'SUM OF 2 NUMBERS: $'
.CODE

;-------------------------------------------------------------

MAIN PROC
MOV AX,@DATA
MOV DS,AX

MOV AX,0
MOV AL,VAL1
ADD AL,VAL2

AAM ;AAM Converts Binary Value to Unpacked BCD.

ADD AX,3030H ;Ax is Added with 3030H to Obtain ASCII Value

PUSH AX
;;;;;;;;;;;;;DISPLAY MESSAGE
LEA DX,MSG
MOV AH,09H
INT 21H
;;;;;;;;;;;;;END DISPLAY MESSAGE

POP AX

MOV DL,AH
MOV DH,AL
MOV AH,02H
INT 21H

MOV DL,DH
MOV AH,02H
INT 21H

MOV AX,4C00H
INT 21H
MAIN ENDP
END MAIN

;-------------------------------------------------------------

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#SAMPLE 3

;Program To Clear the Screen With Bios Interrupt Function.


;BIM III : Microprocessor Programming
;St.Xavier's College,Kathmandu
;Compiled By Kumar Pudashine
;2005

;-------------------------------------------------------------
.MODEL SMALL
.STACK
.DATA
.CODE
;-------------------------------------------------------------

MAIN PROC
MOV AX,@DATA
MOV DS,AX

;;;;;;;;;;;;;;;;;;;;;;;;;;;
;INT 10H Function 06H : Scroll Up Screen
;AH=Function 06H
;AL=Number of lines to scroll,or 00H for full screen
;BH=Attribute value(color,blinking)
;CX=Strating row:column
;DX=Ending row :column
;;;;;;;;;;;;;;;;;;;;;;;;;;;

MOV AX,0600H ;AH=06,AL=00 for Full Screen


MOV BH,71H ;White background(7),Blue foreground(1)
MOV CX,0000H ;Upper left row:column
MOV DX,184FH ;lower right row:column
INT 10H ;Bios Interrupt Function

MOV AX,4C00H
INT 21H

MAIN ENDP
END MAIN
;-------------------------------------------------------------

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#SAMPLE 4

;Progam to Display Character with Attributes


;BIM III : Microprocessor Programming
;St.Xavier's College,Kathmandu
;Compiled By Kumar Pudashine
;2005

;-------------------------------------------------------------
.MODEL SMALL
.STACK
.DATA
.CODE
;-------------------------------------------------------------

MAIN PROC
MOV AX,@DATA
MOV DS,AX

;;;;;;;;;;;;;;;;;;;;;;;
;INT 10H Function 09H: Display Character
;AH=09H
;AL=ASCII Character
;BH=Page Number
;BL=Attribute or Pixel value.
;CX=Count
;;;;;;;;;;;;;;;;;;;;;;

MOV AH,09H ;Request Display


MOV AL,01H ;Happy Face for display
MOV BH,00H ;Page Number 0
MOV BL,0C1H ;Red background,Blue foreground
MOV CX,79 ;No of repeated characters
INT 10H ;Bios Interrupt Function

MOV AX,4C00H
INT 21H

MAIN ENDP
END MAIN
;-------------------------------------------------------------

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