Real-Time Open Industrial Linux

Jeff Steinheider
Marketing Director
Roy Zang
Software Architect

May 2019 | AMF-IND-T3538

Company Public – NXP, the NXP logo, and NXP secure connections for a smarter world are trademarks of NXP
B.V. All other product or service names are the property of their respective owners. © 2019 NXP B.V.
Agenda
• Industrial Application Requirements
• Deterministic Computing
• Protecting Industrial Devices
• Time Synchronization
• Deterministic Networking

COMPANY PUBLIC 1
Manufacturing Automation/Smart Grid Requirements
Processor Requires Real-Time Performance
Control Traditionally supported via RTOS
Processor
(LS, I.MX) PCIe or 16 bit parallel bus
Depends on data sizes and system architecture

Communications IC Control loops run every 25-150 usecs

Requires low, deterministic latency
All elements must be synchronized
Control loop period determines how fast and how
Motors, smoothly a mechanical system can run
Drives
(LPC15xxx, Kinetis)
Communications IC
Will be replaced by TSN
COMPANY PUBLIC 2
OpenIL.org
Built-in TSN and
Hard real-time
applications support
G A IEEE1588 Support

Open
Open Software F Industrial Built-in industrial-grade
Repository and
Community B security

Support for various

Built-in graphic display E industrial networking
support for HMI
Applications C protocols

D Manageable via industrial control

and networking protocols
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OpenIL for Industrial Automation
TSN, IEEE 1588
Scalable Hardware
Customer Applications

Open Industrial Linux SDK

4G
Networking, Security drivers ARM CPUs
up to 100K Coremark PCIe
Available 802.11ac/n
Bare Metal
Xenomai SE Linux
Framework Packet Engine Security BLE/Zigbee/
2-20Gbps Engine Thread
Trust Architecture
Ethernet Controllers
2x 1GE -> 2x 10GE NFC

Determinism
Xenomai Linux, Bare Metal Framework LS1046
IEEE 1588, TSN LS1043
LS1028
Security LS1021
SE Linux LS1012
OP-TEE I.MX 6

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OpenIL Running on Scalable Portfolio of Devices
Currently Supported Devices New Device Support
Single to Quad Core Adding 3D GPU
32 and 64 bit Arm Adding Integrated TSN
LS1043A LS1046A
• Cortex-A53 • Cortex-A72
• 2-4 cores • 2-4 cores i.MX 6Dual/6Quad LS1028A
• 1.6GHz • 1.8GHz • Cortex-A9 • Cortex-A72
• 1/10G Ethernet, • 1/10 G Ethernet, • 2-4 cores • 2 cores
USB, PCI USB, PCI • 800 MHz • 1.3GHz
• 5-10W • 10-12W (Industrial) • 4-9W
LS1012A LS1021A • 2D/3D GPU • Integrated TSN
switch
• Cortex-A53 • Cortex-A7
• 2D/3D GPU
• 1 core • 2 cores
• 1GHz • 1.2GHz
• 1-2W • 2W
• Ethernet, USB, PCI • Ethernet, USB, PCI

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One Package – Four SoC Options
4x A53 1.6 GHz LS1043 LS1046 4x A72 1.8 GHz
4.2 W Typical 8.5 W Typical
26,650 Coremark 45,330 Coremark
Per core SpecINT Per core SpecINT
Per core SpecFP Per core SpecFP

2x A53 1.0 GHz LS1023 LS1026 2x A72 1.2 GHz

2.5 W Typical 5.6 W Typical
23mm x 23mm
8,360 Coremark 15,000 Coremark
780 pin
Per core SpecINT FC-PBGA Package
Per core SpecINT
Per core SpecFP Per core SpecFP

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Deterministic Computing

COMPANY PUBLIC 7
Deterministic Computing for Industrial Workloads

3 Levels of Real-Time Performance:

Heterogeneous Software Model • Xenomai Mercury (PREEMPT-RT
Patches)
SoC
Core 1 Core 2 Core 3 Core 4
• Xenomai Cobalt (Real-Time Co-
Bare- Kernel)
Linux RTOS RTOS
Metal
• Bare-Metal Framework
Acceleration Acceleration
• Run management, communication
I/O - Ethernet, PCIe
software in Linux on 1 core
• Real-time applications running with
RTOS (Xenomai) or Bare-Metal on
other cores

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Xenomai Latency Distribution on LS1043A
Max Latency Samples Distribution
400
353 • Xenomai Cobalt 64-bit
350

300
mode on LS1043A @
250
1.6 GHz
200 • Measured using
150
141 Xenomai latency tool
100 84 • Jitter < 450 ns
50
1 10 7 3 1
• Max latency of 680 ns
0
0.4 0.44 0.48 0.52 0.56 0.6 0.64 0.68
Max Latency (us)

latency min (us) latency avg (us) latency max (us) Duration
0.24 0.279 0.68 00:10:00

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Protecting Industrial Devices

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Trust Architecture Provides a Trusted Platform
Hardware based security features to ease the All QorIQ SoCs support Trust
development of trustworthy systems Architecture

General- General- DDR

Manufacturing Secure
SoC Purpose
CPU Core
Purpose
CPU Core
Controller
Protection Boot
HV MMU HV MMU

Battery Back-up
8 1
Strong Secure
Partitioning Storage
Security Fuses
7 2
PreBoot Loader Coherent Interconnect
Security Monitor IOMMU IOMMU

Internal BootROM
Secure Debug Tamper 6 3 Key
Power Mgmt Controller
SEC Engine Mgmt Control Detection Protection
SD/MMC
Tamper
Detect(s)
Crypto, RNG Real Time Debug 5 4
SPI DUART I2C QMan FMAN
Watchpoint
WRIOP
Secure Keys
IFC USB SATA BMan Perf CoreNet Secure Key
Monitor Trace
Clocks/Reset UID, Runtime Eth, Debug Revocation
Integrity Check AIOP PCI Aurora
CCSR GPIO
Security Data-path
sub-system sub-system

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Runtime Access Control With SELinux
• Improved access control

• Policies control file access, network

resources, and IPC
− Finer grain access control

• Use cases:
− Prevent remote login for certain types of users
− Restrict access to files from the web

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Time Synchronization

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IEEE 1588 for Timing Synchronization
linuxptp support:
LS1021A
LS1043A
LS1046A
LS1028A

Master/Slave
Boundary Clock Mode
802.1AS End Station

Synchronization within +/- 23 nsec for

back to back boards

Example configurations and test results

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1588 Performance
Offset from Master, Startup Offset from Master, Stable State

Timing settles within 5 seconds Accuracy within ±23 nsec

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Deterministic Networking

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Single Board TSN Demonstration
• 3 host Linux machines connected
through a switch
• 2 TCP flows competing for bandwidth
• Flows bottlenecked because they are
sharing the same link towards Host 2
• Combined throughput cannot exceed
1000Mbps
• Utilize TSN features to isolate flows
− Ingress
Policing: rate-limit traffic coming
from Host 3
− Time Gating: schedule the 2 flows on
different time slots
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Demonstration Setup

LS1012A-FRDM LS1021ATSN ubuntu

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Standard Ethernet Switch Settings
Standard Switch Settings

Both streams compete for

bandwidth

High variation

Roughly equal distribution

standard.xml

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Start TSN on LS1021A-TSN – Enhance with LS1028A

LS1021A-TSN LS1028A

TSN Features New TSN Features

• Time Aware Shaper • Frame Pre-emption
(802.1Qbv) (802.1Qbu)
• Per-Stream Filtering & • Frame Replication and
Policing (802.1Qci) Elimination (802.1CB)
• Credit Based Shaper • Cut-through Switching
(802.1Qav) • Cyclic Queuing and
• Time Synchronization Forwarding (802.1Qch)
(802.1AS) • 802.1AS-Rev

Supported by one SDK – Open Industrial Linux

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OPC UA over TSN for Industry 4.0 Communications
• OpenIL integrates with
Open62541
− Open source C implementation of
OPC UA
− Mozilla Public License v2.0
− server side capabilities

• LS1021A Running OPC UA

Server
− Providingswitch statistics
− Access via FreeOpcUa Client GUI

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LS1028A: Dual ARM Cortex A72 Processor
Core Complex
Security Core Complex
• 2x 64-bit Cortex-A72 with Neon SIMD engine
Security Engine
• Speed up to 1300 MHz
ARM Trust Zone ARM
Cortex –A72
ARM • Parity and ECC protected 48 KB L1 instruction and 32 KB L1 data cache
Cortex –A72
Secure Boot • 1 MB L2 cache with ECC protection
16/32-bit DDR3L/4 Basic Peripheral and Interconnect
Power Management 48 KB L1-I
32 KB L1-D
48 KB L1-I
32 KB L1-D
Memory Controller (ECC) • 2x USB 3.0 OTG controllers with integrated PHY
Standard interfaces
• 2x eSDHC controllers supporting SD/SDIO 4.0
2x SD/SDIO/eMMC 1MB L2 - Cache • 2x CAN-FD controllers
• 8x UART serial ports
3x SPI Coherent Interconnect (CCI-400)
Networking Elements
2x UART, 6x LPUART Accelerators and Memory High Speed Networking • Four Port TSN Ethernet Switch up to 2.5 Gbps on each port
Control interfaces Elements
8x I2C, GPIO • Up to four SGMII supporting 1 Gbps
6x SAI, 2x CAN-FD 256KB SRAM SATA 2.5 GbE • Up to one USXGMII supporting 2.5 Gbps

TSN Switch
3
FlexSPI
PCIe
3.0 2.5 GbE • Up to one QSGMII
8x Flex Timer USB • Up to one RGMII
2.5 GbE
3.0 • 2x PCI Express Gen 3 controllers
w/PHY
Multimedia interfaces 3D GPU 2.5 GbE • 1x SATA Gen 3.0 controller
4K LCD Controller PCIe USB 2.5 TSN GbE Accelerators and Memory Control
3.0
eDP/DP Phy
3.0
w/PHY 1 GbE
• 1x 16/32-bit DDR3L/4 Controller with ECC support up to 1.6 GT/s
• Time Sensitive Networking (TSN) Ethernet Switch
• Security Engine (SEC)
Target Applications: • QorIQ Trust architecture: Secure boot, ARM Trust zone and security monitor
• Industrial Control, PLCs, Gateways • IoT Gateways Qualification
• Automotive • Human Machine Interface • Commercial and extended temperature (support for 125C Tj)
• Professional Audio/Video Power
Package • 5W TDP
• 17x17mm, 0.75mm pitch FC-PBGA
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LS1028A Reference Design
Front Panel Back Panel
Full Size SD
Card Slot

Up to 4K 4 Switched
Display via 1G/100M/10M
DisplayPort TSN Ethernet
2x CAN FD Interfaces 2x UART Ports
USB 3.0 1G/100M/10M
• Internal M.2 PCIe, SATA slots Type C and Type TSN Ethernet
• 2x mikroBUS™ sockets for Click A Controller
Boards
Compelling Combination of IO, Computing and TSN
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Industrial Solution

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EtherCAT Over TSN
IOT device
• EtherCAT IGH Master secure management
OpenIL and Industrial
Reference Solution

• Industrial control system OpenIL Distributed IOT Apps

Background Flows
based on EtherCAT over LinuxCNC
IGH EtherCAT
LinuxCNC Host
Build and deployment
Generator1

TSN Master
Real-time
Linux
• Real-time Linux system Platform
TSN Switch1 EtherCAT over TSN Switch2
support – Xenomai (LS1028ARDB) TSN (LS1028ARDB)

• Hard real-time Baremetal

framework support Background Flows
EtherCAT Plotter

Generator2
• Different industrial
protocols support – TSN, TSN stream
EtherCAT stream

EtherCAT, OPC-UA Ethernet stream

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Robot ARM
• Secure OTA with
objection detection
model
• FreeRTOS and BYOM

MicroPython dual
systems swap
• i.MX RT1050 stepper
drive with EtherCAT LS1028ARDB

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Open Industrial Linux Driving Industrial Control
• Growing Set of Supported Processors
− Coverage across Layerscape and i.MX

• Deterministic Processing Open

− Xenomai Linux
− Bare Metal Framework Industrial
• Secure Industrial Systems With Root of
Trust and SELinux

• Synchronized and Deterministic

Networking
− 1588
− TSN

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References and Additional Information
• Open Industrial Linux User Guide
• Open Industrial Linux Bare Metal Framework Developer Guide
• Application Note: AN3423 – Support for IEEE™ 1588 Protocol in
PowerQUICC and QorIQ Processors
• LS1046A Reference Design Board
• LS1043A Reference Design Board
• LS1012A Reference Design Board
• LS1021ATSN Reference Design Board
• LS1028A Reference Design Board
• LS1028A Layerscape SoC with integrated TSN

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NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2019 NXP B.V.