Course: ANALOG ELECTRONICS

Lecture 3: TRANSISTOR BIAS CIRCUITS

SMALL SIGNAL ANALYSIS OF BJTs and FETs

1. INTRODUCTION
A model is the combination of circuit elements, properly chosen, that best
approximates the actual behaviour of a semiconductor device under specific operating
conditions.
Once the ac equivalent circuit has been determined, the graphical symbol of the
device can be replaced in the schematic by this circuit and the basic methods of
accircuit analysis (mesh analysis, nodal analysis, and Thévenin’s theorem) can be
applied to determine the response of the circuit.
There are two models commonly used in the small-signal ac analysis of transistor
networks: the re model and the hybrid equivalent model.
Field-effect transistor amplifiers provide an excellent voltage gain with the added
feature of a high input impedance. They are also considered low-power consumption
configurations with good frequency range and minimal size and weight. Both JFET and
depletion MOSFET devices can be used to design amplifiers having similar voltage
gains. The depletion MOSFET circuit, however, has a much higher input impedance
than a similar JFET configuration.
While a BJT device controls a large output (collector) current by means of a
relatively small input (base) current, the FET device controls an output (drain) current by
means of a small input (gate-voltage) voltage. In general, therefore, the BJT is a current-
controlled device and the FET is a voltage-controlled device. In both cases, however,
note that the output current is the controlled variable. Because of the high input
characteristic of FETs, the ac equivalent model is somewhat simpler than that employed
for BJTs. While the BJT had an amplification factor β (beta), the FET has a
transconductance factor, gm.
The FET can be used as a linear amplifier or as a digital device in logic circuits. In
fact, the enhancement MOSFET is quite popular in digital circuitry, especially in CMOS
circuits that require very low power consumption. FET devices are also widely used in
high-frequency applications and in buffering (interfacing) applications.
While the common-source configuration is the most popular providing an inverted,
amplified signal, one also finds common-drain (source-follower) circuits providing unity
gain with no inversion and common-gate circuits providing gain with no inversion. As
with BJT amplifiers, the important circuit features described in this chapter include
voltage gain, input impedance, and output impedance. Due to the very high input
impedance, the input current is generally assumed to be 0 µ A and the current gain is an
undefined quantity. While the voltage gain of an FET amplifier is generally less than that
obtained using a BJT amplifier, the FET amplifier provides much higher input impedance
than that of a BJT configuration. Output impedance values are comparable for both BJT
and FET circuits.
 2. AC EQUIVALENT-CIRCUIT MODEL

Fig.1. Transistor circuit [2] Fig. 2 The network of Fig.1 following

removal of the dc supply and insertion of the
short-circuit equivalent for the capacitors [2]

Fig.3 Circuit of Fig.1 redrawn for small-signal ac analysis [2]

In summary, the ac equivalent of a network is obtained by:

 Setting all dc sources to zero and replacing them by a short-circuit equivalent
 Replacing all capacitors by a short-circuit equivalent
 Removing all elements bypassed by the short-circuit equivalents introduced
by steps 1 and 2
 Redrawing the network in a more convenient and logical form

3. THE IMPORTANT PARAMETERS: Zi, Z0, Av, Ai

For the two-port (two pairs of terminals) system of Fig.4, the input side (the side to
which the signal is normally applied) is to the left and the output side (where the load is
connected) is to the right.
 Input Impedance, Zi Zi=Vi/Ii
Output Impedance, Zo Z0=V0/I0
Voltage Gain, Av Av =V0/Vi
Current Gain, Ai Ai =I0/Ii

Fig.4 Two-port system [2]

4. THE re TRANSISTOR MODEL

The re model employs a diode and controlled current source to duplicate the
behaviour of a transistor in the region of interest.
Common Base Configuration

Fig. 5 Common-base BJT transistor [2] Fig. 6 re model for the configuration [2]

re=26mV/IE

The subscript e of re was chosen to emphasize that it is the dc level of emitter

current that determines the ac level of the resistance of the diode of Fig.6.
Substituting the resulting value of re in Fig.6 will result in the very useful model of
Fig.7.

Zi = re

Zo = ∞ 

Av = αRL/re = RL/re

Ai = - α = -1

Fig.7 Common Base re equivalent circuit [2]

Common Emitter Configuration

Fig.8 Common-emitter BJT transistor [2] Fig.9 re model for the configuration [2]

Zi = βRE
Zo = ro
Av = -RL/re
Ai = β

Fig.10 Common Emitter re equivalent circuit [2]

5. THE HYBRID EQUIVALENT MODEL

The re model for a transistor is sensitive to the dc level of operation of the amplifier.
The result is an input resistance that will vary with the dc operating point.
For the hybrid equivalent model, the parameters are defined at an operating point
that may or may not reflect the actual operating conditions of the amplifier. This is due to
the fact that specification sheets cannot provide parameters for an equivalent circuit at
every possible operating point. They must choose operating conditions that they believe
reflect the general characteristics of the device.
The quantities hie, hre, hfe, and hoe are called the hybrid parameters and are the
components of a small-signal equivalent circuit.
 Vi = h11Ii + h12Vo

Io = h21Ii + h22Vo

Fig.11 Two Port System [2]

The parameters relating the four variables are called h-parameters from the
word “hybrid.” The term hybrid was chosen because the mixture of variables (V and I ) in
each equation results in a “hybrid” set of units of measurement for the h-parameters.

h11 = Vi/Ii |Vo=0 short-circuit input-impedance parameter

h12 = Vi/Vo |Ii=0 open-circuit reverse transfer voltage ratio parameter
h21 = Io/Ii |Vo=0 short-circuit forward transfer current ratio parameter
h22 = Io/Vo |Io=0 open-circuit output admittance parameter

Fig.14 Complete Hybrid Equivalent Model [2]

h11 hi input resistance

h12 hr reverse transfer voltage ratio
h21 hf forward transfer current ratio
h22 ho output conductance
Common Base Configuration

Fig. 15 Graphical Symbol [2] Fig.16 Hybrid equivalent model [2]

Common Base (Hybrid vs re model)

hib = re; hfb = - α = -1 [2]

Common Emitter Configuration

Fig. 17 Graphical Symbol [2] Fig. 18 Hybrid equivalent model [2]

Common Emitter (Hybrid vs re model)

hie = βre; hfe = βac [2]
6. COMMON EMITTER FIXED-BIAS CONFIGURATION

Zi = RB||βre

Zo = RC||ro

Av = -(ro||Rc)/re

Ai = (RBβro)/((ro+Rc)(RB+βre))

Fig. 23 Common-emitter fixed-bias configuration [2]

Fig.24 Substituting the re model into the network of Fig. 23 [2]

7. COMMON EMITTER VOLTAGE-DIVIDER BIAS

CONFIGURATION

Zi = R1||R2||βre

Zo = ro||Rc

Av = -(ro||Rc)/re

Ai = (RBβro)/((ro+Rc)(RB+βre))

Fig. 25. Voltage – divider bias configuration [2]

 Fig. 26. Substituting the re model into the network of Fig. 25 [2]

8. COMMON EMITTER-BIAS CONFIGURATION

(UNBYPASSED)

Zi = RB|| β(re+RE)

Zo = Rc

Av = -(Rc)/(re+RE)

Ai = (RBβ)/(RB+ β(re+RE))

Fig. 27 Common Emitter Bias Configuration [2]

Fig. 28 Substituting the re model into the network of Fig. 27 [2]

9. COMMON BASE CONFIGURATION

Zi = RE||re

Zo = RC

Av = RC/re

Ai = -1

Fig. 29 Common Base Configuration [2]

Fig. 30 Substituting the re model into the network of Fig. 29 [2]

10. COLLECTOR FEEDBACK CONFIGURATION

Zi = re/(1/β+RC/RF)

Zo = RC||RF

Av = -RC/re

Ai = RF/RC

Fig. 31 Collector Feedback Configuration [2]

Fig. 32 Substituting the re model into the network of Fig.31 [2]

 11. APPROXIMATE HYBRID EQUIVALENTCIRCUIT

Fig.33 Approximate Common-Emitter hybrid equivalent circuit [2]

Fig.34 Approximate Common-Base hybrid equivalent circuit [2]

FIXED-BIAS CONFIGURATION

Zi=RB||hie

Zo=Rc||(1/hie)

Av=-(hfe(Rc||(1/hoe)))/hie

Ai=hfe
VOLTAGE-DIVIDER BIAS CONFIGURATION

Zi=RB||hie

Zo=Rc||(1/hie)

Av=-(hfe(Rc||(1/hoe)))/hie

Ai=hfe

UNBYPASSED EMITTER-BIAS CONFIGURATION

Zi=hie+hfeRE

Zo=Rc

Av=-(hfeRc)/(hie+REhfe)

Ai=(hfe(RB||Zb))/(hie+REhfe)

12. CASCADED SYSTEMS

The two-port systems approach is particularly useful for cascaded systems such as
that appearing in Fig.35, where Av1, Av2, Av3, and so on, are the voltage gains of
each stage under loaded conditions. That is, Av1is determined with the input
impedance to Av2 acting as the load on Av1. For Av2, Av1 will determine the signal
strength and source impedance at the input to Av2.The total gain of the system is
then determined by the product of the individual gains as follows:
Avt=Av1 . Av2 . Av3 . Av4………………..

and the total current gain by AiT = - AvT(Zi1/ RL)

No matter how perfect the system design, the application of a load to a two-port
system will affect the voltage gain. Therefore, there is no possibility of a situation
where Av1, Av2, and so on, of Fig. 35 are simply the no-load values. The loading of
each succeeding stage must be considered.
Fig. 35. Cascaded Systems
 13. FET SMALL-SIGNAL MODEL

The ac analysis of an FET configuration requires that a small-signal ac model for the
FET be developed. A major component of the ac model will reflect the fact that an ac
voltage applied to the input gate-to-source terminals will control the level of current from
drain to source.
The gate-to-source voltage controls the drain-to-source (channel) current of an FET.
A dc gate-to-source voltage controlled the level of dc drain current through a
relationship known as Shockley’s equation: ID=IDSS.(VGS-VP)2
The change in collector current that will result from a change in gate-to-source
voltage can be determined using the transconductance factor gm in the following
manner: ∆ID = gm.∆VGS.
The prefix trans- in the terminology applied to gm reveals that it establishes a
relationship between an output and input quantity. The root word conductance was
chosen because gm is determined by a voltage-to-current ratio similar to the ratio that
defines the conductance of a resistor G = 1/R = I/V or, gm=∆ID/∆VGS

Graphical and mathematical determination of gm

FET Input Impedance zi: Zi(FET) = ∞Ω

FET Output Impedance zo: Zo(FET) = rd

14. FET AC EQUIVALENT CIRCUIT

The model for the FET transistor in the ac domain can be constructed. The control
of Id by Vgs is included source as shown in Fig.36 as a current source gmVgs
connected from drain to 36. The current source has its arrow pointing from drain to
source to establish a 180° phase shift between output and input voltages as will occur in
actual operation.

Fig. 36. FET AC Equivalent circuit [2]

 The input impedance is represented by the open circuit at the input terminals and
the output impedance by the resistor rd from drain to source. Note that the gate to
source voltage is now represented by Vgs (lower-case subscripts) to distinguish it
from dc levels. In addition, take note of the fact that the source is common to both input
and output circuits while the gate and drain terminals are only in “touch” through the
controlled current source gmVgs.
In situations where rd is ignored (assumed sufficiently large to other elements of
the network to be approximated by an open circuit), the equivalent circuit is simply a
current source whose magnitude is controlled by the signal Vgs and parameter gm—
clearly a voltage-controlled device.

FIXED BIAS CIRCUIT

Zi = RG

Zo = RD||rd

Av = -gm(RD||rd)

SELF BIAS CIRCUIT (Unbypassed Rs)

Zi = RG

Zo = RD||rd

Av = -gm(RD||rd)
SELF BIAS CIRCUIT (Bypassed Rs)

Zi = RG

Zo = RD

Av = -gmRD[1+gmRs+(RD+Rs)/rd)]

VOLTAGE-DIVIDER CONFIGURATION

Zi = R1||R2

Zo = rd||RD

Av = -gm(rd||RD)
SOURCE-FOLLOWER (COMMON-DRAIN) CONFIGURATION

Zi = RG

Zo = rd||Rs||1/gm

Av = gm(rd||Rs)/1+gm(rd||Rs)

COMMON-GATE CONFIGURATION

Zi = Rs||[(rd+RD)/1+gmRD]

Zo = rd||RD

Av = [gmRD+(RD/rd)]/[1+(RD/rd)

References
1. Alexander Ch., Sadiku M. Fundamentals of electric circuits. Fifth edition. McGraw-
Hill. 2013.
2. Floyd, Thomas L. Electronic devices : electron flow version / Thomas L. Floyd.-
9th ed. 2012
3. Nagrath I. J. , ELECTRONICS: Analog and Digital, Kindle Edition.
4. David Crecraft, Stephen Gergely. Analog Electronics: Circuits, Systems and
Signal Processing 1st Edition,
5. www.learnabout-electronics.org