Embedded System
Embedded System
IV YEAR (EEE)
Teaching Page
Topic Hours Source
Lecture Aid No
UNIT – I INTRODUCTION TO EMBEDDED SYSTEMS
L01 Definition of embedded systems 1 BB TB1 3
L10 ,
Structural units in a processor 1 BB TB1 84-88
L11
L12,
Selection of processor 1 BB TB1 113-117
L13
L14 Memory selection 1 BB TB1 118-119
L15 Processor interfacing with memory and I/O units 1 BB TB1 72-75
TOTAL 09
1
UNIT - III EMBEDDED NETWORKS
L19 Serial communication using I2C 1 BB TB1 160-161
TOTAL 09
UNIT - IV I/O PROGRAMMING SCHEDULE MECHANISM
2
L43 Embedded system design process 1 BB TB1 37-42
Embedded software development process and
L44,L45 tools. 1 BB TB1 620-643
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TEACHING AID
1. BB : Black Board
2. OHP : Overhead Projector
3. LCD : LCD Projector
4. MM : Multimedia
Text Books:
Text Books :
1. Rajkamal.P Embedded System – Architecture, Programming, Design, Tata McGraw Hill, Third Edition, 2016.
2. John B. Postman, Design with PIC Microcontrollers, McGraw Hill International Limited, Singapore, 2009.
Reference Books :
1.Frank Vahid and Tony Givargi, Embedded System Design – A Unified Hardware & Software
Introduction, John Wiley, 2011.
2. Steve Furbe, ARM System-on-chip Architecture, Addison-Wesley Professional, Second Edition, 2000.
3. Steve Heath, Embedded System Design, Second Edition, Elsevier, 2003.
4.Wayne wolf, Computers as components: Principles of embedded computing system design, Morgan
Kaufmann publishers, Third Edition, 2012.
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UNIT-I (CO1)
INTRODUCTION TO EMBEDDED SYSTEM
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9. Give example for embedded systems. (Remembering)
Washing or cooking system, Multitasking toys, Keyboard controller, Fax or
Photocopy or printer or scanner machine, Mobile smart phones, Video games
14. List out the various types of memory used in embedded systems? (Remembering)
RAM (internal External)
ROM/PROM/EEPROM/Flash
Cache memory
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19. What is CISC processor? (Remembering)
Complex instruction-set computing processors are usually represented as CISC
processor, example 8085 microprocessor.
21. What does the execution unit of a processor in an embedded system do? (Remembering)
The EU includes the ALU and also the circuits that execute instructions for a program
control task. The EU has circuits that implement the instructions pertaining to data transfer
operations and data conversion from one form to another.
22. What are the important embedded processor chips? (Remembering)
ARM 7 and ARM 9
i 960
AMD 29050
23. Name some DSP used in embedded systems? (Remembering)
TMS320Cxx, SHARC, 5600xx
24. Define ROM image. (Remembering)
Final stage software is also called as ROM image .The final implement able software
for a product embeds in the ROM as an image at a frame. Bytes at each address must be
defined for creating the image.
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29. What are the design metrics? (Remembering)
Power, Size, NRE cost, Performance
30. What are the challenges of embedded systems? (Remembering)
Hardware needed
Meeting the deadlines
Minimizing the power consumption
Design for upgradeability
31. Give the steps in embedded system design? (Remembering)
Requirements, Specifications, Architecture, Components, System integration
32. What are the requirements? (Remembering)
Before designing a system, it must to understand what has to be designed. This can be
known from the starting steps of a design process.
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UNIT II (CO2)
PROCESSOR AND MEMORY ORGANIZATION
1. Name the essential units of a processor and state their functions. (Remembering)
i. Program flow control unit (CU).
ii. Execution unit (EU)
The CU includes a fetch unit for fetching instruction from the memory.
The EU has circuits that implement the instructions pertaining to data transfer operations
and data conversion from one from to another. The EU includes the Arithmetic and
Logical Unit (ALU) and the circuits that execute instructions for a program control task.
2. Name the various structural units of a processor. (Remembering)
Arithmetic and logical subunit
Processing unit
Basic units
Instruction dispatch
Control register
Pre-fetch unit.
3. State the function of Arithmetic and logical unit. (Remembering)
To execute arithmetical or logical instruction according to current instruction fetched
at IR.
4. What is pipelined architecture? (Remembering)
Pipelining is an implementation technique where multiple instructions are overlapped
in execution. The computer pipeline is divided in stages. Each stage completes a part of an
instruction in parallel.
5. What is superscalar architecture? (Remembering)
In super scalar architecture the performance of the processor enhanced by executing
two or more instruction in parallel with help of parallel execution units.
6. What is Flash memory? (Remembering)
Flash memory is a form of EEPROM in which a sector of bytes can be erased in flash
(very short duration corresponding to a signal clock cycle).
7. List out a few important parameters while selecting a processor. (Remembering)
i. clock speed
ii. execution of number of instruction per second
iii. type of processor architecture (Pipeline and/or superscalar architecture)
iv. memory size (internal and external)
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10. Distinguish parallel and serial port.(Understanding)
A port for read and write operations on multiple bits at an instance is a parallel port. A
port read and writes operations with one bit at an instance and where each bit of the
message is separated by constant time interval.
11. Difference between memory mapped I/O and peripheral I/O? (Understanding)
MEMORYMAPPEEDI/O PERIPHERALI/O
16-bitdeviceaddress 8-bitdeviceaddress
The data transfer between any general- The data transfer only between
purpose register and I/O port accumulator and I/Oport
The memory map(64kb)is shared between I/O The I/O map is independent of the
Device and system memory memory
Morehardwareisrequiredtodecode16-bit map,256inputdeviceand256outputdevice
Lesshardwareisrequiredtodecode8-bit
address address
13. What is the difference between CPU bus and system bus? (Remembering)
The CPU bus has multiplexed lines but the system bus has separate lines for each
signal. (The multiplexed CPU lines are demultiplexed by the CPU interface circuit to form
system bus).
14. Write the various form of memories present in a system.(Remembering)
Various forms of memories are
•RAM (internal External)
• ROM
• PROM
• EEPROM
• Flash
• Cache memory
• EEPROM or flash
• Extemal ROM or PROM for embedding software
• RAM Memory buffers
• Caches (in superscalar microprocessors)
15. What does memory-mapping mean? (Remembering)
The memory mapping is the process of interfacing memories to microprocessor and
allocating addresses to each memory locations.
16. Why EPROM is mapped at the beginning of memory space in 8085 system?
(Remembering)
In 8085 microprocessor, after a reset, the program counter will have OOOOH address.
If the monitor program is stored from this address then after a reset, it will be executed
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automatically. The monitor program is a permanent program and stored in EPROM
memory. If EPROM memory is mapped at the beginning of memory space, i.e., at
OOOOH, then the monitor program will be executed automatically after a reset.
17. Mention the features of RISC which are used and rejected in ARM processors.
(Understanding)
Features used:
1. Load store architecture
2. Fixed-length 32-bit instructions.
3-address instruction formats.
Features rejected:
1. Register windows
2. Delayed branches
3. Single cycle execution of all instructions.
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UNIT-III (CO3)
EMBEDDED NETWORKS
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9. Distinguish half-duplex and full duplex communication. (Understanding)
Low cost
Easy implementation
Moderate speed (up to 100 kbps).
One master (a microcontroller), three slave nodes (an ADC, a DAC, and a
microcontroller), and pull-up resistors Rp.
The wiring complexity is low. This factor plays an especially large role in
automobiles. An economical and easy to manage twisted wire pair serves as the
transmission medium. CAN stations can be subsequently added to and removed from the
existing CAN bus relatively easily.
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15. State the disadvantages of CAN bus. (Remembering)
The bus line cannot be designed arbitrarily long since the electrical properties (e.g.
signal reflections) set physical limits in combination with the transmission speed.
The same is also valid for the branch lines to the control units in the automobile. Depending
on the transmission speed they may not exceed a certain length.
In order to optimise the signal quality the ends of the bus line must be "terminated" with load
resistors.
USB is a serial bus for interconnecting a system. It attaches and detaches a device
from the network. It uses a root hub. Nodes containing the devices can be organized like a tree
structure. It is mostly used in networking the IO devices like scanner in a computer system.
17. What are the features of the USB protocol? (Remembering)
A device can be attached, configured and used, reset, reconfigured and used, sharethe
bandwidth with other devices detached and reattached.
18. Draw the data frame format of CAN? (Remembering)
ISA stands for Industry Standard Architecture. Used for connecting devices following
IO addresses and interrupts vectors as per IBM pc architecture.
20. Name the four types of data transfer used in USB? (Remembering)
Controlled transfer
Bulk transfer
Interrupt driven data transfer
Is synchronous transfer
Industry Standard Architecture (ISA) is a data transfer standard introduced in the IBM
PC in 1982. An ISA bus, or data path way, operates at 8 MHz clock rate and has a maximum
data rate of 8 MBps. In newer systems ISA buses are used only for slower devices. Peripheral
Component Interconnect (PCI)was introduced in1992. It operates at clock speeds of 33 or 66
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MHz At 32 bits and 33 MHz, a PCI bus has a maximum data rate of 132 MBps.Sockets, slots,
for PCI cards are shorter than those for ISA plug-in cards.
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31. What is TCP/IP? (Remembering)
The Transmission Control Protocol (TCP) is a core protocol of the Internet Protocol. It
originated in the initial network implementation in which it complemented the Internet
Protocol (IP). Therefore, the entire suite is commonly referred to as TCP/IP.The Transmission
Control Protocol provides a communication service at an intermediate level between an
application program and the Internet Protocol. It provides host-to-host connectivity at the
Transport Layer of the Internet model. An application does not need to know the particular
mechanisms for sending data via a link to another host, such as the required packet
fragmentation on the transmission medium. At the transport layer, the protocol handles all
handshaking and transmission details and presents an abstraction of the network connection to
the application.
Three types of addresses are used by systems using the TCP/IP protocol: the physical address, the
internet work address (IP address), and the port address. The physical address also known as the
link address, is the eaddressofanodeasdefinedbyitsLANorWAN.TheIPaddressuniquelydefines a
host on the Internet. The port address identifies a process on a host.
UNIT IV (CO4)
I/O PROGRAMMING SCHEDULE MECHANISM
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Least Slack Time First (LSF)
Rate Monotonic Scheduling (RMS)
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15. What is preemptive and non-preemptive scheduling? (Remembering)
• Under non-preemptive scheduling once the CPU has been allocated to a
process, the process keeps the CPU until it releases the CPU either by
terminating or switching to the waiting state.
• Preemptive scheduling can preempt a process which is utilizing the CPU
in between its execution and give the CPU to another process.
19. What are the various scheduling criteria for CPU scheduling? (Remembering)
The various scheduling criteria are
CPU utilization, * Throughput,
Turnaround time, * Waiting time
Response time,
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23. What is critical section problem? (Remembering)
Consider a system consists of ‘n‘processes. Each process has segment of
code called a critical section, in which the process may be changing common
variables, updating a table, writing a file. When one process is executing in its
critical section, no other process can allowed executing in its critical section.
24. What are the requirements that a solution to the critical section problem must
satisfy? (Remembering)
The three requirements are
¬ Mutual exclusion
¬ Progress
¬ Bounded waiting
25. Define deadlock. (Remembering)
Process requests resources; if the resources are not available at that time,
the process enters a wait state. Waiting processes may never again change
state, because the resources they have requested are held by other waiting
processes. This situation is called a deadlock.
26. What are conditions under which a deadlock situation may arise? (Remembering)
A deadlock situation can arise if the following four conditions hold
simultaneously in a system:
1. Mutual exclusion
2. Hold and wait
3. No pre-emption
4. Circular wait
27. Explain multi task and their functions in embedded system. (Remembering)
This system implements cooperative and time-sliced multitasking,
provides resource locking and mailbox services, implements an efficient paged
memory manager, traps and reports errors, handles interrupts, and auto starts
your application at system startup. By following some simple coding practices
as shown in the documented coding examples, you can take advantage of these
sophisticated features without having to worry about the implementation
details.
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30. Define Semaphore. (Remembering)
Semaphore provides a mechanism to let at ask wait till another finishes. It is a
way of synchronizing concurrent processing operations. When a semaphore is
taken by at ask then that task has access to the necessary resources. When given
the resources unlock. Semaphore can be used as an event flag or as a resource key.
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39. Define Inter process communication. (Remembering)
Inter-process communication (IPC) is a set of techniques for the exchange
of data among multiple threads in one or more processes. Processes may be
running on one or more computers connected by a network. IPC techniques are
divided into methods for message passing, synchronization, shared memory,
and remote procedure calls (RPC). The method of IPC used may vary based on
the bandwidth and latency of communication between the threads, and the type
of data being communicated.
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UNIT V (CO5)
REAL TIME OPERATING SYSTEM
10. What are the two methods by which a running requests resources? (Remembering)
Message, System call
13. What are the three methods by which an RTOS responds to a hardware source call
on interrupt? (Remembering)
Direct call to ISR by an interrupt source
Direct call to RTOS by an interrupt source and temporary suspension of a
Scheduled task.
Direct call to RTOS by an interrupt source and scheduling of tasks as well as
ISRs by the RTOS.
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18. What are the features of MC/OS II? (Remembering)
PreemptiveMultitasking Scalable Portable
27. What should be done to guarantee that a hard real time system meets its deadlines?
(Remembering)
In order to guarantee that a hard real time system meets its deadlines, we must
ensure that each of the tasks has a predictable worst case execution time.
28. What are the disadvantages of using certain memory saving techniques?
(Remembering)
The disadvantages are,
1. Two or more tasks perform same functions
2. Development tools may sabotage the user.
3. RTOS contains many functions that are not needed to the task.
4. Certain C statements are translated into huge number of assembly language
instructions.
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PART B QUESTIONS
UNIT-I (CO1)
INTRODUCTION TO EMBEDDED SYSTEMS
UNIT – II (CO2)
PROCESSOR AND MEMORY ORGANIZATION
1. Explain selection of processor and memory devices? (Remembering)
2. Draw and explain the structural units in a processor? (Remembering)
3. Explain memory types and memory mapping with neat diagram? (Remembering)
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4. Explain different types of I/O device with neat diagram? (Remembering)
5. Draw the circuit for interfacing processor, memory and I/O devices. (Remembering)
6. Design memory the devices needed for a low resolution uncolored digital camera.
(Remembering)
7. Explain Automatic operation unit in advanced processors. (Remembering)
8. What is the advanced processing unit found in the processor Architecture?
(Remembering)
9. Explain the architecture and memory organization of ARM processor. (Remembering)
10. Explain interfacing of memory with processor. (Remembering)
UNIT-III (CO3)
EMBEDDED NETWORKS
1. Explain the parallel port devices. (Remembering)
2. Explain the sophisticated interfacing features in device ports. (Remembering)
3. Explain the signal using a transfer of byte when using the I 2C bus and also the format of
Bits at the I2C bus with diagram. (Remembering)
4. Explain the internal serial communication devices. (Remembering)
5. Explain the following parallel communication buses. (Remembering)
i) ISA bus
ii) PCI and PCI/X
6. Write short notes on (Remembering)
(i) Analog to digital converter
(ii) UART
7. Explain the synchronous and asynchronous communications from serial devices.
(Remembering)
8. Explain the various bus structures used in embedded systems. (Remembering)
9. Explain the serial communication using I2C, CAN, and USB in detail. (Remembering)
10. Explain the signal using a transfer of byte when using the I2C bus and also the format of
bits at the I2C bus with diagram. (Remembering)
11. Explain serial communication using SPI. (Remembering)
12. Explain with neat diagram about ARM bus. (Remembering)
13. Explain different types of network protocols. (Remembering)
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UNIT – IV (CO4)
I/O PROGRAMMINGSCHEDULE MECHANISM
1. Explain the use of Semaphores for a Task or for the Critical Sections of a Task.
(Remembering)
2. Explain about task and different task states. (Remembering)
3. Explain the strategy for synchronization between the processes, ISRs, OS
functions and tasks for resource management. (Remembering)
4. Explain how thread and process are used in embedded system. (Remembering)
5. List the mechanism available to solve the shared data problem? (Remembering)
6. Briefly explain different types of inter process communication features.
(Remembering)
7. Explain in detail about message mailbox and queue. (Remembering)
8. Write about Semaphores with types in detail. (Remembering)
9. Explain in detail about mutex, lock and spin lock. (Remembering)
10. Explain inter process communication and synchronization. (Remembering)
10. What is the need of scheduling? Explain different types of scheduling
mechanisms. (Remembering)
11. Explain the scheduler in which RTOS insert into the list and the ready task for
Sequential execution in a co-operative round robin model. (Remembering)
12. (i)Explain the critical section service by a preemptive scheduler.
ii) Explain the Rate Monotonic Co-operative scheduling. (Remembering)
13. Discuss with the diagram task synchronization model for a specific application.
(Remembering)
14. Explain cyclic scheduling with time slicing.(Remembering)
. UNIT –V (CO5)
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