Ordering number: EN 1197F

CMOS IC

LC7265
Received Frequency Display for Radio Receivers

Features

Package Dimensions
unit : mm

. Displays received frequency of each band of FM, MW, LW . (LED static display). frequency and displays received Counts local oscillation . frequency. display digits : FM-5 digits, MW-4 digits, LW-3 Number of . digits. intermediate frequencies shown below. Covers
+10.700, +10.725, +10.750, +10.675 MHz 10.700, 10.725, 10.675, 10.650 MHz MW, LW : +450 kHz : 10 kHz step display +450 kHz : 1 kHz step display +455 kHz : 1 kHz step display +469 kHz : 1 kHz step display Contains blanking circuit to turn off display. Contains hold circuit to hold display contents. Uses crystal resonator having 7.2 MHz reference frequency. Uses LB3500 (8 prescaler) jointly at the time of FM reception. Supply voltage VDD : 4.5 V to 10 V FM :

3025B-DIP42S
[LC7265]

. . . . .

SANYO : DIP42S

Specifications
Absolute Maximum Ratings at Ta = 25 C, VSS = 0 V
Parameter Maximum supply voltage Input voltage Output voltage Allowable power dissipation Allowable power dissipation of segment outputs Symbol VDD max VIN VO1 VO2 Pd max Pd (seg)1 Pd (seg) 2 Pd (seg) 3 Pd (seg) 4 Operating temperature Storage temperature Topr Tstg All input pins XOUT, HLD, 50 Hz, output: off Output pins other than VO1 Ta % 65 C MHz, b&c, b&e, VDD = 4.5 to 6.5 V, IOL = 33 mA Other outputs, VDD = 4.5 to 6.5 V, IOL = 16.5 mA MHz, b&c, b&e, VDD = 6.0 to 10 V, IOL = 36 mA Other outputs, VDD = 6.0 to 10 V, IOL = 18 mA Conditions Ratings 0.3 to +11 0.3 to VDD+0.3 0.3 to VDD+0.3 0 to 15 550 30 15 25 12 30 to +65 40 to +125 Unit V V V V mW mW mW mW mW C C

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63098HA(II)/6088YT/9105KI/3173KI/D162KI/7162KI/6242KI,TS No.1197-1/6

LC7265
Allowable Operating Ranges at Ta = 25 C, VDD = 4.5 to 10 V, VSS = 0 V
Parameter Supply voltage Input high-level voltage Input low-level voltage Symbol VDD VIH1 VIH2 VIL1 VIL2 fIN1 Input frequency fIN2 fIN3 VIN1 Input amplitude VIN2 VIN3 Segment current Iseg1 Iseg2 A/F, BLK FIF1, FIF2, FIF3, AIF1, AIF2 A/F, BLK FIF1, FIF2, FIF3, AIF1, AIF2 FMI, sine wave, capacitive coupling, VIN1 = 0.7Vp-p AMI, sine wave, capacitive coupling, VIN2 = 0.5Vp-p* XIN FMI, sine wave, capacitive coupling, fIN1 = 1 to 18 MHz AMI, sine wave, capacitive coupling, fIN2 = 0.5 to 3 MHz XIN, sine wave, capacitive coupling, fIN3 = 0.2 to 7.5 MHz MHz, b&e, b&c Other outputs Conditions min 4.5 0.7VDD 0.9VDD 0 0 1 0.5 0.2 0.7 0.5* 1.0 0 0 typ max 10 VDD VDD 0.3VDD 0.1VDD 18 3 7.5 0.9VDD 0.9VDD 0.9VDD 30 15 Unit V V V V V MHz MHz MHz Vp-p Vp-p Vp-p mA mA

*: For fIN2 = 0.5 MHz to 0.9 MHz and VDD = 8 to 10 V, VIN2 min = 1.0 Vp-p applies.

Electrical Characteristics at Ta = 25 C, VDD = 4.5 to 10 V, VSS = 0 V

Parameter Input high-level current Symbol IIH1 IIH2 IIL1 Input low-level current Input floating voltage Input/output high-level leakage current IIL2 IIL3 VIF IOFF VOL1 VOL2 Output low-level voltage VOL3 VOL4 Input high-level threshold voltage Output off leakage current Vth IOFF2 BLK BLK A/F A/F VI = VDD VI = VSS VI = VSS VI = VSS VI = open Conditions FIF1, FIF2, FIF3, AIF1, AIF2 FIF1, FIF2, FIF3, AIF1, AIF2 VI = VDD min 0 0 0 0 20 0.8VDD 0 0 0 0 0 0 typ max 10 2 10 2 500 VDD 2 1 0.7 0.7 1.0 10 Unit A A A A A V A V V V V V A

HLD, output off, VI = VDD HLD, output on, IO = 1 mA b&e, b&c, MHz VDD = 4.5 to 10 V, IOL = 30 mA Segments other than above VDD = 4.5 to 10 V, IOL = 15 mA 50 Hz, IO = 0.2 mA HLD All segments output pins, VO = 13 V, output off FM mode, A/F = open or VDD, fIN1 = 18 MHz, 0.7Vp-p or (AM mode, A/F = VSS, fIN2 = 3 MHz, 0.5Vp-p) fIN3 = 7.2 MHz, 1Vp-p FIF1, FIF2, FIF3 = VDD AIF1, AIF2 = VDD HLD, BLK = VDD other pins open

0.4VDD 0.5VDD 0.7VDD

Current drain

IDD

18

mA

Pin Assignment

Top view No.1197-2/6

LC7265
Equivalent Circuit Block Diagram

1. Display 1-1 Display font

1-2 Lighting system Static lighting 1-3

. Display range (High-order 1 digit : zero blanking) . FM to 199.95 50 kHz step . MW, LW :: 00.00 MHz 1999 kHz MHz 10 kHz or 1 kHz step 000 kHz to . a to g, b&c, b&e, MHz, kHz : LED

2. Pin Description 2-1

2-2 2-3

.V ,V .X , X
DD IN

SS

: Power supply pins : Crystal resonator or input amp pin

OUT

No.1197-3/6

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2-4

. FIF1, FIF2, FIF3 : FM IF select pins

FIF1 FIF2 FIF3 IF (MHz) 0 0 0 +10.700 0 0 1 +10.725 0 1 0 +10.675 0 1 1 +10.750 1 0 0 10.700 1 0 1 10.725 1 1 0 10.675 1 1 1 10.650

2-5

. AIF1, AIF2 : AM IF select pins

AIF1 AIF2 IF (kHz) 0 0 +450 (2) 0 1 +450 (1) 1 0 +455 1 1 +469

1 : High level (VDD) 0 : Low level (VSS)

(Note) 450 kHz(1) : 10 kHz step display, others : 1 kHz step display 2-6

. HLD : Display contents hold pin

Normally, this pin is set at high level. To hold display contents, this pin is set at low level. Connecting time constant circuit to this pin makes it possible to hold display contents for a certain period of time at the time of FM/MW, LW band selection.

Internal clock A/F HLD Display contents hold 2-7 Threshold voltage of e Depending on C, R

. BLK : Display blanking pin

Example of blanking misdisplay at the time of application of power.

2-8

. FMI, AMI : Local oscillation signal input pins

FMI For FM : 0.7Vp-p input sensitivity AMI For MW, LW : 1.0Vp-p input sensitivity (VDD = 8 to 10 V, fIN = 0.5 to 0.9 MHz) 0.5Vp-p input sensitivity (other than above)

2-9

. A/F : FM/MW, LW select pin

FM Pin open or high level MW, LW Low level

2-10

. 50 Hz : 50 Hz time base output pin

No.1197-4/6

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Hold time time constant connected to HLD pin
To obtain 1-s hold time make time constant connected to HLD pin 720 ms. C = 2.2 F R = 470 k Note: time constant connected to HLD pin must be 100 ms or more.

Time constant connected to BLK pin VDD rise time

Time constant connected to BLK pin (t = CR) ms

Hold time ms

If VDD rise time is 200 ms, make time constant externally connected to BLK pin 200 ms or more. C = 1 F or more R = 200 k

Time constant connected to HLD pin, (t = CR) ms IDD VDD

For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD For AMI input : 3 MHz, 0.5Vp-p, A/F = VSS For FMI input Common conditions For AMI input Other pins open

VDD rise time ms IDD Ta

For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD For AMI input : 3 MHz, 0.5Vp-p,A/F = VSS

Current drain, IDD mA

Current drain, IDD mA

For FMI input

For AMI input Common conditions Other pins open

Supply voltage, VDD V Vp-p fIN1

Ambient temperature, Ta C Vp-p fIN2

Input amplitude mVp-p

FMI input frequency, fIN1 Hz VDD fIN1

Upper standard value. VDD = 15 V or more

Input amplitude mVp-p

AMI input frequency, fIN2 Hz VDD fIN2

Supply voltage, VDD V

Supply voltage, VDD V

Upper standard value

Lower standard value

Lower standard value

FMI input frequency, fIN1 MHz

AMI input frequency, fIN2 MHz No.1197-5/6

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Vt VDD HLD threshold voltage, Vt V BLK threshold voltage, Vt V Vt VDD

Upper standard value high-level threshold voltage

Lower standard value low-level threshold voltage

Supply voltage, VDD V ROUT VDD Output impedance, ROUT

Supply voltage, VDD V IOL VOL

Segment outputs other than MHz, b&c, b&e This data is in case of flowing current to one segment only.

Segment outputs (IOL = 15 mA) other than 5b&e, 1b&c, MHz

Segment outputs (IOL = 30 mA) of 5b&e, 1b&c, MHz

Supply voltage, VDD V

Output current, IOL mA

Output voltage, VOL V

No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: 1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: 2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1998. Specifications and information herein are subject to change without notice.

No.1197-6/6

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