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L 5-AddressingModes

The document discusses various addressing modes used in instruction sets including: 1. Immediate addressing where the operand is specified in the instruction itself. 2. Register addressing where the operand value is present in a register, allowing very fast execution but limited address space. 3. Register indirect addressing where the operand offset is given in a CPU register, allowing access to tabular data. 4. Indexed addressing where the operand address is the sum of an index register and displacement, providing an efficient way to access arrays. 5. Stack addressing where the operand is implicitly on top of the stack pointed to by the stack pointer, commonly used for push/pop operations.

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10 views

L 5-AddressingModes

The document discusses various addressing modes used in instruction sets including: 1. Immediate addressing where the operand is specified in the instruction itself. 2. Register addressing where the operand value is present in a register, allowing very fast execution but limited address space. 3. Register indirect addressing where the operand offset is given in a CPU register, allowing access to tabular data. 4. Indexed addressing where the operand address is the sum of an index register and displacement, providing an efficient way to access arrays. 5. Stack addressing where the operand is implicitly on top of the stack pointed to by the stack pointer, commonly used for push/pop operations.

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Lekshmi
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© © All Rights Reserved
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Download as PDF, TXT or read online on Scribd
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Instruction Sets:

Addressing Modes and Formats


Addressing Modes : Rules specified for
interpreting the address field of instruction
before the actual operand is referred

op.code : field specifies the operation to be


performed. Not because of the operation to
be performed on the operands, these
operands need to be selected carefully
which depends upon the addressing mode.
Addressing Modes
1) Immediate Addressing mode
2) Direct Addressing mode
3) Register Indirect Addressing mode
4) Register Addressing mode
5) Register Relative Addressing mode
6) Base Indexed Addressing mode
7) Base Relative Addressing mode
8) Indexed Addressing mode
9) Stack
1) Immediate Addressing
• Constants are used as operand value
• Constants are short & fit into 16 bit field, sometimes
they are bigger
• MIPS instruction use lui – load upper immediate to
set upper 16 bits of a constant in a register &
allowing a subsequent instruction to specify the lower
16 bits of the constant
In this mode, the operand is specified in the instruction
itself. Instructions are longer but the operands are
easily identified.
1) Immediate Addressing
Example:
MOV CL, 12H
This instruction moves 12 immediately into CL register.
CL ← 12H
• No memory reference to fetch data
• Fast
• Limited range

Figure 1 : The MOV instruction


showing the source, destination, and
direction of data flow.
2) Direct Addressing
In this mode, address of the operand is directly
specified in the instruction. Here only the offset address
is specified, the segment being indicated by the
instruction.
Example:
MOV CL, [4321H]
This instruction moves data from location 4321H in the
data segment into CL.
The physical address is calculated as
DS * 10H + 4321
Assume DS = 5000H
PA = 50000 + 4321 = 54321H

CL ← [54321H]
2) Direct Addressing

• Single memory reference to access data


• No additional calculations to work out effective
address
• Limited address space
Figure 3 The operation of the MOV AL,[1234H] instruction when
DS=1000H .

• This instruction transfers a copy contents of memory location 11234H


into AL.
– the effective address is formed by adding
1234H (the offset address) and 10000H
(the data segment address of 1000H times
10H) in a system operating in the real mode
3) Register based indirect addressing
mode
• Here operand offset is given in a cpu register.
• the effective address of the memory may be taken
directly from one of the base register or index
register specified by instruction.
– If register is SI, DI and BX then DS is by default
segment register.
– If BP is used, then SS is by default segment
register.
Example:
MOV CX, [BX]
This instruction moves a word from the address pointed by
BX and BX + 1 in data segment into CL and CH
respectively.
CL ← DS: [BX] and CH ← DS: [BX + 1]
Physical address can be calculated as DS * 10H + BX.
Figure 4 The operation of the MOV AX,[BX] instruction when BX =
1000H and DS = 0100H. Note that this instruction is shown after the
contents of memory are transferred to AX.

AL ← DS: [BX] and AH ← DS: [BX + 1]


Physical address can be calculated as DS * 10H + BX.
Indirect addressing often allows a program to refer to
tabular data located in memory.
Figure 5 shows the table and the BX register used to
sequentially address each location in the table.
To accomplish this task, load the starting location of the
table into the BX register with a MOV immediate instruction.
After initializing the starting address of the table, use
register indirect addressing to store the 50 samples
sequentially.
Figure 5 An array (TABLE) containing 50 bytes that are indirectly
addressed through register BX.
4) Register Addressing (1)
Data transfer using registers is called register
addressing mode. Here operand value is present in
register.
For example
MOV AL,BL;
MOV AX,BX;
• Limited number of registers
• Very small address field needed
—Shorter instructions
—Faster instruction fetch
Register Addressing (2)
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
—Requires good assembly programming or
compiler writing
Register Addressing (2)
 The microprocessor contains these 8-bit register
names used with register addressing: AH, AL, BH, BL,
CH, CL, DH, and DL.
 16-bit register names: AX, BX, CX, DX, SP, BP, SI,
and DI.
 In 80386 & above, extended 32-bit register names
are: EAX, EBX, ECX, EDX, ESP, EBP, EDI, and ESI.
 64-bit mode register names are: RAX, RBX, RCX,
RDX, RSP, RBP, RDI, RSI, and R8 through R15.
 Important for instructions to use registers that are the same
size.
 never mix an 8-bit \with a 16-bit register, an 8- or a 16-bit

register with a 32-bit register


 this is not allowed by the microprocessor and results in an

error when assembled


Figure 3–3 The effect of executing the MOV BX, CX instruction at the
point just before the BX register changes. Note that only the
rightmost 16 bits of register EBX change.
Register Addressing Diagram
When a value is in a
Eg. Add R4,R3 R4 <- R4 + R3
register
Eg. Add R3 Ac <-
Instruction Ac + R3

Opcode Register Address R


Registers

Operand
5. Register Relative Addressing
In this mode, the operand address is calculated using
one of the base registers and an 8 bit or a 16 bit
displacement.

Example:

MOV CL, [BX + 04H]

This instruction moves a byte from the address pointed


by BX + 4 in data segment to CL.

CL ← DS: [BX + 04H]


Physical address can be calculated as DS * 10H + BX
+ 4H.
Figure 3–10 The operation of the MOV AX, [BX+1000H] instructon,
when BX=1000H and DS=0200H .
Indexed Addressing Mode
6. Base Index Addressing
Here, operand address is calculated as base register plus an
index register.

Example:

MOV CL, [BX + SI]

This instruction moves a byte from the address pointed by BX


+ SI in data segment to CL.

CL ← DS: [BX + SI]

Physical address can be calculated as DS * 10H + BX + SI.


Base Index Addressing
7. Base Relative-Plus-Index Addressing
 Similar to base-plus-index addressing.
 adds a displacement
 uses a base register and an index register to form the memory

address
 This type of addressing mode often addresses a two-dimensional array
of memory data.
Base Relative-Plus-Index Addressing
 In this mode, the address of the operand is calculated as the
sum of base register, index register and 8 bit or 16 bit
displacement.

Example:

MOV CL, [BX + DI + 20]

 This instruction moves a byte from the address pointed by


BX + DI + 20H in data segment to CL.

CL ← DS: [BX + DI + 20H]

Physical address can be calculated as DS * 10H + BX + DI +


20H.
Figure 3–12 An example of base relative-plus-index addressing using
a MOV AX,[BX+SI+100H] instruction. Note: DS=1000H
8. Indexed Addressing
Here operand offset is given by a sum of a value
held in either SI, or DI register and a constant
displacement specified as an operand.
For example
Lets take arrays as an example. This is very
efficient way of accessing arrays.

My_array DB ‘1’, ‘2’, ‘3’,’4,’5’;

MOV SI, 3;
MOV AL, My_array[3];
So AL holds value 4.
8. Indexed Addressing
• EA = Memory address + (R) (Index register)
– Address field references the main memory and
the referenced register contains a positive
displacement from that address
• Indexing technique is used to point or refer the
data stored in sequential memory locations one
by one.
• Efficient mechanism for performing iterative
operations
Combinations
• Postindex
• EA = (A) + (R)
Useful for stepping
through arrays in a
Auto- R1 <- R1 +M[R2]
Add R1, (R2)+ loop.
increment R2 <- R2 + d
R2 - start of array
d - size of an element

• Preindex
• EA = (A+(R))
Same as
autoincrement.
Auto- R2 <-R2-d Both can also be
Add R1,-(R2)
decrement R1 <- R1 + M[R2] used to implement
a stack as push and
pop
8. Stack Addressing
• Operand is (implicitly) on top of stack
• e.g.
—ADD Pop top two items from stack
and add
Stack Addressing
• Stack is linear array of reserved memory locations.
• Its associated with a pointer called Stack Pointer(SP)
• Stack pointer contains the address of Top of
Stack(TOS) where the operand is to be stored or
located.
– ie. address of operand is the contents of stack
pointer
• This addressing mode is the special case of register indirect
addressing where referenced register is a stack pointer.
• Usually stack grows in the direction of descending
addresses. ie. Starting from a high address and
progressing to lower one.
– In stack, SP is decremented before any items are
pushed on stack and Sp is incremented after any items
popped from stack
Summary
Check your understanding

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