Notes On ARM Mircroprocessor
Uploaded by
Tanveer Ahmed HakroNotes On ARM Mircroprocessor
Uploaded by
Tanveer Ahmed HakroDepartment of Computer Systems Engineering
Quaid-e-Awam University of Engineering, Science & Technology, Nawabshah
DIFFERENCE BETWEEN HARVARD AND VON NEUMANN ARCHITECTURE
There are basically two types of digital computer architectures. The first one is called Von Neumann
architecture and later Harvard architecture was adopted for designing digital computers.
Von Neumann Architecture:
It is named after the mathematician and early computer scientist John Von Neumann.
The computer has single storage system (memory) for storing data as well as program to be
executed.
Processor needs two clock cycles to complete an instruction. Pipelining the instructions is not
possible with this architecture.
In the first clock cycle the processor gets the instruction from memory and decodes it. In the
next clock cycle the required data is taken from memory. For each instruction this cycle
repeats and hence needs two cycles to complete an instruction.
This is a relatively older architecture and was replaced by Harvard architecture.
Harvard Architecture:
The name is originated from "Harvard Mark I" a relay based old computer.
The computer has two separate memories for storing data and program.
Processor can complete an instruction in one cycle if appropriate pipelining strategies are
implemented.
In the first stage of pipeline the instruction to be executed can be taken from program
memory. In the second stage of pipeline data is taken from the data memory using the
decoded instruction or address.
Most of the modern computing architectures are based on Harvard architecture. But the
number of stages in the pipeline varies from system to system.
Difference between Pentium/X86 and ARM Architecture
ARM Pentium/ X86
ARM is a RISC (Reduced Instruction Set Pentium is CISC (Complex Instruction Set
Computer) architecture Computer) architecture
RISC-based CPUs understand only a handful of CISC architectures can have up to thousands of
different instructions, the minimum necessary to individual commands supported by the processor
get the job done. that can be used in machine code. Each of these
assembly commands can range from a single
operation to several hundred or more in length.
They are more power efficient as compared to They are less power efficient as compared to
Pentium architecture ARM architecture
They are approximately 20% smaller in size as They are approximately 20% larger in size as
compared to Pentium processors compared to ARM processors
In the Intel x86 architecture the bootloader is On the ARM, there is no BIOS, & no delay for
called from BIOS (Basic Input / output system). the POST. There is also no hard drive. So the
It then loads the kernel into RAM from the first thing to run is the bootloader, which then
filesystem, & executes the kernel. At this point loads the kernel directly from flash (and not of a
the kernel has control & accesses the filesystem. filesystem). The bootloader passes execution to
On an Intel architecture you need only to place the kernel. The kernel then accesses the
the bootloader on the boot sector of the hard filesystem & things are pretty similar to an x86
drive and have an accessible filesystem. boot sequence from there.
ARM Architecture
1. What is ARM architecture?
ARM is abbreviation of “Advanced RISC Machines”
ARM is family of RISC architectures for processors developed by British company “ARM
Holdings”.
A RISC-based computer design approach means ARM processors require significantly fewer
transistors than typical CISC x86 processors in most personal computers. This approach
reduces costs, heat and power use. Therefore ARM processors are used in light, portable,
battery-powered devices including smartphones, laptops, tablet and notepad computers, and
other embedded systems.
ARM Holdings develops the instruction set and architecture for ARM-based products, but
does not manufacture products. ARM Holdings licenses the chip designs and the ARM
instruction set architectures to third-parties, who design their own products that implement
one of those architectures
2. Famous ARM versions?
Two famous ARM architecture versions are:
ARM7: Von Neuman Architecture
ARM9: Harvard Architecture
3. ARM Buses:
ARM architecture contains two varieties of buses
1. AHB (AMBA High-performance Bus) : for interfacing the memory
2. APB (AMBA Peripheral Bus) : for interfacing other peripheral devices
Where,
AMBA means Advanced Microcontroller Bus Architecture, is bus architecture for ARM
processors developed by ARM Limited.
4. ARM Processor Operating states:
ARM7 processor can operate into two states:
1. ARM 32-bit mode: in this mode 32bit instruction from memory are executed
2. Thumb 16-bit mode: in this mode 16-bit instructions from memory are executed
BX (Branch and Exchange) instruction is used for switching the mode of processor from one
mode to other mode
5. ARM Operation Modes:
User mode (usr)
Normal program execution mode
Fast Interrupt mode (fiq)
Supports a high-speed data transfer or channel process.
Interrupt mode (irq)
Used for general-purpose interrupt handling.
Supervisor mode (svc)
Protected mode for the operating system.
Abort mode (abt)
Implements virtual memory and/or memory protection
System mode (sys)
A privileged user mode for the operating system. (runs OS tasks)
Undefined mode(und)
Supports a software emulation of hardware coprocessors
Except user mode, all are known as privileged mode.
6. ARM Registers:
ARM has 37 registers:
Where
R13 is also referred to as SP, the Stack Pointer.
R14 is also referred to as LR, the Link Register.
R15 is also referred to as PC, the Program Counter.
CPSR (Current Program Status Register) has the following 32 bits:
M (bits 0–4) is the processor mode bits.
T (bit 5) is the Thumb state bit.
F (bit 6) is the FIQ disable bit.
I (bit 7) is the IRQ disable bit.
A (bit 8) is the imprecise data abort disable bit.
E (bit 9) is the data endianness bit.
IT (bits 10–15 and 25–26) is the if-then state bits.
GE (bits 16–19) is the greater-than-or-equal-to bits.
DNM (bits 20–23) is the do not modify bits.
J (bit 24) is the Java state bit.
Q (bit 27) is the sticky overflow bit.
V (bit 28) is the overflow bit.
C (bit 29) is the carry/borrow/extend bit.
Z (bit 30) is the zero bit.
N (bit 31) is the negative/less than bit.
