Assignment - 1
Assignment - 1
ANSHUL CHAUHAN
211EC103
1. Plot ID vs. VGS for an NMOS transistor. Let L = 0.18µm, W = 1.8µm, VDS = 1.8
V and vary VGS from 0 to 1.8 V. Repeat the same for a PMOS transistor with
proper terminal voltages.
Ans.
2) Plot ID vs. VDS (VDS varying between 0 to 1.8V) for a range of VGS values (say VGS = 0.2V, 0.6V,
1V, 1.4V and 1.8V) for W/L values of 1.8µm/0.18µm, 3.6µm/0.36µm, 7.2µm/0.72µm,
14.4µm/1.44µm. What do you observe in the current values and why?
Ans. The below Id vs Vds plots are output characteristics of nmos. There are 5 plots for each w/l
value and the bigger the saturation plot, larger the Vgs values.
a) 1.8µm/0.18µm
b) 3.6µm/0.36µm
c) 7.2µm/0.72µm
d) 14.4µm/1.44µm
Ans. In pmos and nmos the current flows from source to drain. For a particular value of Vgs if w and l
values are increased by keeping them in same ratio then the plot spread apart and the Id sat
difference increases. For pmos increasing values of Vgs values correspond to the lower levels of
saturation region for a given set of w and l values.
a) 1.8µm/0.18µm
b) 3.6µm/0.36µm
c) 7.2µm/0.72µm
d) 14.4µm/1.44µm