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Exp10 Cmos Inv PDF

The document describes an experiment to analyze and compare the voltage transfer characteristics and transient behavior of a pseudo NMOS inverter and CMOS inverter. The experiment involves simulating the circuits in Ngspice to plot the VTC curves and output voltage over time. The results show the VTC and transient output plots for each inverter, demonstrating their functionality. In conclusion, the experiment allows comparison of the input-output characteristics and switching performance of the two inverter types.

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John wick
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49 views7 pages

Exp10 Cmos Inv PDF

The document describes an experiment to analyze and compare the voltage transfer characteristics and transient behavior of a pseudo NMOS inverter and CMOS inverter. The experiment involves simulating the circuits in Ngspice to plot the VTC curves and output voltage over time. The results show the VTC and transient output plots for each inverter, demonstrating their functionality. In conclusion, the experiment allows comparison of the input-output characteristics and switching performance of the two inverter types.

Uploaded by

John wick
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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U20EC090 EC: 304 DIC 2023

EXPERIMENT: 10

AIM: To study the Voltage-Transfer Characteristics (VTC) of the Pseudo Load type of
NMOS transistor inverter and CMOS inverter with w =2u and l = 0.09u for
NMOS and w = 1u and l = 0.09u for PMOS. Also perform transient analysis for
both.
SOFTWARE: Ng spice
THEORY: Pseudo Load NMOS inverter:
A pseudo load NMOS inverter is a type of logic gate circuit that uses an NMOS transistor
as a load element to invert the output signal. It is called "pseudo" because the NMOS
transistor is not used as a switch, but rather as a resistive element.

When the input signal is low (0V), the NMOS transistor is turned off and the output voltage
is pulled up to Vdd through the load resistor, resulting in a high output signal (Vdd). When
the input signal is high (Vdd), the NMOS transistor is turned on and provides a low-
resistance path to ground, pulling the output voltage down to 0V, resulting in a low output
signal.

Note that this circuit has relatively slow switching speed compared to other types of
inverters because the NMOS transistor acts as a resistor, which causes a time delay during
the charging and discharging of the output node.

CMOS Inverter:
A CMOS inverter is a type of electronic circuit that is commonly used in digital logic
circuits. It is made up of a pair of complementary metal-oxide-semiconductor (CMOS)
transistors, one p-type and one n-type, connected in a particular configuration.
The CMOS inverter works by taking an input voltage and producing an output voltage that
Digital Integrated Circuit Rahul Jadav
U20EC090 EC: 304 DIC 2023
is the opposite of the input voltage. When the input voltage is high, the n-type transistor is
turned off, and the p-type transistor is turned on, allowing current to flow through the circuit
and producing a low output voltage. Conversely, when the input voltage is low, the p-type
transistor is turned off, and the n-type transistor is turned on, allowing current to flow
through the circuit in the opposite direction and producing a high output voltage.
One of the main advantages of the CMOS inverter is its low power consumption. Since the
transistors are only conducting when they need to be, very little power is wasted as heat.
Additionally, CMOS technology allows for high-speed operation and high noise immunity,
making it well-suited for use in digital circuits.

Circuit:

Pseudo load NMOS Inverter:

Digital Integrated Circuit Rahul Jadav


U20EC090 EC: 304 DIC 2023
CMOS Inverter:

CODE: Pseudo Load Inverter VTC


include cmos_90nm.txt

Vdd vdd 0 1.2


Vin vin 0 1.2
M1 vout vin 0 0 NMOS w = 2u l = 0.09u
M2 vout 0 vdd vdd PMOS w = 1u l = 0.09u

.dc Vin 0 1.2 0.01

.control
run
plot V(vout)
hardcopy pract10_pseudoloadvtc.ps V(vout)
.endc
.end

Pseudo load Transient Analysis


.include cmos_90nm.txt

Vdd vdd 0 1.2


Vin vin 0 Pulse( 0 1.2 10us 2us 2us 10us 20us)
M1 vout vin 0 0 NMOS w = 2u l = 0.09u
M2 vout 0 vdd vdd PMOS w = 1u l = 0.09u

.tran 20us 80us

.control
run
plot V(vout) v(vin)
Digital Integrated Circuit Rahul Jadav
U20EC090 EC: 304 DIC 2023
hardcopy pract10_transPseudo.ps V(vout) v(vin)
.endc
.end

CMOS Inverter VTC


.include cmos_90nm.txt
Vdd vdd 0 1.2
Vin vin 0 1.2
M1 vout vin 0 0 NMOS w = 2u l = 0.09u
M2 vout vin vdd vdd PMOS w = 1u l = 0.09u
.dc Vin 0 1.2 0.01
.control
run
plot V(vout)
hardcopy pract10_cmosinverter.ps V(vout)
.endc
.end
CMOS Inverter Transient Analysis
.include cmos_90nm.txt
Vdd vdd 0 1.2
Vin vin 0 Pulse( 0 1.2 10us 2us 2us 10us 20us)
M1 vout vin 0 0 NMOS w = 2u l = 0.09u
M2 vout vin vdd vdd PMOS w = 1u l = 0.09u

.tran 20us 80us

.control
run
plot V(vout) v(vin)
hardcopy pract10_cmostransient.ps V(vout) v(vin)
.endc
.end

Digital Integrated Circuit Rahul Jadav


U20EC090 EC: 304 DIC 2023

OUTPUT : Pseudo Load VTC:

Pseudo Load Transient Analysis:

Digital Integrated Circuit Rahul Jadav


U20EC090 EC: 304 DIC 2023

CMOS Inverter VTC:

CMOS Inverter Transient Analysis:

Digital Integrated Circuit Rahul Jadav


U20EC090 EC: 304 DIC 2023

CALCULATION

CONCLUSION : After performing this experiment, we plotted Input and Output characteristics (VTC curve)
for pseudo NMOS and CMOS inverter and checked their functionality through transient
analysis.

SIGNATURE

Digital Integrated Circuit Rahul Jadav

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