COMPUTER ARCHITECTURE AND ORGANIZATION (ECEG 3143)

CHAPTER 5
Assembly Programming

1. ASSEMBLY LANGUAGE
Each personal computer has a microprocessor that manages the computer's arithmetical, logical,
and control activities. Each family of processors has its own set of instructions for handling various
operations such as getting input from keyboard, displaying information on screen and performing
various other jobs. These set of instructions are called 'machine language instructions'.
A processor understands only machine language instructions, which are strings of 1's and 0's.
However, machine language is too obscure and complex for using in software development. So, the
low-level assembly language is designed for a specific family of processors that represents various
instructions in symbolic code and a more understandable form.

Advantages of Assembly Language

Having an understanding of assembly language makes one aware of −
• How programs interface with OS, processor, and BIOS;
• How data is represented in memory and other external devices;
• How the processor accesses and executes instruction;
• How instructions access and process data;
• How a program accesses external devices.
Other advantages of using assembly language are −
• It requires less memory and execution time;
• It allows hardware-specific complex jobs in an easier way;
• It is suitable for time-critical jobs;
• It is most suitable for writing interrupt service routines and other memory resident
programs.

2. GENERAL PURPOSE REGISTERS

8086 CPU has 8 general purpose registers, each register has its own name:
• AX - the accumulator register (divided into AH / AL).
• BX - the base address register (divided into BH / BL).
• CX - the count register (divided into CH / CL).

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• DX - the data register (divided into DH / DL).
• SI - source index register.
• DI - destination index register.
• BP - base pointer.
• SP - stack pointer.
4 general purpose registers (AX, BX, CX, DX) are made of two separate 8 bit registers, for example
if AX=0011000000111001b, then AH=00110000b and AL=00111001b. Therefore, when we
modify any of the 8 bit registers 16 bit register is also updated, and vice-versa. The same is for
other 3 registers, "H" is for high and "L" is for low part.
Because registers are located inside the CPU, they are much faster than memory. Accessing a
memory location requires the use of a system bus, so it takes much longer time. Accessing data in a
register usually takes no time. Therefore, you should try to keep variables in the registers. Register
sets are very small and most registers have special purposes which limit their use as variables, but
they are still an excellent place to store temporary data of calculations.

3. SEGMENT REGISTERS

• CS - points at the segment containing the current program.

• DS - generally points at segment where variables are defined.
• ES - extra segment register, it's up to a coder to define its usage.
• SS - points at the segment containing the stack.
Although it is possible to store any data in the segment registers, this is never a good idea. The
segment registers have a very special purpose - pointing at accessible blocks of memory.
Segment registers work together with general purpose register to access any memory value. For
example if we would like to access memory at the physical address 12345h (hexadecimal), we
should set the DS = 1230h and SI = 0045h. This is good, since this way we can access much more
memory than with a single register that is limited to 16 bit values.
CPU makes a calculation of physical address by multiplying the segment register by 10h and
adding general purpose register to it (1230h * 10h + 45h = 12345h):

The address formed with 2 registers is called an effective address.

By default BX, SI and DI registers work with DS segment register;
BP and SP work with SS segment register.
Other general purpose registers cannot form an effective address!

4. SPECIAL PURPOSE REGISTERS

• IP - the instruction pointer.
• Flags Register - determines the current state of the processor.

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IP register always works together with CS segment register and it points to currently executing
instruction. Flags Register is modified automatically by CPU after mathematical operations, this
allows to determine the type of the result, and to determine conditions to transfer control to other
parts of the program. Generally we cannot access these registers directly.

5. MEMORY ACCESS

To access memory we can use these four registers: BX, SI, DI, BP.
Combining these registers inside [ ] symbols, we can get different memory locations. These
combinations are supported (addressing modes):

[BX + SI] [SI] [BX + SI] + d8

[BX + DI] [DI] [BX + DI] + d8
[BP + SI] d16 (variable offset only) [BP + SI] + d8
[BP + DI] [BX] [BP + DI] + d8

[SI] + d8 [BX + SI] + d16 [SI] + d16

[DI] + d8 [BX + DI] + d16 [DI] + d16
[BP] + d8 [BP + SI] + d16 [BP] + d16
[BX] + d8 [BP + DI] + d16 [BX] + d16

d8 - stays for 8 bit displacement.

d16 - stays for 16 bit displacement.
• Displacement can be an immediate value or offset of a variable, or even both. It's up to
compiler to calculate a single immediate value.
• Displacement can be inside or outside of [ ] symbols, compiler generates the same machine
code for both ways.
• Displacement is a signed value, so it can be both positive and negative.
Generally the compiler takes care about difference between d8 and d16, and generates the required
machine code.
For example, let's assume that DS = 100, BX = 30, SI = 70, d16.
The following addressing mode: [BX + SI] + 25
is calculated by processor to this physical address: 100 * 16 + 30 + 70 + 25 = 1725.
By default DS segment register is used for all modes except those with BP register, for
these SS segment register is used.
There is an easy way to remember all those possible combinations using this chart:

We can form all valid combinations by taking only one item from each column or skipping the
column by not taking anything from it. As we see BX and BP never go together. SI and DI also
don't go together. Here is an example of a valid addressing mode: [BX+5].
The value in segment register (CS, DS, SS, ES) is called a "segment", and the value in purpose
register (BX, SI, DI, BP) is called an "offset". When DS contains value 1234h and SI contains the
value 7890h it can be also recorded as 1234:7890. The physical address will be 1234h * 10h +
7890h = 19BD0h.
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In order to say the compiler about data type, these prefixes should be used:
BYTE PTR - for byte.
WORD PTR - for word (two bytes).

For example:
BYTE PTR [BX] ; byte access.
or
WORD PTR [BX] ; word access.
Emu8086 supports shorter prefixes as well:
b. - for BYTE PTR
w. - for WORD PTR

Variables
Variable is a memory location. For a programmer it is much easier to have some value be kept in a
variable named "var1" then at the address 5A73:235B, especially when you have 10 or more
variables.
Our compiler supports two types of variables: BYTE and WORD.
Syntax for a variable declaration:
name DB value
name DW value

DB - stays for Define Byte.

DW - stays for Define Word.

name - can be any letter or digit combination, though it should start with a letter. It's possible to
declare unnamed variables by not specifying the name (this variable will have an address but no
name).
value - can be any numeric value in any supported numbering system (hexadecimal, binary, or
decimal), or "?" symbol for variables that are not initialized.

6. 8086 INSTRUCTION SET

6.1 Data Transfer Instructions

MOV – MOV Destination, Source: The MOV instruction copies a word or byte of data from a
specified source to a specified destination. The destination can be a register or a memory location.
The source can be a register, a memory location or an immediate number. The source and
destination cannot both be memory locations. They must both be of the same type (bytes or words).
MOV instruction does not affect any flag.
• MOV CX, 037AH Put immediate number 037AH to CX
• MOV BL, [437AH] Copy byte in DS at offset 437AH to BL
• MOV AX, BX Copy content of register BX to AX
• MOV DL, [BX] Copy byte from memory at [BX] to DL
• MOV DS, BX Copy word from BX to DS register
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XCHG – XCHG Destination, Source: The XCHG instruction exchanges the content of a register
with the content of another register or with the content of memory location(s). It cannot directly
exchange the content of two memory locations. The source and destination must both be of the
same type (bytes or words). The segment registers cannot be used in this instruction. This
instruction does not affect any flag.
• XCHG AX, DX Exchange word in AX with word in DX
• XCHG BL, CH Exchange byte in BL with byte in CH

6.2 Arithmetic Instructions

ADD – ADD Destination, Source / ADC – ADC Destination, Source
These instructions add a number from some source to a number in some destination and put the
result in the specified destination. The ADC also adds the status of the carry flag to the result. The
source may be an immediate number, a register, or a memory location. The destination may be a
register or a memory location. The source and the destination in an instruction cannot both be
memory locations. Flags affected: AF, CF, OF, SF, ZF.
➢ ADD AL, 74H Add immediate number 74H to content of AL. Result in AL
➢ ADC CL, BL Add content of BL plus carry status to content of CL
➢ ADD DX, BX Add content of BX to content of DX
➢ ADD DX, [SI] Add word from memory at offset [SI] in DS to content of DX

SUB – SUB Destination, Source / SBB – SBB Destination, Source

These instructions subtract the number in some source from the number in some destination and
put the result in the destination. The SBB instruction also subtracts the content of carry flag from
the destination. The source may be an immediate number, a register or memory location. The
destination can also be a register or a memory location. However, the source and the destination
cannot both be memory location. Flags affected: AF, CF, OF, PF, SF, ZF.
➢ SUB CX, BX CX – BX; result in CX
➢ SBB CH, AL Subtract content of AL and content of CF from content of CH.
Result in CH
➢ SUB AX, 3427H Subtract immediate number 3427H from AX
➢ SBB BX, [3427H] Subtract word at displacement 3427H in DS and content of
CF from BX

MUL – MUL Source: This instruction multiplies an unsigned byte in some source with an
unsigned byte in AL register or an unsigned word in some source with an unsigned word in AX
register. The source can be a register or a memory location. When a byte is multiplied by the
content of AL, the result (product) is put in AX. When a word is multiplied by the content of AX,
the result is put in DX and AX registers. If the most significant byte of a 16-bit result or the most
significant word of a 32-bit result is 0, CF and OF will both be 0’s. AF, PF, SF and ZF are
undefined after a MUL instruction.
when operand is a byte: AX = AL * operand.
when operand is a word: (DX AX) = AX * operand.
➢ MUL BH Multiply AL with BH; result in AX

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➢ MUL CX Multiply AX with CX; result high word in DX, low word in
AX
➢ MUL BYTE PTR [BX] Multiply AL with byte in DS pointed to by [BX]

DIV – DIV Source: This instruction is used to divide an unsigned word by a byte or to divide an
unsigned double word (32 bits) by a word. When a word is divided by a byte, the word must be in
the AX register. The divisor can be in a register or a memory location. After the division, AL will
contain the 8-bit quotient, and AH will contain the 8-bit remainder. When a double word is divided
by a word, the most significant word of the double word must be in DX, and the least significant
word of the double word must be in AX. After the division, AX will contain the 16-bit quotient and
DX will contain the 16-bit remainder. If an attempt is made to divide by 0 or if the quotient is too
large to fit in the destination (greater than FFH / FFFFH), the 8086 will generate a type 0 interrupt.
All flags are undefined after a DIV instruction.
If we want to divide a byte by a byte, we must first put the dividend byte in AL and fill AH with all
0’s. Likewise, if we want to divide a word by another word, then put the dividend word in AX and
fill DX with all 0’s.
when operand is a byte:
AL = AX / operand
AH = remainder (modulus). .
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus).

➢ DIV BL Divide word in AX by byte in BL; Quotient in AL, remainder in AH

➢ DIV CX Divide down word in DX and AX by word in CX; Quotient in AX,
and remainder in DX.

INC – INC Destination: The INC instruction adds 1 to a specified register or to a memory
location. AF, OF, PF, SF, and ZF are updated, but CF is not affected. This means that if an 8-bit
destination containing FFH or a 16-bit destination containing FFFFH is incremented, the result will
be all 0’s with no carry.
➢ INC BL Add 1 to contains of BL register
➢ INC CX Add 1 to contains of CX register
➢ INC BYTE PTR [BX] Increment byte in data segment at offset contained in BX.
➢ INC WORD PTR [BX] Increment the word at offset of [BX] and [BX + 1]
in the data segment.

DEC – DEC Destination: This instruction subtracts 1 from the destination word or byte. The
destination can be a register or a memory location. AF, OF, SF, PF, and ZF are updated, but CF is
not affected. This means that if an 8-bit destination containing 00H or a 16-bit destination
containing 0000H is decremented, the result will be FFH or FFFFH with no carry (borrow).
➢ DEC CL Subtract 1 from content of CL register
➢ DEC BP Subtract 1 from content of BP register
➢ DEC BYTE PTR [BX] Subtract 1 from byte at offset [BX] in DS.
➢ DEC WORD PTR [BP] Subtract 1 from a word at offset [BP] in SS.
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➢ DEC COUNT Subtract 1 from byte or word named COUNT in DS.

6.3 Logical Instructions

AND – AND Destination, Source: This instruction ANDs each bit in a source byte or word with
the same numbered bit in a destination byte or word. The result is put in the specified destination.
The content of the specified source is not changed.
The source can be an immediate number, the content of a register, or the content of a memory
location. The destination can be a register or a memory location. The source and the destination
cannot both be memory locations. CF and OF are both 0 after AND. PF, SF, and ZF are updated by
the AND instruction. AF is undefined. PF has meaning only for an 8-bit operand.
➢ AND CX, [SI] AND word in DS at offset [SI] with word in CX register;
Result in CX register
➢ AND BH, CL AND byte in CL with byte in BH; Result in BH
➢ AND BX, 00FFH 00FFH Masks upper byte, leaves lower byte unchanged.

OR – OR Destination, Source: This instruction ORs each bit in a source byte or word with the
same numbered bit in a destination byte or word. The result is put in the specified destination. The
content of the specified source is not changed.
The source can be an immediate number, the content of a register, or the content of a memory
location. The destination can be a register or a memory location. The source and destination cannot
both be memory locations. CF and OF are both 0 after OR. PF, SF, and ZF are updated by the OR
instruction. AF is undefined. PF has meaning only for an 8-bit operand.
➢ OR AH, CL CL ORed with AH, result in AH, CL not changed
➢ OR BP, SI SI ORed with BP, result in BP, SI not changed
➢ OR SI, BP BP ORed with SI, result in SI, BP not changed
➢ OR BL, 80H BL ORed with immediate number 80H; sets MSB of BL to 1
➢ OR CX, TABLE [SI] CX ORed with word from effective address TABLE [SI];
Content of memory is not changed.

XOR – XOR Destination, Source: This instruction Exclusive-ORs each bit in a source byte or
word with the same numbered bit in a destination byte or word. The result is put in the specified
destination. The content of the specified source is not changed.
The source can be an immediate number, the content of a register, or the content of a memory
location. The destination can be a register or a memory location. The source and destination cannot
both be memory locations. CF and OF are both 0 after XOR. PF, SF, and ZF are updated. PF has
meaning only for an 8-bit operand. AF is undefined.
➢ XOR CL, BH Byte in BH exclusive-ORed with byte in CL.
Result in CL. BH not changed.
➢ XOR BP, DI Word in DI exclusive-ORed with word in BP.
Result in BP. DI not changed.

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NOT – NOT Destination: The NOT instruction inverts each bit (forms the 1’s complement) of a
byte or word in the specified destination. The destination can be a register or a memory location.
This instruction does not affect any flag.
➢ NOT BX Complement content or BX register
➢ NOT BYTE PTR [BX] Complement memory byte at offset [BX] in data segment.

NEG – NEG Destination: This instruction replaces the number in a destination with its 2’s
complement. The destination can be a register or a memory location. It gives the same result as the
invert each bit and add one algorithm.
➢ NEG AL Replace number in AL with its 2’s complement
➢ NEG BX Replace number in BX with its 2’s complement
➢ NEG BYTE PTR [BX] Replace byte at offset BX in DX with its 2’s complement
➢ NEG WORD PTR [BP] Replace word at offset BP in SS with its 2’s complement

CMP – CMP Destination, Source: This instruction compares a byte / word in the specified source
with a byte / word in the specified destination. The source can be an immediate number, a register,
or a memory location. The destination can be a register or a memory location. However, the source
and the destination both cannot be memory locations. The comparison is actually done by
subtracting the source byte or word from the destination byte or word. The source and the
destination are not changed, but the flags are set to indicate the results of the comparison. SF, ZF,
and CF are updated by the CMP instruction. For the instruction CMP CX, BX, the values of CF,
ZF, and SF will be as follows:
CF ZF SF
CX = BX 0 1 0 Result of subtraction is 0
CX > BX 0 0 0 No borrow required, so CF = 0
CX < BX 1 0 1 Subtraction requires borrow, so CF = 1
➢ CMP AL, 01H Compare immediate number 01H with byte in AL
➢ CMP BH, CL Compare byte in CL with byte in BH
➢ CMP CX, TEMP Compare word in DS at displacement TEMP with word at CX

TEST – TEST Destination, Source: This instruction ANDs the byte / word in the specified source
with the byte / word in the specified destination. Flags are updated, but neither operand is changed.
The test instruction is often used to set flags before a Conditional jump instruction.
The source can be an immediate number, the content of a register, or the content of a memory
location. The destination can be a register or a memory location. The source and the destination
cannot both be memory locations. CF and OF are both 0’s after TEST. PF, SF and ZF will be
updated to show the results of the destination. AF is be undefined.
➢ TEST AL, BH AND BH with AL. No result stored; Update PF, SF, ZF.
➢ TEST CX, 0001H AND CX with immediate number 0001H;
No result stored; Update PF, SF, ZF
➢ TEST BP, [BX][DI] AND word are offset [BX][DI] in DS with word in BP.
No result stored. Update PF, SF, and ZF

6.4 Transfer-Of-Control Instructions

Note: The following rules apply to the discussions presented in this topic.

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• The terms above and below are used when referring to the magnitude of unsigned numbers.
For example, the number 00000111 (7) is above the number 00000010 (2), whereas the
number 00000100 (4) is below the number 00001110 (14).
• The terms greater and less are used to refer to the relationship of two signed numbers.
Greater means more positive. The number 00000111 (+7) is greater than the number
11111110 (-2), whereas the number 11111100 (-4) is less than the number 11110100 (-6).
• In the case of Conditional jump instructions, the destination address must be in the range of
–128 bytes to +127 bytes from the address of the next instruction
• These instructions do not affect any flags.

JMP (UNCONDITIONAL JUMP TO SPECIFIED DESTINATION):

This instruction will fetch the next instruction from the location specified in the instruction rather
than from the next location after the JMP instruction. If the destination is in the same code segment
as the JMP instruction, then only the instruction pointer will be changed to get the destination
location. This is referred to as a near jump. If the destination for the jump instruction is in a
segment with a name different from that of the segment containing the JMP instruction, then both
the instruction pointer and the code segment register content will be changed to get the destination
location. This referred to as a far jump. The JMP instruction does not affect any flag.

➢ JMP CONTINUE
This instruction fetches the next instruction from address at label CONTINUE. If the label is in the
same segment, an offset coded as part of the instruction will be added to the instruction pointer to
produce the new fetch address. If the label is another segment, then IP and CS will be replaced with
value coded in part of the instruction. This type of jump is referred to as direct because the
displacement of the destination or the destination itself is specified directly in the instruction.

➢ JMP BX
This instruction replaces the content of IP with the content of BX. BX must first be loaded with the
offset of the destination instruction in CS. This is a near jump. It is also referred to as an indirect
jump because the new value of IP comes from a register rather than from the instruction itself, as in
a direct jump.

➢ JMP WORD PTR [BX]

This instruction replaces IP with word from a memory location pointed to by BX in DX. This is an
indirect near jump.

JA / JNBE (JUMP IF ABOVE / JUMP IF NOT BELOW OR EQUAL):

If, after a compare or some other instructions which affect flags, the zero flag and the carry flag
both are 0, this instruction will cause execution to jump to a label given in the instruction. If CF and
ZF are not both 0, the instruction will have no effect on program execution.
➢ CMP AX, 4371H Compare by subtracting 4371H from AX
JA NEXT Jump to label NEXT if AX above 4371H

➢ CMP AX, 4371H Compare (AX – 4371H)

JNBE NEXT Jump to label NEXT if AX not below or equal to 4371H

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JAE / JNB / JNC (JUMP IF ABOVE OR EQUAL / JUMP IF NOT BELOW / JUMP IF NO
CARRY):
If, after a compare or some other instructions which affect flags, the carry flag is 0, this instruction
will cause execution to jump to a label given in the instruction. If CF is 1, the instruction will have
no effect on program execution.
➢ CMP AX, 4371H Compare (AX – 4371H)
JAE NEXT Jump to label NEXT if AX above 4371H

➢ CMP AX, 4371H Compare (AX – 4371H)

JNB NEXT Jump to label NEXT if AX not below 4371H

➢ ADD AL, BL Add two bytes

JNC NEXT If the result within acceptable range, continue

JB / JC / JNAE (JUMP IF BELOW / JUMP IF CARRY / JUMP IF NOT ABOVE OR

EQUAL)
If, after a compare or some other instructions which affect flags, the carry flag is a 1, this
instruction will cause execution to jump to a label given in the instruction. If CF is 0, the instruction
will have no effect on program execution.
➢ CMP AX, 4371H Compare (AX – 4371H)
JB NEXT Jump to label NEXT if AX below 4371H

➢ ADD BX, CX Add two words

JC NEXT Jump to label NEXT if CF = 1

➢ CMP AX, 4371H Compare (AX – 4371H)

JNAE NEXT Jump to label NEXT if AX not above or equal to 4371H

JBE / JNA (JUMP IF BELOW OR EQUAL / JUMP IF NOT ABOVE)

If, after a compare or some other instructions which affect flags, either the zero flag or the carry
flag is 1, this instruction will cause execution to jump to a label given in the instruction. If CF and
ZF are both 0, the instruction will have no effect on program execution.
➢ CMP AX, 4371H Compare (AX – 4371H)
JBE NEXT Jump to label NEXT if AX is below or equal to 4371H

➢ CMP AX, 4371H Compare (AX – 4371H)

JNA NEXT Jump to label NEXT if AX not above 4371H

JE / JZ (JUMP IF EQUAL / JUMP IF ZERO):

This instruction is usually used after a Compare instruction. If the zero flag is set, then this
instruction will cause a jump to the label given in the instruction.
➢ CMP BX, DX Compare (BX-DX)
JE DONE Jump to DONE if BX = DX

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➢ IN AL, 30H Read data from port 8FH
SUB AL, 30H Subtract the minimum value.
JZ START Jump to label START if the result of subtraction is 0

JNE / JNZ (JUMP NOT EQUAL / JUMP IF NOT ZERO)

This instruction is usually used after a Compare instruction. If the zero flag is 0, then this
instruction will cause a jump to the label given in the instruction.
➢ IN AL, 0F8H Read data value from port
CMP AL, 72 Compare (AL –72)
JNE NEXT Jump to label NEXT if AL ≠ 72
➢ ADD AX, 0002H Add count factor 0002H to AX
DEC BX Decrement BX
JNZ NEXT Jump to label NEXT if BX ≠ 0

JO (JUMP IF OVERFLOW)
The overflow flag will be set if the magnitude of the result produced by some signed arithmetic
operation is too large to fit in the destination register or memory location. The JO instruction will
cause a jump to the destination given in the instruction, if the overflow flag is set.

➢ ADD AL, BL Add signed bytes in AL and BL

JO ERROR Jump to label ERROR if overflow from add

JNO (JUMP IF NO OVERFLOW)

The overflow flag will be set if some signed arithmetic operation is too large to fit in the destination
register or memory location. The JNO instruction will cause a jump to the destination given in the
instruction, if the overflow flag is not set.
➢ ADD AL, BL Add signed byte in AL and BL
JNO DONE Process DONE if no overflow

LOOP (JUMP TO SPECIFIED LABEL IF CX ≠ 0 AFTER AUTO DECREMENT)

This instruction is used to repeat a series of instructions some number of times. The number of
times the instruction sequence is to be repeated is loaded into CX. Each time the LOOP instruction
executes, CX is automatically decremented by 1. If CX is not 0, execution will jump to a
destination specified by a label in the instruction. If CX = 0 after the auto decrement, execution will
simply go on to the next instruction after LOOP. The destination address for the jump must be in
the range of –128 bytes to +127 bytes from the address of the instruction after the LOOP
instruction. This instruction does not affect any flag.

➢ MOV BX, OFFSET PRICES Point BX at first element in array

MOV CX, 40 Load CX with number of elements in array
NEXT: MOV AL, [BX] Get element from array
INC AL Increment the content of AL
MOV [BX], AL Put result back in array
INC BX Increment BX to point to next location
LOOP NEXT Repeat until all elements adjusted

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CALL (CALL A PROCEDURE)

The CALL instruction is used to transfer execution to a subprogram or a procedure. There two basic
type of calls near and far.

1. A near call is a call to a procedure, which is in the same code segment as the CALL instruction.
When the 8086 executes a near CALL instruction, it decrements the stack pointer by 2 and copies
the offset of the next instruction after the CALL into the stack. This offset saved in the stack is
referred to as the return address, because this is the address that execution will return to after the
procedure is executed. A near CALL instruction will also load the instruction pointer with the offset
of the first instruction in the procedure. A RET instruction at the end of the procedure will return
execution to the offset saved on the stack which is copied back to IP.

2. A far call is a call to a procedure, which is in a different segment from the one that contains the
CALL instruction. When the 8086 executes a far call, it decrements the stack pointer by 2 and
copies the content of the CS register to the stack. It then decrements the stack pointer by 2 again
and copies the offset of the instruction after the CALL instruction to the stack. Finally, it loads CS
with the segment base of the segment that contains the procedure, and loads IP with the offset of
the first instruction of the procedure in that segment. A RET instruction at the end of the procedure
will return execution to the next instruction after the CALL by restoring the saved values of CS and
IP from the stack.

➢ CALL MULT
This is a direct within segment (near or intra segment) call. MULT is the name of the procedure.
The assembler determines the displacement of MULT from the instruction after the CALL and
codes this displacement in as part of the instruction.

➢ CALL BX
This is an indirect within-segment (near or intra-segment) call. BX contains the offset of the first
instruction of the procedure. It replaces content of IP with content of register BX.

➢ CALL WORD PTR [BX]

This is an indirect within-segment (near or intra-segment) call. Offset of the first instruction of the
procedure is in two memory addresses in DS. Replaces content of IP with content of word memory
location in DS pointed to by BX.

➢ CALL DIVIDE
This is a direct call to another segment (far or inter-segment call). DIVIDE is the name of the
procedure. The procedure must be declared far with DIVIDE PROC FAR at its start. The assembler
will determine the code segment base for the segment that contains the procedure and the offset of
the start of the procedure. It will put these values in as part of the instruction code.

RET (RETURN EXECUTION FROM PROCEDURE TO CALLING PROGRAM)

Prepared by: Yohannes Bekuma 1 Wollega university, Nekemte

 COMPUTER ARCHITECTURE AND ORGANIZATION (ECEG 3143)
The RET instruction will return execution from a procedure to the next instruction after the CALL
instruction which was used to call the procedure. If the procedure is near procedure (in the same
code segment as the CALL instruction), then the return will be done by replacing the IP with a
word from the top of the stack. The word from the top of the stack is the offset of the next
instruction after the CALL. This offset was pushed into the stack as part of the operation of the
CALL instruction. The stack pointer will be incremented by 2 after the return address is popped off
the stack.
If the procedure is a far procedure (in a code segment other than the one from which it is called),
then the instruction pointer will be replaced by the word at the top of the stack. This word is the
offset part of the return address put there by the CALL instruction. The stack pointer will then be
incremented by 2. The CS register is then replaced with a word from the new top of the stack. This
word is the segment base part of the return address that was pushed onto the stack by a far call
operation. After this, the stack pointer is again incremented by 2.
A RET instruction can be followed by a number, for example, RET 6. In this case, the stack pointer
will be incremented by an additional six addresses after the IP when the IP and CS are popped off
the stack. This form is used to increment the stack pointer over parameters passed to the procedure
on the stack. The RET instruction does not affect any flag.

7. 8086 PROGRAMMING

Sample program:
.code ; indicate start of code segment
.startup ; indicate start of program
mov AX, 0
mov BX, 0000H
mov CX, 0
mov SI, AX
mov DI, AX
mov BP, AX
END ; end of file
The flow of the program is usually top-down and instructions are executed one by one!!!
• In general, an assembly program must include the code segment!!
• Other segments, such as stack segment, data segment are not compulsory
• There are key words to indicate the beginning of a segment as well as the end of a segment. Just
like using main(){} in C++ Programming
• Example
DSEG segment ‘data’ ; define the start of a data segment

DSEG ENDS ; defines the end of a data segment

• Segment is the keyword DSEG is the name of the segment similarly key words are used to define
the beginning of a program, as well as the end.

Assembler Directives of the 8086 Microprocessor

1. The DB directive
2. The DW directive
3. The DD directive

Prepared by: Yohannes Bekuma 1 Wollega university, Nekemte

 COMPUTER ARCHITECTURE AND ORGANIZATION (ECEG 3143)
4. SEGMENT
5. PROC
6. NAME
7. OFFSET

Data declaration directives:

(1) DB - The DB directive is used to declare a BYTE -2-BYTE variable - A BYTE is made up of 8
bits.
Declaration examples:
Byte1 DB 10h
Byte2 DB 255 ; 0FFh, the max. possible for a BYTE
CRLF DB 0Dh, 0Ah, 24h ;Carriage Return, terminator BYTE

(2) DW - The DW directive is used to declare a WORD type variable - A WORD occupies 16 bits
or (2 BYTE).
Declaration examples:
Word DW 1234h
Word2 DW 65535; 0FFFFh, (the max. possible for a WORD)

(3) DD - The DD directive is used to declare a DWORD - A DWORD double word is made up of
32 bits =2 Word's or 4 BYTE.
Declaration examples:
Dword1 DW 12345678h
Dword2 DW 4294967295 ;0FFFFFFFFh.

(4) SEGMENT:
It is used to indicate the start of a logical segment. It is the name given to the the segment.
Example: the code segment is used to indicate to the assembler the start of logical segment.

(5) PROC: (PROCEDURE)

It is used to identify the start of a procedure. It follows a name we give the procedure.
After the procedure the term NEAR and FAR is used to specify the procedure Example: SMART-
DIVIDE PROC FAR identifies the start of procedure named SMART-DIVIDE and tells the
assembler that the procedure is far.

(6) NAME:
It is used to give a specific name to each assembly module when program consists of several
modules.
Example: PC-BOARD used to name an assembly module which contains the instructions for
controlling a printed circuit board.

(7) OFFSET:
It is an operator which tells the assembler to determine the offset or displacement of a named data
item from the start of the segment which contains it. It is used to load the offset of a variable into a

Prepared by: Yohannes Bekuma 1 Wollega university, Nekemte

 COMPUTER ARCHITECTURE AND ORGANIZATION (ECEG 3143)
register so that variable can be accessed with one of the addressed modes. Example: when the
assembler read MOV BX.OFFSET PRICES, it will determine the offset of the prices.

Prepared by: Yohannes Bekuma 1 Wollega university, Nekemte