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Stack Organization in Computer Architecture

The document discusses stack organization in computer architecture. It describes a stack as a LIFO data structure where the most recently added item is the first retrieved. A stack uses two main operations - push to add an item and pop to remove an item. Stacks can be implemented using registers or memory. Register stacks use registers placed on top of each other, with a stack pointer tracking the top address. Memory stacks allocate memory chunks for the stack. The document also discusses using stacks to evaluate postfix expressions, advantages like rapid calculations, and disadvantages like increased program size and slower memory access times.

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Dhruv Rastogi
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0% found this document useful (0 votes)
586 views

Stack Organization in Computer Architecture

The document discusses stack organization in computer architecture. It describes a stack as a LIFO data structure where the most recently added item is the first retrieved. A stack uses two main operations - push to add an item and pop to remove an item. Stacks can be implemented using registers or memory. Register stacks use registers placed on top of each other, with a stack pointer tracking the top address. Memory stacks allocate memory chunks for the stack. The document also discusses using stacks to evaluate postfix expressions, advantages like rapid calculations, and disadvantages like increased program size and slower memory access times.

Uploaded by

Dhruv Rastogi
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Stack Organization in Computer Architecture

Introduction
A stack is a data storage structure in which the most recent thing deposited is the most recent item
retrieved. It is based on the LIFO concept (Last-in-first-out). The stack is a collection of memory
locations containing a register that stores the top-of-element address in digital computers.
Stack's operations are:
 Push: Adds an item to the top of the stack.
 Pop: Removes one item from the stack's top.
Implementation of Stack
The stack can be implemented using two ways:
 Register Stack
 Memory Stack
Register Stack
A stack of memory words or registers may be placed on top of each other. Consider a 64-word
register stack like the one shown in the diagram. A binary number, which is the address of the
element at the top of the stack, is stored in the stack pointer register. The stack has the three
elements A, B, and C.
The stack pointer holds C's address, which is 3. C is at the top of the stack. The top element is
removed from the stack by reading the memory word at address 3 and decreasing the stack pointer
by one. As a result, B is at the top of the stack, and the SP is aware of B's address, which is 2. It
may add a new word to the stack by increasing the stack pointer and inserting a word in the newly
increased location.

Because 26 = 64 and the SP cannot exceed 63, the stack pointer has 6 bits (111111 in binary).
After all, if you multiply 63 by 1, the outcome is 0(111111 + 1 = 1000000). Only the six least
important bits are stored in SP. The result of decrementing 000000 by one is 111111.

As a result, the one-bit register 'FULL' is set to 1 when the stack is full. The binary information
constructed into or readout of the stack is stored in the data register DR.
First, the SP is set to 0, the EMTY to 1, and the FULL to 0. The push operation is used to insert a
new piece because the stack is not yet full (FULL = 0).
SP←SP + 1 // increments the stack pointer
K[SP] ← DR // writes the element on the top of the stack
If (SP = 0) then (FULL ← 1) // to check if the stack is full
EMTY ← 0 // to mark that stack is not empty

The stack pointer is raised by one, and the location of the next higher word is stored in the stack
pointer. The memory write operation is used to place the word from DR onto the stack. The first
and last elements are kept at addresses 1 and 0, respectively. When the stack pointer reaches 0, the
stack is full, and the value of 'FULL' is set to 1. When the SP was at location 63, the last element
was stored at address 0 after incrementing the SP. There are no more empty registers on the stack
when an element is stored at address 0. The 'EMTY' is set to 0 since the stack is full.

If the stack is not empty (if EMTY = 0), a new element is added. The pop operation consists of the
following micro-operations:
DR←K[SP] // to read an element from the top of the stack
SP ← SP - 1 // to decrement the stack pointer
If (SP = 0) then (EMTY ← 1) // to check if the stack is empty
FULL ← 0 // to mark that stack is not full

As the top element from the stack is read and moved to DR, the stack pointer is decremented.
When the stack pointer approaches 0, 'EMTY' is set to 1, and the stack is empty. This is where the
element in location 1 is read out, and the SP is decremented by one.
Memory Stack
A stack may be implemented in a computer's random access memory (RAM). A stack is
implemented in the CPU by allocating a chunk of memory to a stack operation and utilizing a
processor register as a stack pointer. The stack pointer is a CPU register that specifies the stack's
initial memory address.
Reverse Polish Notation In Stack
The reverse polish notation in the stack is also known as postfix expression. Here, we use stack to
solve the postfix expression.
From the postfix expression, when some operand is found, we push it into the stack, and when
some operator is found, we pop elements from the stack, and after that, the operation is performed
in the correct sequence, and the result is also stored in the stack.
For example, we are given this expression in the form of an array,
["18", "5", "*", "6", "/"]

From the given array we can deduce expression as,


((18 * 5) / 6) = 15
Approach
1. We will access all the elements of the array one by one. While accessing all the elements, we will
check if the current element is matching with the special character ('+', '*', '/', '-').
2. If the element does not match with any of the given special characters, then we will push that
element into the stack.
3. After that, if any element is matched with the special character, we will pop the first two elements
from the stack and we will perform the action and then push the result obtained by the operation into
the stack again.
4. We will perform steps 1, 2, 3 for every array element.
5. In the end, we will pop the final result from the stack and will print the result.
Advantages of Stack Organization
 Complex arithmetic statements may be rapidly calculated.
 Instruction execution is rapid because operand data is stored in consecutive memory areas.
 The instructions are minimal since they don't contain an address field.
Disadvantages of Stack Organization
 The size of the program increases when we use a stack.
 It's in memory, and memory is slower in several ways than CPU registers. It generally has a lesser
bandwidth and a longer latency. Memory accesses are more difficult to accelerate.

What is Implementation of Simple Stack Allocation Scheme


Stack Allocation scheme is the simplest Run-Time Storage Management Technique. The storage
is allocated sequentially in the stack beginning at one end. Storage should be freed in the reverse
order of allocation so that a block of storage being released is always at the top of the stack.
A program consists of data and procedures. On execution of each procedure, some amount of
memory is occupied, which has information regarding the procedure, i.e., its actual parameters,
number of arguments, return address, return values & local data, etc. That part of memory is
the Activation Record of that procedure.
Activation Record
An Activation Record is a data structure that is activated/ created when a procedure/function is
invoked, and it contains the following information about the function.
Activation Record in 'C' language consist of

 Actual Parameters
 Number of Arguments
 Return Address
 Return Value
 Old Stack Pointer (SP)
 Local Data in a function or procedure
Here, Old SP stores the value of stack pointer of Activation Record of procedure which has called
this procedure which leads to the generation of this Activation Record, i.e., It is a pointer to the
activation record of the caller.
Two pointers are required for Stack Allocation Scheme −
 top− It points to the top of the stack. top points to the top of the top activation record. In
the figure, the top pointer will point to the top of the C Activation Record.
 Stack Pointer (SP)− It points to the activation record of the currently active procedure.
Actual Parameter− It is used by the calling procedure to supply parameters to the called
procedure.
Return value− This field is used by the called procedure to return a value to the calling procedure.
The size of each of the above fields is determined at the time when the procedure is called. The
size of almost all the fields can be determined at compilation time.
Stack Allocation of Procedure Calls
It can analysis on how the memory is allocated at runtime when a procedure is called & when the
value from the procedure is returned.
Consider a procedure P(x1, x2, x3 … … xn).Three address code statement for the call of this
procedure will be
param x1
param x2
…………….
param xn
call P, n
where 𝐜𝐚𝐥𝐥 𝐏, 𝐧 → calls the procedure P with n number of arguments.
𝐏𝐚𝐫𝐚𝐦 𝐱 → refers to passing actual parameter x.
Execution of all the following statements related to the procedure will perform stack allocation at
runtime.

 𝐏𝐚𝐫𝐚𝐦 𝐱 ∶ Passing actual parameter x.


 𝐜𝐚𝐥𝐥 𝐏, 𝐧− calling procedure P with n arguments.
 𝐩𝐫𝐨𝐜𝐛𝐞𝐠𝐢𝐧− The first statement of procedure
 𝐫𝐞𝐭𝐮(𝐯𝐚𝐥𝐮𝐞)− When the value is returned.
 𝐞𝐧𝐝− Last statement of procedure.

Instruction Formats
Introduction
In computer organization, the computer's physical and logical structure is described in reference
manuals provided with the system. These manuals explain the internal designing of the CPU,
including the processor’s registers available and their logical capabilities. Each task performed by
the computer needs a program. A computer program is a set of instructions that directs the
computer to perform a specific task. A computer program can contain multiple statements. The
instruction length is generally multiples of character length (8 bits).
This blog will discuss different instruction modes in computer organization in detail.
Before moving forward, let us recall and discuss some important concepts related to instructions:
1. Instruction includes a set of operational codes, operands, opcode, and addressing mode.

2. Instruction length is the most fundamental issue of the format design. The longer the instruction, the
longer will be the time taken to fetch the instruction.

3. The number of bits is directly proportional to the memory range. i.e., the larger the range
requirement, the more number bits will be required.

4. If a system supports the virtual memory, then the memory range that needs to be addressed by the
instruction will be larger than the physical memory.

5. Instruction length should be equal to or the multiple of data bus length.

Working of the CPU


You must be aware that the CPU cannot directly execute the program written in a high-level
language. Therefore, all the programs are first compiled to binary format. The compiler converts
the high-level program into its equivalent low-level instruction containing 0 and 1. These
instructions are machine instructions in computer organization that the processor can directly
execute.
The operating system loads the machine instructions into the RAM. The CPU starts the execution
by fetching these instructions one by one. These fetched instructions are stored in the instruction
registers. In machine instructions, the bits are grouped based on instruction format. Each bit gives
specific information to the CPU to decode. Information required by the CPU includes the address
of the data and the operation to be performed.
The instruction format is depicted in a rectangular box, symbolizing the instruction bits in memory
words or a control register. The bits grouped are divided into three parts:

1. Addressing Mode: The addressing mode indicates how the data is represented.
2. Opcode: The opcode part indicates the operation type on the data.
3. Operand: The operand part indicates either the data or the address of the data.
Instruction Format
The instruction formats are a sequence of bits (0 and 1). These bits, when grouped, are known as
fields. Each field of the machine provides specific information to the CPU related to the
operation and location of the data.
The instruction format also defines the layout of the bits for an instruction. It can be of variable
lengths with multiple numbers of addresses. These address fields in the instruction format vary
as per the organization of the registers in the CPU. The formats supported by the CPU depend
upon the Instructions Set Architecture implemented by the processor.
Depending on the multiple address fields, the instruction is categorized as follows:
1. Three address instruction
2. Two address instruction
3. One address instruction
4. Zero address instruction

The operations specified by a computer instruction are executed on data stored in memory or
processor registers. The operands residing in processor registers are specified with an address. The
registered address is a binary number of k bits that defines one of the 2k registers in the CPU. Thus,
a CPU with 16 processors registers R0 through R15 and will have a four-bit register address field.
Example: The binary number 0011 will designate register R3.

A computer can have instructions of different lengths containing varying numbers of addresses.
The number of address fields of a computer depends on the internal design of its registers. Most
of the computers fall into one of three types of CPU organizations:
1. Single accumulator organization.
2. General register organization.
3. Stack organization.
Single Accumulator Organization
All the operations on a system are performed with an implied accumulator register. The instruction
format in this type of computer uses one address field.
For example, the instruction for arithmetic addition is defined by an assembly language
instruction ‘ADD.’
Where X is the operand’s address, the ADD instruction results in the operation.
AC ← AC + M[X].
AC is the accumulator register, M[X] symbolizes the memory word located at address X.
General Register Organization
The general register type computers employ two or three address fields in their instruction
format. Each address field specifies a processor register or a memory. An instruction symbolized
by ADD R1, X specifies the operation R1 ← R + M [X].
This instruction has two address fields: register R1 and memory address X.
Stack Organization
A computer with a stack organization has PUSH and POP instructions that require an address
field. Hence, the instruction PUSH X pushes the word at address X to the top of the stack. The
stack pointer updates automatically. In stack-organized computers, the operation type
instructions don’t require an address field as the operation is performed on the two items on the
top of the stack.

Types of Instruction Formats


Zero Address Instruction
This instruction does not have an operand field, and the location of operands is implicitly
represented. The stack-organized computer system supports these instructions. To evaluate the
arithmetic expression, it is required to convert it into reverse polish notation.

Example: Consider the below operations, which shows how X = (A + B) ∗ (C + D) expression


will be written for a stack-organized computer.
TOS: Top of the Stack
PUSH A TOS ← A
PUSH B TOS ← B
ADD TOS ← (A + B)
PUSH C TOS ← C
PUSH D TOS ← D
ADD TOS ← (C + D)
MUL TOS ← (C + D) ∗ (A + B)
POP X M [X] ← TOS
One Address Instruction
This instruction uses an implied accumulator for data manipulation operations. An accumulator is
a register used by the CPU to perform logical operations. In one address instruction, the
accumulator is implied, and hence, it does not require an explicit reference. For multiplication and
division, there is a need for a second register. However, here we will neglect the second register
and assume that the accumulator contains the result of all the operations.

Example: The program to evaluate X = (A + B) ∗ (C + D) is as follows:


LOAD A AC ← M [A]
ADD B AC ← A [C] + M [B]
STORE T M [T] ← AC
LOAD C AC ← M [C]
ADD D AC ← AC + M [D]
MUL T AC ← AC ∗ M [T]
STORE X M [X] ← AC

All operations are done between the accumulator(AC) register and a memory operand.
M[ ] is any memory location.
M[T] addresses a temporary memory location for storing the intermediate result.
This instruction format has only one operand field. This address field uses two special instructions
to perform data transfer, namely:
 LOAD: This is used to transfer the data to the accumulator.
 STORE: This is used to move the data from the accumulator to the memory.
Two Address Instructions
This instruction is most commonly used in commercial computers. This address instruction format
has three operand fields. The two address fields can either be memory addresses or registers.

Example: The program to evaluate X = (A + B) ∗ (C + D) is as follows:


MOV R1, A R1 ← M [A]
ADD R1, B R1 ← R1 + M [B]
MOV R2, C R2 ← M [C]
ADD R2, D R2 ← R2 + M [D]
MUL R1, R2 R1 ← R1∗R2
MOV X, R1 M [X] ← R1

The MOV instruction transfers the operands to the memory from the processor registers. R1, R2
registers.
Three Address Instruction
The format of a three address instruction requires three operand fields. These three fields can be
either memory addresses or registers.

Example: The program in assembly language X = (A + B) ∗ (C + D) Consider the instructions


given below that explain each instruction's register transfer operation.
ADD R1, A, B R1 ← M [A] + M [B]
ADD R2, C, D R2 ← M [C] + M [D]
MUL X, R1, R2 M [X] ← R1 ∗ R2
Two processor registers, R1 and R2.
The symbol M [A] denotes the operand at memory address symbolized by A. The operand1 and
operand2 contain the data or address that the CPU will operate. Operand 3 contains the result’s
address.

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