6 - ES - 8051 MC - Programming
6 - ES - 8051 MC - Programming
(Embedded System)
• Addressing modes
• Instruction sets
• Interrupts
• Timer and Counter
• Serial Communication
2
Addressing Modes
3
Addressing Modes
Direct Mode
• The direct address of the operand is specified in the instruction itself.
• Lower 128 bytes of internal RAM and the SFRs used
• specify data by its 8-bit address
Usually for 30h-7Fh of RAM
4
Addressing Modes
Direct Mode
play with R0-R7 by direct address
MOV A,4 MOV A,R4
MOV A,7 MOV A,R7
MOV 7,2 MOV R7,R6
5
Addressing Modes
Register Indirect
• It uses any one of the registers R0-R7, of the register bank, as a pointer to the locations in the 256 bytes
of data memory block.
• It may point in the lower 128 bytes of the internal RAM, or the lower 256 bytes of the external data
memory.
• the address of the source or destination is specified in registers
Uses registers R0 or R1 for 8-bit address:
mov psw, #0 ; use register bank 0
mov r0, #0x3C
mov @r0, #3 ; memory at 3C gets #3 ; M[3C] 3
Uses DPTR register for 16-bit addresses:
mov dptr, #0x9000 ; dptr 9000h
movx a, @dptr ; a M[9000]
Note that 9000 is an address in external memory
SFRs are not addressed by this mode.
6
EXTERNAL ADDRESSING USING MOVX AND MOVC
7
Addressing Modes
Register Addressing
❑ Registers R0 through R7 from the selected register bank, accumulator, B-register, and
DPTR are used.
❑ Either source or destination is one of CPU register
❑ The LSB of the opcode indicates which register is used
MOV R0,A
MOV A,R7
ADD A,R4
ADD A,R7
MOV DPTR,#25F5H
MOV R5,DPL
MOV R,DPH
Note that MOV R4,R7 is incorrect
8
Addressing Modes
Immediate Mode
• It allows using immediate data as part of the instruction.
• specify data by its value
mov A, #0 ;put 0 in the accumulator
;A = 00000000
mov R4, #11h ;put 11hex in the R4 register
;R4 = 00010001
mov B, #11 ;put 11 decimal in b register
;B = 00001011
mov DPTR,#7521h ;put 7521 hex in DPTR
;DPTR = 0111010100100001
9
Addressing Modes
Base Register Plus Index Register Indirect Mode
• This mode allows a byte to be accessed from the program memory, whose address is calculated as the
sum of a base register (DPTR/ PC) and the index register (accumulator)
• MOVC A, @A+DPTR, it will fetch a byte from the program memory, whose address is calculated by
adding the original 8-bit unsigned contents of the accumulator and the 16-bit contents of the DPTR.
• Base address can be DPTR or PC
mov DPTR, #4000h
mov A, #5
movc A, @A + DPTR ;a M[4005]
• Base address can be DPTR or PC
ORG 1000h
1000 mov a, #5
1002 movc a, @a + PC ;a M[1008]
1003 Nop
• Table Lookup
• MOVC only can read internal code memory 10
The 8051 Instruction Set
➢ The following are the Instruction set of 8051
• Data Transfer Instruction
• Arithmetic Instructions
• Logical Instructions
• Boolean Variable Manipulation Instructions
• Control Transfer Instructions.
➢ 8051 has 111 instructions.
➢ Instructions are classified as single byte, two-byte and three-byte.
✓ 45 single byte
✓ 45 two-byte
✓ 17 three byte
11
Data Transfer Instructions
• There are MOV, MOVX, MOVC, PUSH, POP, and exchange XCG, XCH instructions.
• Data transfer instructions do not affect any of the PSW flags.
• Exchange instructions
XCH a, byte ;exchange accumulator and byte
XCHD a, byte ;exchange low nibbles of accumulator and byte
12
Data Transfer Instructions
• MOV dest, source ;dest source
• Stack instructions
PUSH direct ;increment stack pointer, ;move direct byte on stack
POP direct ;move direct byte from stack, ;decrement stack pointer
pop
push
stack pointer
stack
13
STACKS
• Stack-oriented data transfer
– Only one operand (direct addressing)
– SP is other operand – register indirect - implied
• Direct addressing mode must be used in Push and Pop
mov sp, #0x40 ; Initialize SP
push 0x55 ; SP SP+1, M[SP] M[55]
; M[41] M[55]
pop b ; b M[55]
Note: can only specify RAM or SFRs (direct mode) to push or pop. Therefore, to push/pop the
accumulator, must use acc, not a
14
15
Logical Instructions
• Bitwise logical AND, OR, Exclusive-OR is possible in 8051.
• These instructions accept two 8-bit operands and the result is stored at the destination.
• No flags are affected by ANL,OR, and XOR.
• There are single instructions like CLR, SETB, and CPL
• Rotate instructions RR, RRC,RL,RLC
• RLC instruction moves bit-7 of the accumulator into CY position.
• Swap instructions SWAP.
• SWAP A instruction simply interchanges the lower and higher nibbles of the accumulator and no flags are
affected.
16
Logical Instructions
17
Byte-level Logical Instructions
18
BYTE-LEVEL LOGICAL INSTRUCTIONS
19
BYTE-LEVEL LOGICAL INSTRUCTIONS
20
Byte level logical instructions
21
Bit Level Logical Instructions
22
Bit Level Logical Instructions
23
Bit addressable control registers
24
Bit addressable control registers
25
Bit addressable control registers
26
Bit addressable control registers
27
Bit addressable control registers
28
Rotate and swap operation
29
Rotate and swap operation
30
Rotate and swap operation
31
Arithmetic Instructions
• It is possible to carryout both signed
and unsigned addition by using the OV
flag.
• There are unsigned multiplication and
division operations directly supported
by the instructions
32
Incrementing and Decrementing
33
ADDITION
34
SUBTRACTION
35
MULTIPLICATION
36
DIVISION
37
Decimal Arithmetic
38
Jump and Call Opcodes
▪ Jumps and calls are the decision codes that alter the flow of the program by examining the results of action
codes and changing the contents of the program counter.
▪ A jump permanently changes the contents of the program counter if certain program conditions exist.
▪ A call temporarily changes the program counter to allow another part of the program to run.
▪ A jump or call instruction can replace the contents of the program counter with a new program address
number that causes program execution to begin at the code located at the new address.
▪ Jump or call has 3 ranges
▪ Short jump (SJMP):
✓ A short jump trnasfers control within 256 byte range, from -128 to +127 bytew raltive to the first byte
of the following instruction.
▪ Absolute jump (AJMP):
✓ AJMP allows 11-bit address to be specified in the instruction. The destination must be within 2K block
of the program memory from the next instruction followed by AJMP instruction.
▪ Long Jump (LJMP):
✓ LJMP, a 16 bit address is specified in the instruction and a jump to anywhere within 64 K block of
program memory is possible that is 0000H to FFFFH.
39
Jump and Call Opcodes
Relative Jump:
Jumps that replace the program counter content with a new address that is greater than
the address of the instruction following the jump by 127d or less than the address of the
instruction following the jump by 128d are called relative jump.
40
41
42
Program Flow Control
• Unconditional jumps (“go to”)
• Conditional jumps
• Call and return
43
Unconditional Jumps
• SJMP <rel addr> ; Short jump, relative address is 8-bit 2’s complement number, so jump can be
up to 127 locations forward, or 128 locations back.
• LJMP <address 16> ; Long jump
• AJMP <address 11> ; Absolute jump to anywhere within 2K block of program memory
• JMP @A + DPTR ; Long indexed jump
44
Unconditional Jumps
45
Unconditional Jumps
46
Infinite Loops
47
Re-locatable Code
Memory specific NOT Re-locatable (machine code)
org 8000h
Start: mov C, p1.6
mov p3.7, C
ljmp Start
end
Re-locatable (machine code)
org 8000h
Start: mov C, p1.6
mov p3.7, C
sjmp Start
end
48
Jump table
Mov dptr,#jump_table
Mov a,#index_number
Rl a
Jmp @a+dptr
...
Jump_table: ajmp case0
ajmp case1
ajmp case2
ajmp case3
49
Conditional Jumps
• These instructions cause a jump to occur only if a condition is true. Otherwise, program
execution continues with the next instruction.
loop: mov a, P1
Jz loop ; if a=0, goto loop, ; else goto next instruction
mov b, a
• There is no zero flag (z)
• Content of A checked for zero on time
50
Bit Jumps
51
Byte Jumps
52
Byte Jumps
53
Conditional Jumps
Mnemonic Description
JZ <rel addr> Jump if a = 0
JNZ <rel addr> Jump if a != 0
JC <rel addr> Jump if C = 1
JNC <rel addr> Jump if C != 1
JB <bit>, <rel addr> Jump if bit = 1
JNB <bit>,<rel addr> Jump if bit != 1
JBC <bir>, <rel addr> Jump if bit =1, &clear bit
CJNE A, direct, <rel addr> Compare A and memory, jump if not equal
Conditional Jumps
Mnemonic Description
CJNE A, #data <rel addr> Compare A and data, jump if not equal
CJNE Rn, #data <rel addr> Compare Rn and data, jump if not equal
CJNE @Rn, #data <rel addr> Compare Rn and memory, jump if not equal
DJNZ Rn, <rel addr> Decrement Rn and then jump if not zero
DJNZ direct, <rel addr> Decrement memory and then jump if not zero
Call and Return
56
Calls and Returns
57
Subroutines
59
Subroutine –example
; Program to compute square root of value on Port 3
; (bits 3-0) and output on Port 1.
org 0
ljmp Main
reset service
Main: mov P3, #0xFF ; Port 3 is an input
loop: mov a, P3
anl a, #0x0F ; Clear bits 7..4 of A
lcall sqrt
mov P1, a
sjmp loop main program
sqrt: inc a
movc a, @a + PC
ret
data
60
Interrupts and Returns
61
Problem
62
Applications of Microcontrollers
Simple Interfacing Examples
Seven segment Interfacing
Traffic light controller
Closed loop control system-Temperature control example
Recent Wonders
Recent Wonders contd ........
Recent Wonders contd ........
Books that have helped me to understand the
Microcontrollers & embedded systems
1. http://www.eg3.com
2. http://www.ARM.MCU.com
3. http://www.mcjournal.com
4. http://www.iar.com
5. http://http://www.embedded.com
6. http://www.powersoftsystems.com
Thank You
83