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S23 DLD Lab04

The document describes tasks for a lab on Boolean simplification, including: 1) Minimizing Boolean expressions and implementing them in Circuit Maker. 2) Proving De Morgan's theorems by creating truth tables and Circuit Maker implementations. 3) Verifying the distributive law using a truth table and Circuit Maker. 4) Creating truth tables to represent Boolean functions in Sum of Products and Product of Sums form. 5) Minimizing Boolean functions using Karnaugh maps.

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thomas edison
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116 views7 pages

S23 DLD Lab04

The document describes tasks for a lab on Boolean simplification, including: 1) Minimizing Boolean expressions and implementing them in Circuit Maker. 2) Proving De Morgan's theorems by creating truth tables and Circuit Maker implementations. 3) Verifying the distributive law using a truth table and Circuit Maker. 4) Creating truth tables to represent Boolean functions in Sum of Products and Product of Sums form. 5) Minimizing Boolean functions using Karnaugh maps.

Uploaded by

thomas edison
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Lab 04

Boolean Simplification, Min-Max Terms Representation, SOP


Topic
and POS, Karnaugh Maps, DeMorgan’s Theorems verification
 Circuit Maker 2000
Software
 logic.ly (Web Source)
 IC Type 7408 QUAD two input AND gate
 IC Type 7400 QUAD two input NAND gate
Component
 IC Type 7432 Two input OR gate
s
 IC Type 7402 QUAD two input NOR gate
 IC Type 7404 HEX one input NOT gate
 To understand working of gates
Objective
 To Validate the above implementation using Circuit Maker
Reg. # Section:

Name

DE Morgan’s Theorem
X . Y = X+ Y

X +Y =X . Y
Example Solution for Task 1 and Task 2

Task 1:
a) By using basic rules of Boolean Algebra, find the minimized Boolean expression of

Y (A , B ,C) =AB+ A (B+ C)+B (B+ C)

b) Create and fill the table for both expressions (given and minimized)

c) Implement both the expressions (given and minimized) in Circuit Maker with same
inputs (only three common inputs A, B and C) and verify your results

Task 2:
a) By using basic rules of Boolean Algebra, find the minimized Boolean expression of

Y (A , B ,C , D )=[ A B ( C +BD ) + A B ] C

a) Create and fill the table for both expressions (given and minimized).

b) Implement both the expressions (given and minimized) in Circuit Maker with same
inputs (only three common inputs A, B and C) and verify your results.
Task 3:
Prove that A . B= A+ B

a) Fill the Truth Table

INPUTS OUTPUTS

Ref # A B A.B A B A+ B

0
1
2
3

b) Implement the LHS and RHS of above expressions on Circuit Maker

Task 4:
Prove that A+ B= A . B

a) Fill the Truth Table

INPUTS OUTPUTS

Ref # A B A+ B A B A.B

0
1
2
3

b) Implement the LHS and RHS of above equation on Circuit Maker

Task 5:
Prove the distributive law A( B+C)=A . B+ A . C

a) Fill the Truth Table

Ref # INPUTS OUTPUTS


A B c B+C A (B + C) A. B A.C A . B+ A . C
0
1
2
3
4
5
6
7

b) Implement the LHS and RHS of above equation on Circuit Maker


Task 6:
Min-Max Terms Representation & K-Map

Fill the Truth Table

INPUTS Min Terms Max Terms

Ref
A B C Product Terms Sum Terms
#
0 0 0 0

1 0 0 1

2 0 1 0

3 0 1 1

4 1 0 0

5 1 0 1

6 1 1 0

7 1 1 1
0 1 3 2

0000 0001 0011 0010

4 5 7 6

0100 0101 0111 0110

12 13 15 14

1100 1101 1111 1110

8 9 11 10

1000 1001 1011 1010

Task 7:

INPUTS OUTPUTS
Ref
A B C F Y
#
0 0 0 0 0 1

1 0 0 1 1 0

2 0 1 0 1 1

3 0 1 1 0 0

4 1 0 0 1 1

5 1 0 1 0 0

6 1 1 0 1 0

7 1 1 1 0 1

a) Write down the standard form of SOP for output Function F( A , B , C)


b) Write down the standard form of POS for output Function F( A , B , C)
c) Write down the canonical form of SOP for output Function Y (A , B ,C)
d) Write down the canonical form of POS for output Function Y (A , B ,C)

Task 8:
Using truth table given in above task (Task 7),

a) For output Function F( A , B , C) ,write down the minimized form of SOP and POS using
K-Map grouping technique.
b) For output Function Y (A , B ,C) ,write down the minimized form of SOP and POS using
K-Map grouping technique.

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