TDF8546

I2C-bus controlled 4  45 W best efficiency amplifier

Rev. 8 — 27 September 2013 Product short data sheet

1. General description
The TDF8546 is one of a new generation of complementary quad Bridge-Tied Load (BTL)
audio power amplifiers intended for automotive applications. It has a best efficiency mode
with full I2C-bus controlled diagnostics, including start-up diagnostics. The TDF8546 can
operate at a battery voltage as low as 6 V making this amplifier suitable for stop/start-car
operation.

The new best efficiency principle uses a patented switch technique which reduces
switching distortion. To reduce power dissipation, the new best efficiency principle uses
the audio information on all four channels instead of only the front or rear signals.
Dissipation is more than 65 % less than standard BTL when used for front and rear
correlated audio signals. Dissipation is 35 % less than standard BTL when used for
uncorrelated (delayed) audio signals between front and rear. It is 17 % less for
uncorrelated audio signals when the front or rear information is used.

The amplifier uses a complementary DMOS output stage in a Silicon-On-Insulator (SOI)

based BCD process. The DMOS output stage ensures a high-power output signal with
perfect sound quality. The SOI-based BCD process ensures a robust amplifier, where
latch-up cannot occur, with good separation between the four independent channels, with
every component isolated and without substrate currents.

2. Features and benefits

 Stop/start-car prepared: keeps operating without audible disturbance during engine
start at a battery voltage as low as 6 V
 New best efficiency mode with patented low switching distortion
 Extreme best efficiency mode (uses information from 4 channels) with 17 % less
dissipation for uncorrelated signals compared to 2-channel best efficiency mode.
 Operates in either legacy (non-I2C-bus) or I2C-bus modes (3.3 V and 5 V compliant)
 Four hardware-programmable I2C-bus addresses
 Can drive 2  and 4  loads
 Speaker fault detection
 Start-up diagnostics with load detection: open, short, present; filtered for door-slam
and chatter relays
 AC load (tweeter) detection with low and high current mode
 Gain select after start-up without audible disturbance
 Independent selectable soft mute of front and rear channels
 Programmable gain (26 dB and 16 dB), independently programmable for the front and
rear channels
NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

 Line driver mode supports engine start at a battery voltage as low as 6 V (16 dB and
mid-tap voltage 0.25 VP)
 Programmable clip detect: 2 %, 5 % or 10 %
 Programmable thermal pre-warning
 Pin STB can be programmed/multiplexed with second-clip detect
 Clip information of each channel can be directed separately to pin DIAG or pin STB
 Independent enabling of thermal-, clip- or load fault information (short across the load
or to VP or to ground) on pin DIAG
 Loss-of-ground and open VP safe (minimum series resistance required)
 All amplifier outputs short-circuit proof to ground, supply voltage and across the load
(channel independent)
 All pins short-circuit proof to ground
 Temperature controlled gain reduction to prevent audio holes at high junction
temperatures
 Programmable low battery voltage detection to enable 7.5 V or 6 V minimum battery
voltage operation
 Overvoltage protection (load-dump safe up to VP = 50 V) with overvoltage pre-warning
at 16 V
 Offset detection

3. Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VP(oper) operating supply RL = 4  6 14.4 18 V
voltage
Iq quiescent current no load - 260 350 mA
no load; VP = 7 V - 190 - mA
Po output power RL = 4 ; VP = 14.4 V; maximum power; 37 40 - W
Vi = 2 V RMS square wave
RL = 4 ; VP = 15.2 V; maximum power; 41 45 - W
Vi = 2 V RMS square wave
RL = 4 ; VP = 14.4 V; THD = 0.5 % 18 20 - W
RL = 4 ; VP = 14.4 V; THD = 10 % 23 25 - W
RL = 2 ; VP = 14.4 V; THD = 10 % 40 44 - W
RL = 2 ; VP = 14.4 V; maximum power; 58 64 - W
Vi = 2 V RMS square wave
THD total harmonic Po = 1 W to 12 W; fi = 1 kHz; RL = 4 ; BTL mode - 0.01 0.1 %
distortion Po = 4 W; fi = 1 kHz; RL = 4 ; best efficiency mode - 0.03 - %
Vn(o) output noise voltage filter 20 Hz to 22 kHz; RS = 1 k
amplifier mode - 43 65 V
line driver mode - 25 33 V

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Product short data sheet Rev. 8 — 27 September 2013 2 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

4. Ordering information
Table 2. Ordering information
Type number Package
Name Description Version
TDF8546J DBS27P plastic DIL-bent-SIL (special bent) power package; SOT827-1
27 leads (lead length 6.8 mm)
TDF8546TH HSOP36 plastic, heatsink small outline package; 36 leads; low stand-off height SOT851-1
TDF8546JS DBSMS27P plastic dual bent surface mounted SIL power package; 27 leads SOT1154-1

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Product short data sheet Rev. 8 — 27 September 2013 3 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

5. Pinning information

5.1 Pinning

ADSEL 1
STB 2
PGND2 3
OUT2- 4
DIAG 5
OUT2+ 6
VP2 7
OUT1- 8
PGND1 9
OUT1+ 10
SVR 11
IN1 12
IN2 13
SGND 14 TDF8546J/JS
IN4 15
IN3 16
ACGND 17
OUT3+ 18
PGND3 19
OUT3- 20
VP1 21
OUT4+ 22
SCL 23
OUT4- 24
PGND4 25
SDA 26
TAB 27

aaa-005789

Fig 1. Pin configuration of TDF8546J/JS (packages DBS27P and DBSMS27P)

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Product short data sheet Rev. 8 — 27 September 2013 4 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

TAB 36 1 OUT3-
n.c. 35 2 OUT3+
n.c. 34 3 VP1
n.c. 33 4 OUT4-
PGND3 32 5 PGND4
n.c. 31 6 OUT4+
ACGND 30 7 SCL
IN3 29 8 SDA
IN4 28 9 DIAG
TDF8546TH
SGND 27 10 ADSEL
IN2 26 11 STB
IN1 25 12 n.c.
SVR 24 13 OUT2+
PGND1 23 14 PGND2
n.c. 22 15 OUT2-
n.c. 21 16 VP2
n.c. 20 17 OUT1+
n.c. 19 18 OUT1-

001aam684

Fig 2. Pin configuration TDF8546TH

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Product short data sheet Rev. 8 — 27 September 2013 5 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

5.2 Pin description

Table 3. Pin description
Symbol Pin Description
TDF8546J/JS TDF8546TH
ADSEL 1 10 I2C-bus address select
STB 2 11 Standby (I2C-bus mode) or mode pin (legacy mode)
programmable second clip indicator
PGND2 3 14 channel 2 power ground
OUT2 4 15 channel 2 negative output (right rear)
DIAG 5 9 diagnostic and clip detection output
OUT2+ 6 13 channel 2 positive output (right rear)
VP2 7 16 power supply voltage 2
OUT1 8 18 channel 1 negative output (right front)
PGND1 9 23 channel 1 power ground
OUT1+ 10 17 channel 1 positive output (right front)
SVR 11 24 half supply voltage filter capacitor
IN1 12 25 channel 1 input
IN2 13 26 channel 2 input
SGND 14 27 signal ground
IN4 15 28 channel 4 input
IN3 16 29 channel 3 input
ACGND 17 30 AC ground
OUT3+ 18 2 channel 3 positive output (left front)
PGND3 19 32 channel 3 power ground
OUT3 20 1 channel 3 negative output (left front)
VP1 21 3 power supply voltage 1
OUT4+ 22 6 channel 4 positive output (left rear)
SCL 23 7 I2C-bus clock input
OUT4 24 4 channel 4 negative output (left rear)
PGND4 25 5 channel 4 power ground
SDA 26 8 I2C-bus data input and output
TAB 27 36 heatsink connection; must be connected to ground
n.c. - 12, 19, 20, not connected
21, 22, 31,
33, 34, 35

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Product short data sheet Rev. 8 — 27 September 2013 6 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

6. Thermal characteristics
Table 4. Thermal characteristics
Symbol Parameter Conditions Typ Unit
DBS27/DBSMS27P
Rth(j-c) thermal resistance from junction to case 1 K/W
Rth(j-a) thermal resistance from junction to ambient 40 K/W
HSOP36
Rth(j-c) thermal resistance from junction to case 1 K/W
Rth(j-a) thermal resistance from junction to ambient 35 K/W

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Product short data sheet Rev. 8 — 27 September 2013 7 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

7. Characteristics
Table 5. Characteristics
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supply voltage behavior
VP(oper) operating supply voltage RL = 4  6 14.4 18 V
RL = 2  6 14.4 16 V
Iq quiescent current no load - 260 350 mA
no load; VP = 7 V - 190 - mA
Ioff off-state current VSTB = 0.4 V - 4 10 A
VO output voltage DC
amplifier on; high gain/low gain 6.6 7.1 7.6 V
mode
line driver mode; IB4[D2] = 0; 3.0 3.4 3.8 V
IB3[D5:D6] = 1
VP(low)(mute) low supply voltage mute rising supply voltage
IB4[D0] = 1 7.0 7.7 8.1 V
IB4[D0] = 0 5.4 5.7 6.2 V
falling supply voltage
IB4[D0] = 1 6.5 7.2 7.7 V
IB4[D0] = 0 5.2 5.5 5.9 V
VP(low)(mute) low supply voltage mute IB4[D0] = 1 0.1 0.5 0.8 V
hysteresis IB4[D0] = 0 0.1 0.3 0.7 V
VP(ovp)pwarn pre-warning overvoltage rising supply voltage 15.2 16 16.9 V
protection supply voltage falling supply voltage 14.4 15.2 16.2 V
hysteresis - 0.8 - V
Vth(ovp) overvoltage protection rising supply voltage 18 20 22 V
threshold voltage
VPOR power-on reset voltage falling supply voltage - 3.1 4.5 V
VO(offset) output offset voltage amplifier on 75 0 +75 mV
amplifier mute 25 0 +25 mV
line driver mode 45 0 +45 mV

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Product short data sheet Rev. 8 — 27 September 2013 8 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

Table 5. Characteristics …continued

Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Mode select and second clip detection: pin STB
VSTB voltage on pin STB off-by mode selected
I2C-bus mode - - 0.8 V
legacy mode (I2C-bus mode - - 0.8 V
off)
mute selected
legacy mode (I2C-bus mode 2.5 - 4.5 V
off)
operating mode selected
I2C-bus mode 2.5 - VP V
legacy mode (I2C-bus mode 5.9 - VP V
off)
low voltage on pin STB when [1]

pulled LOW during clipping; clip

detection on STB active
ISTB = 150 A 5.6 5.9 6.5 V
ISTB = 500 A 6.1 - 7.4 V
ISTB current on pin STB 0 V < VSTB < 8.5 V; clip detection [1] - 5 30 A
not active
Start-up/shut-down/mute timing
twake wake-up time time after wake-up via pin STB - 300 500 s
before first I2C-bus transmission
is recognized;
ILO(SVR) output leakage current on pin - - 5 A
SVR
td(mute_off) mute off delay time time from amplifier start to 10 % [2]

of output signal; ILO = 0 A

I2C-bus mode; - 430 650 ms
with ILO = 5 A  +15 ms;
no DC-load (IB1[D1] = 0);
legacy mode; - 430 650 ms
with ILO = 5 A  +20 ms;
VSTB = 7 V; RADSEL = 0 ;
tamp_on amplifier on time time from amplifier start to [2]

amplifier on; 90 % of output

signal; ILO = 0 A
I2C-bus mode; - 550 800 ms
with ILO = 5 A  +30 ms;
no DC-load (IB1[D1] = 0);
legacy mode; - 550 800 ms
with ILO = 5 A  +20 ms;
VSTB = 7 V; RADSEL = 0 ;

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Product short data sheet Rev. 8 — 27 September 2013 9 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

Table 5. Characteristics …continued

Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
toff amplifier switch-off time time to DC output voltage < 0.1 V; [2]

ILO = 0 A
I2C-bus mode; 250 500 750 ms
with ILO = 5 A  +0 ms;
via pin STB; (IB4[D6] = 0); 250 500 750 ms
with ILO = 5 A  +0 ms;
td(mute-on) delay time from mute to on from 10 % to 90 % of output 5 15 40 ms
signal; Vi = 50 mV; I2C-bus mode
(IB2[D1, D2] = 1 to 0) or IB2(D0 =
1 to 0) or legacy mode (VSTB =
3 V to 7 V);
td(soft_mute) soft mute delay time from 90 % to 10 % of output 5 15 40 ms
signal; Vi = 50 mV; I2C-bus mode
(IB2[D1, D2] = 0 to 1) or legacy
mode (VSTB = 7 V to 3 V);
td(fast_mute) fast mute delay time from 90 % to 10 % of output - 0.4 1 ms
signal; Vi = 50 mV; I2C-bus mode
(IB2[D0] = 0 to 1, or VSTB from
> 5.9 V to < 0.8 V in 1 s;
t(start-Vo(off)) engine start to output off time VP from 14.4 V to 5 V in 1.5 ms; - 0.1 1 ms
Vo < 0.5 V;
t(start-SVRoff) engine start to SVR off time VP from 14.4 V to 5 V in 1.5 ms; - 40 75 ms
VSVR < 0.7 V;
I2C-bus interface[3]
VIL LOW-level input voltage pins SCL and SDA - - 1.5 V
VIH HIGH-level input voltage pins SCL and SDA 2.3 5.5 V
VOL LOW-level output voltage pin SDA; IL = 5 mA - - 0.4 V
fSCL SCL clock frequency - 400 - kHz
VADSEL voltage on pin ADSEL I2C-bus address
A[6:0] = 1101 101
RseriesADSEL = 0  4 5 11 V
RseriesADSEL = 100 k - - VP V
II(ADSEL) input current on pin ADSEL VSTB = 5 V; VADSEL = 5 V - 2 10 A
RADSEL resistance on pin ADSEL I2C-bus address 99 100 101 k
A[6:0] = 1101 110
I2C-bus address 29.7 30 30.3 k
A[6:0] = 1101 111
I2C-bus address 9.9 10 10.1 k
A[6:0] = 1101 010
legacy mode - - 0.47 k
VP(latch) latch supply voltage does not react to address - - 6 V
selection changes
Start-up diagnostics

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Product short data sheet Rev. 8 — 27 September 2013 10 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

Table 5. Characteristics …continued

Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
tsudiag start-up diagnostic time from start-up diagnostic 50 130 250 ms
command via I2C-bus until
completion of start-up diagnostic;
VO + < 0.1 V; VO  < 0.1 V (no
load) IB1[D1] = 1;
td(sudiag-on) start-up diagnostic to on delay at 90 % of output signal; - 680 - ms
time IB1[D0:D1] = 11;
Voffset offset voltage start-up diagnostic offset voltage 1.3 2 2.5 V
under no load condition
RLdet(sudiag) start-up diagnostic load shorted load
detection resistance high gain; IB3[D6:D5] = 00 - - 0.5 
low gain; IB3[D6:D5] = 11 - - 1.5 
normal load
high gain (IB3[D6:D5] = 00) 1.5 - 20 
low gain (IB3[D6:D5] = 11) 3.2 - 20 
line driver load 80 - 200 
open load 400 - - 
Amplifier diagnostics
VOL(DIAG) LOW-level output voltage on pin fault condition; IDIAG = 1 mA - - 0.3 V
DIAG
VO(offset_det) output voltage at offset 1.0 1.3 2.0 V
detection
THDclip total harmonic distortion clip VP > 10 V
detection level IB2[D7:D6] = 10 - 10 - %
IB2[D7:D6] = 01 - 5 - %
IB2[D7:D6] = 00 - 2 - %
Tj(AV)(pwarn) pre-warning average junction IB3[D4] = 0 or legacy mode 150 160 170 C
temperature IB3[D4] = 1 125 135 145 C
Tj(AV)(G(0.5dB)) average junction temperature Vi = 0.05 V; best efficiency mode - 175 - C
for 0.5 dB gain reduction turns off when activated
G(th_fold) gain reduction of thermal when all channels switch off - 20 - dB
foldback
Io output current I2C-bus mode; IB5[D7] = 0; AC
load bit set; peak current
IB4[D1] = 1 500 - - mA
IB4[D1] = 0 275 - - mA
I2C-bus mode; IB5[D7] = 0; AC
load bit not set; peak current
IB4[D1] = 1 - - 250 mA
IB4[D1] = 0 - - 100 mA

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Product short data sheet Rev. 8 — 27 September 2013 11 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

Table 5. Characteristics …continued

Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Amplifier
Po output power RL = 4 ; VP = 14.4 V; 18 20 - W
THD = 0.5 %
RL = 4 ; VP = 14.4 V; 23 25 - W
THD = 10 %
RL = 2 ; VP = 14.4 V; 29 32 - W
THD = 0.5 %
RL = 2 ; VP = 14.4 V; 40 44 - W
THD = 10 %
Po(max) maximum output power RL = 4 ; VP = 14.4 V; 37 40 - W
Vi = 2 V RMS square wave
RL = 4 ; VP = 15.2 V; 41 45 - W
Vi = 2 V RMS square wave
RL = 2 ; VP = 14.4 V; 58 64 - W
Vi = 2 V RMS square wave
THD total harmonic distortion Po = 1 W to 12 W; fi = 1 kHz; - 0.01 0.1 %
RL = 4 ; BTL mode
Po = 1 W; fi = 1 kHz; RL = 4 ; - 0.01 0.1 %
VP = 7 V; BTL and best efficiency
mode
Po = 4 W; fi = 1 kHz; RL = 4 ; - 0.03 0.1 %
best efficiency mode
Po = 1 W to 12 W; fi = 20 kHz; - 0.3 0.4 %
RL = 4 ; best efficiency mode
Vo = 1 V (RMS) and 4 V (RMS), - 0.02 0.05 %
fi = 1 kHz; line driver mode
Po = 1 W to 12 W; fi = 1 kHz; - 0.01 0.1 %
RL = 4 ; low gain mode
cs channel separation best efficiency mode; RS = 1 k; [4]

RACGND = 250 
fi = 1 kHz 65 80 - dB
fi = 10 kHz 55 65 - dB
SVRR supply voltage ripple rejection fi = 1 kHz; RS = 1 k; [4] 55 70 - dB
RACGND = 250 ; best efficiency
mode; tested at VP = 10.5 V
CMRR common mode rejection ratio amplifier mode; Vcm = 0.3 V (p-p); [4]

fi = 1 kHz to 3 kHz, RS = 1 k;

RACGND = 250 ; best efficiency
mode
common mode input to 55 65 - dB
differential output (VO(dif) /
VI(cm) + 26 dB)
common mode input to 50 58 - dB
common mode output (VO(cm) /
VI(cm) + 26 dB)

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Product short data sheet Rev. 8 — 27 September 2013 12 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

Table 5. Characteristics …continued

Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Vo output voltage variation plop during switch-on and [5]

switch-off; best efficiency mode

from off to mute and mute to off - - 7.5 mV
from mute to on and on to mute - - 7.5 mV
(soft mute)
from off to on and on to off - - 7.5 mV
(start-up diagnostic enabled)
Vn(o) output noise voltage filter 20 Hz to 22 kHz (6th order);
RS = 1 k
mute mode - 15 23 V
line driver mode - 25 33 V
amplifier mode; best efficiency - 43 65 V
mode
amplifier mode; best efficiency - 40 60 V
mode; RS = 50 
Gv(amp) voltage gain amplifier mode single-ended in to differential out; 25.5 26 26.5 dB
best efficiency mode
Gv(ld) voltage gain line driver mode single-ended in to differential out; 15.5 16 16.5 dB
best efficiency mode
Zi input impedance Tamb = 40 C to +105 C 38 62 105 k
Tamb = 0 C to 105 C 55 62 105 k
mute mute attenuation Vo(on) / Vo(mute); Vi = 50 mV 80 92 - dB
Vo(mute)(RMS) RMS mute output voltage Vi = 1 V RMS; - 16 29 V
filter 20 Hz to 22 kHz
Bp power bandwidth 1 dB - 20 to - Hz
20000
CL(crit) critical load capacitance no oscillation; RL between 2  22 - - nF
and open load; CL from all
outputs to GND
Best efficiency mode control
Vo(swoff)be best efficiency switch-off output best efficiency switch open
voltage 4  load selected; IB5[D4] = 1 - 0.9 - V
2  load selected; IB5[D4] = 0 - 1.7 - V
Rsw(be) best efficiency switch resistance - 1.0 - 

[1] VSTB depends on the current into pin STB: minimum = (1429   ISTB) + 5.4 V, maximum = (3143   ISTB) + 5.6 V.
[2] The times are specified without leakage current. For a leakage current of 5 A on pin SVR, the delta time is specified. If the capacitor
value on pin SVR changes  30 %, the specified time also changes  30 %. The specified times include an ESR of 15  for the
capacitor on pin SVR.
[3] Standard I2C-bus specification: maximum LOW-level = 0.3VDD, minimum HIGH-level = 0.7VDD. To comply with 5 V and 3.3 V logic,
VDD = 5 V defines the maximum LOW-level and VDD = 3.3 V defines the minimum HIGH-level.
[4] For optimum channel separation (cs), supply voltage ripple rejection (SVRR) and common mode rejection ratio (CMRR), a resistor
RS
R ACGND = ------  must be in series with the ACGND capacitor.
4
[5] The plop-noise during amplifier switch-on and switch-off is measured using an ITU-R 2 k filter; see Figure 4.
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Product short data sheet Rev. 8 — 27 September 2013 13 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

5th ORDER
DIFFERENTIAL
20 kHz RECTIFIER OUTPUT
input TO ITU-R 2K output
BUTTERWORTH PEAK BUFFER
SINGLE − FILTER
LOW-PASS DETECTOR + 40 dB GAIN
ENDED
FILTER

001aam706

Fig 3. Location of ITU-R 2K filter

001aam707
10
output (4)
(dB)
−10
(1)
maximum
6 dB at 6 kHz
−30
0 dB at 2 kHz

(2)
−50
(3)

−70
10 102 103 104 105
f (Hz)

(1) 20 Hz.
(2) A-weighting.
(3) ITU-R average response meter.
(4) 20 kHz bandwidth limit.
Fig 4. Plop noise test using ITU-R 2K filter

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Product short data sheet Rev. 8 — 27 September 2013 14 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

8. Package outline

DBS27P: plastic DIL-bent-SIL (special bent) power package; 27 leads (lead length 6.8 mm) SOT827-1

non-concave
x Dh

Eh

view B: mounting base side

d A2

B
j E
A
L4
L3

L
L2
1 27

Z e1 w Q c v
bp
e e2
m

0 10 20 mm
x Z(1)
scale
1.8
0.03
1.2
Dimensions (mm are the original dimensions)

Unit A A2 bp c D(1) d Dh E(1) e e1 e2 Eh j L L2 L3 L4 m Q v w

max 4.6 0.60 0.5 29.2 24.8 15.9 3.55 3.9 1.15 22.9 2.1
mm nom 19 12 2 1 4 8 3.40 6.8 4 0.6 0.25
min 4.4 0.45 0.3 28.8 24.4 15.5 3.25 3.1 0.85 22.1 1.8
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. sot827-1_po

Outline References European

Issue date
version IEC JEDEC JEITA projection
13-02-13
SOT827-1
13-05-30

Fig 5. Package outline SOT827-1 (DBS27P)

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Product short data sheet Rev. 8 — 27 September 2013 15 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

HSOP36: plastic, heatsink small outline package; 36 leads; low stand-off height SOT851-1

D E A
x

y X
E2

HE v A

D1
D2

1 18

pin 1 index

A2 A
E1
(A 3)
A4

θ
Lp
detail X
36 19

z w
e bp

0 5 10 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT max. A2 A3 A4(1) bp c D (2) D1 D2 E (2) E1 E2 e HE Lp Q v w x y Z θ

3.4 +0.08 0.38 0.32 16.0 13.0 1.1 11.1 6.2 2.9 14.5 1.1 1.7 2.55 8°
mm 3.5 0.35 0.65 0.25 0.12 0.03 0.07
3.3 −0.04 0.25 0.23 15.8 12.6 0.9 10.9 5.8 2.5 13.9 0.8 1.5 2.20 0°

Notes
1. Limits per individual lead.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

04-03-09
SOT851-1
04-05-25

Fig 6. Package outline SOT851-1 (HSOP36)

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Product short data sheet Rev. 8 — 27 September 2013 16 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

DBSMS27P: plastic dual bent surface mounted SIL power package; 27 leads SOT1154-1

L4
L3
θ2
D
gauge plane seating plane
A3 S

2
R

1
R
θ1

y Lp1 Lp2 aaa S

c

detail X

non-concave
d
x
A2
Dh

Eh j E

L1
27 1 L2
A1

e1 w v c X
bp
Z e Q

R1 R2 aaa v w x y Z(1) θ1 θ2

0.85 0.35 1.8 9° 10°

0 10 20 mm 0.60 0.25 0.1 0.6 0.25 0.03 0.1 1.5
scale 0.35 0.15 1.2 3° 4°
Dimensions

Unit A A1 A2 A3 bp c D(1) d Dh E(1) e e1 Eh j L1 L2 L3 L4 Lp1 Lp2 Q

max 4.65 0.10 4.6 0.60 0.5 29.2 24.8 15.9 3.55 3.03 5.03 1.2 3.2 1.43 1.43 2.10
mm nom 4.50 0.00 4.5 0.5 0.50 0.4 29.0 24.6 12 15.7 2 1 8 3.40 2.83 4.83 1.0 3.0 1.25 1.25 1.95
min 4.35 -0.08 4.4 0.45 0.3 28.8 24.4 15.5 3.25 2.63 4.63 0.8 2.8 1.07 1.07 1.80
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. sot1154-1_po

Outline References European

Issue date
version IEC JEDEC JEITA projection
12-12-19
SOT1154-1 --- --- ---
13-02-13

Fig 7. Package outline SOT1154-1 (DBSMS27P)

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Product short data sheet Rev. 8 — 27 September 2013 17 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

9. Revision history
Table 6. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TDF8546 v.8 20130927 Product short data sheet - -

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Product short data sheet Rev. 8 — 27 September 2013 18 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

10. Legal information

10.1 Data sheet status

Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.

10.2 Definitions Suitability for use in automotive applications — This NXP

Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
Draft — The document is a draft version only. The content is still under
authorized or warranted to be suitable for use in life support, life-critical or
internal review and subject to formal approval, which may result in
safety-critical systems or equipment, nor in applications where failure or
modifications or additions. NXP Semiconductors does not give any
malfunction of an NXP Semiconductors product can reasonably be expected
representations or warranties as to the accuracy or completeness of
to result in personal injury, death or severe property or environmental
information included herein and shall have no liability for the consequences of
damage. NXP Semiconductors and its suppliers accept no liability for
use of such information.
inclusion and/or use of NXP Semiconductors products in such equipment or
Short data sheet — A short data sheet is an extract from a full data sheet applications and therefore such inclusion and/or use is at the customer's own
with the same product type number(s) and title. A short data sheet is intended risk.
for quick reference only and should not be relied upon to contain detailed and
Applications — Applications that are described herein for any of these
full information. For detailed and full information see the relevant full data
products are for illustrative purposes only. NXP Semiconductors makes no
sheet, which is available on request via the local NXP Semiconductors sales
representation or warranty that such applications will be suitable for the
office. In case of any inconsistency or conflict with the short data sheet, the
specified use without further testing or modification.
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
Product specification — The information and data provided in a Product and products using NXP Semiconductors products, and NXP Semiconductors
data sheet shall define the specification of the product as agreed between accepts no liability for any assistance with applications or customer product
NXP Semiconductors and its customer, unless NXP Semiconductors and design. It is customer’s sole responsibility to determine whether the NXP
customer have explicitly agreed otherwise in writing. In no event however, Semiconductors product is suitable and fit for the customer’s applications and
shall an agreement be valid in which the NXP Semiconductors product is products planned, as well as for the planned application and use of
deemed to offer functions and qualities beyond those described in the customer’s third party customer(s). Customers should provide appropriate
Product data sheet. design and operating safeguards to minimize the risks associated with their
applications and products.

10.3 Disclaimers NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
Limited warranty and liability — Information in this document is believed to
third party customer(s). Customer is responsible for doing all necessary
be accurate and reliable. However, NXP Semiconductors does not give any
testing for the customer’s applications and products using NXP
representations or warranties, expressed or implied, as to the accuracy or
Semiconductors products in order to avoid a default of the applications and
completeness of such information and shall have no liability for the
the products or of the application or use by customer’s third party
consequences of use of such information. NXP Semiconductors takes no
customer(s). NXP does not accept any liability in this respect.
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors. Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
In no event shall NXP Semiconductors be liable for any indirect, incidental,
damage to the device. Limiting values are stress ratings only and (proper)
punitive, special or consequential damages (including - without limitation - lost
operation of the device at these or any other conditions above those given in
profits, lost savings, business interruption, costs related to the removal or
the Recommended operating conditions section (if present) or the
replacement of any products or rework charges) whether or not such
Characteristics sections of this document is not warranted. Constant or
damages are based on tort (including negligence), warranty, breach of
repeated exposure to limiting values will permanently and irreversibly affect
contract or any other legal theory.
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards Terms and conditions of commercial sale — NXP Semiconductors
customer for the products described herein shall be limited in accordance products are sold subject to the general terms and conditions of commercial
with the Terms and conditions of commercial sale of NXP Semiconductors. sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
Right to make changes — NXP Semiconductors reserves the right to make agreement is concluded only the terms and conditions of the respective
changes to information published in this document, including without agreement shall apply. NXP Semiconductors hereby expressly objects to
limitation specifications and product descriptions, at any time and without applying the customer’s general terms and conditions with regard to the
notice. This document supersedes and replaces all information supplied prior purchase of NXP Semiconductors products by customer.
to the publication hereof.

TDF8546_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.

Product short data sheet Rev. 8 — 27 September 2013 19 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

No offer to sell or license — Nothing in this document may be interpreted or Translations — A non-English (translated) version of a document is for
construed as an offer to sell products that is open for acceptance or the grant, reference only. The English version shall prevail in case of any discrepancy
conveyance or implication of any license under any copyrights, patents or between the translated and English versions.
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
10.4 Trademarks
authorization from competent authorities. Notice: All referenced brands, product names, service names and trademarks
Quick reference data — The Quick reference data is an extract of the are the property of their respective owners.
product data given in the Limiting values and Characteristics sections of this I2C-bus — logo is a trademark of NXP B.V.
document, and as such is not complete, exhaustive or legally binding.

11. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

TDF8546_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.

Product short data sheet Rev. 8 — 27 September 2013 20 of 21

NXP Semiconductors TDF8546
I2C-bus controlled 4  45 W best efficiency amplifier

12. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3
5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 7
7 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
10.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
10.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
10.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
10.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
11 Contact information. . . . . . . . . . . . . . . . . . . . . 20
12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2013. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 27 September 2013
Document identifier: TDF8546_SDS