6th Sem Syllabus
6th Sem Syllabus
2. Contact Hours : L: 3 T: 0 P: 2
5. Credits : 4
6. Semester : VI
8. Pre-requisite : Nil
EC-67
3. MOS inverters: Resistive load inverter, inverter with n-type MOSFET 8
load, CMOS inverter: Switching Threshold, Noise Margin, Dynamic
behavior of CMOS inverter, computing capacitances, propagation
delay, Dynamic power consumption, static power consumption, energy,
and energy delay product calculations, stick diagram, IC layout design
and tools.
4. Designing Combinational Logic Gates in MOS and CMOS: 8
MOS logic circuits with depletion MOS load.
Static CMOS Design: Complementary CMOS, Ratioed logic, Pass
transistor logic, BiCMOS logic, pseudo nMOS logic,
Dynamic CMOS logic, clocked CMOS logic CMOS domino logic, NP
domino logic, speed and power dissipation of Dynamic logic, cascading
dynamic gates.
5. Designing sequential logic circuits: Timing matrices for sequential 8
circuits, classification of memory elements, static latches and registers,
the bistability principle, multiplexer based latches , Master slave Edge
triggered register , static SR flip flops, dynamic latches and registers,
dynamic transmission gate edge triggered register, the C2MOS register
6. Pulse registers, sense amplifier based registers, Pipelining, Latch 6
verses Register based pipelines, NORA-CMOS. Two-phase logic
structure; VLSI designing methodology –Introduction, VLSI designs
flow, Computer aided design technology: Design capture and
verification tools, Design Hierarchy Concept of regularity, Modularity &
Locality, VLSI design style, Design quality.
TOTAL 42
EC-68
1. Subject Code: EC 304 Course Title: Digital Signal Processing
2. Contact Hours : L: 3 T: 0 P: 2
5. Credits : 4
6. Semester : VI
EC-69
3. Design of Digital Filters: FIR Filters : Design of FIR filters using windows, 8
Design of FIR filters using frequency sampling method, Design of FIR
differentiator. Design of IIR Filter: Impulse Invariance Method, Bilinear
transformations, design examples: Butterworth low
p a s s , Frequency transformations and Least square inverse method.
4. Multirate D i g i t a l Signal Processing: Decimation, Interpolation, 6
sampling rate conversion, polyphase representation, multistage
implementation, 2 channel maximally decimated perfect reconstruction
filter banks, 2 channel Paraunitary filter banks , Applications.
5. Concept of finite word length in DSP, fixed and floating point numbers, 6
representation of negative number, effect of truncation, finite word
length effect in realization of IIR and FIR system. Fundamentals of
adaptive filters and applications, system identification, adaptive channel
equalization, echo cancelation in data transmission,
6. Introduction to Digital Signal Processors: Fixed point and Floating 6
point processors, architectures. TMS 320C54XX and TMS320C67XX
Architecture, Memory, Addressing Modes, filter implementation on
fixed and floating point processors.
TOTAL 42
EC-70
6. Digital Signal Processing: Fundamentals and Applications/ Li Tan/ 2009
Elsevier Publications
2. Contact Hours : L: 3 T: 0 P: 2
5. Credits : 4
6. Semester : VI
EC-71
3. Digital Signal Processors: DSP Architecture, DSP applications, 4
algorithms, data path, memory, addressing modes, peripherals. TI and
Sharc family of DSP processors.
4. System On Chip : Evolution, features, IP based design, TI OMAP 4
architecture and peripherals. Digital Multimedia processor: Architecture
and peripherals.
5. SRAM, DRAM working and organization. Interfacing memory with ARM 4
7. Elements of Network Embedded Systems
6. RTOS : RT-Linux introduction, RTOS kernel, Real-Time Scheduling 10
Bus structure: Time multiplexing, serial, parallel communication bus
structure. Bus arbitration, DMA, PCI, AMBA, I2C and SPI Buses.
TOTAL 42
2. Contact Hours : L: 2 T: 0 P: 0
EC-72
1. Subject Code: CO202 Course Title: Database Management System
2. Contact Hours : L: 3 T: 0 P: 2
5. Credits : 4
6. Semester : IV
COE-53
4. File Organization, Indexing and Hashing: Overview of file organization 8
techniques, Indexing and Hashing- Basic concepts, Static Hashing,
Dynamic Hashing, Ordered indices, Multi-level indexes, B-Tree index
files, B+- Tree index files, Buffer management
Transaction processing concepts: Transaction processing system,
schedule and recoverability, Testing of serializability, Serializability
of schedules, conflict & view serializable schedule, recovery from
transaction failures, deadlock handling.
5. Concurrency Control Techniques: Locking Techniques for 8
concurrency control, time stamping protocols for concurrency control,
concurrency control in distributed systems. multiple granularities and
multi-version schemes.
6 Case Studies: Commercial databases, Oracle, Postgress, MySQL 6
TOTAL 42
Reference Books
1. Ramakrishna, Gehkre, “Database Management System”, McGraw-Hill
2 Date C.J.,”An Introduction to Database systems”
2. Contact Hours : L: 3 T: 0 P: 2
5. Credits : 4
COE-54
3. LNA and Mixer Design Intrinsic MOS noise parameters, Power match 9
versus noise match Large signal performance, Multiplier based mixers,
Subsampling mixers
4. RF Power Amplifiers Class A, AB, B, C amplifiers, Class D, E, F 9
amplifiers RF Power amplifier.
5. Oscillators- Basic topologies VCO and definition of phase noise, Noise 12
power and trade off. Radio frequency Synthesizers- PLLS, Various
RF synthesizer architectures and frequency dividers, Design issues in
integrated RF filters.
TOTAL 42
5. Credits : 4
6. Semester : VI
EC-110
8. Pre-requisite : Nil
EC-111
11. Suggested Books :
5. Credits : 4
6. Semester : VI
8. Pre-requisite : Nil
EC-112
2. Computer Systems Organization and Architecture by Carpinelli; 2001
Pearson Education.
3. Computer Architecture and Organization by Hayes. J.P.; TMH. 2000
4. Computer Organization & Design by Pal Chaudhuri, P; PHI. 2004
2. Contact Hours : L: 3 T: 0 P: 0
5. Credits : 3
6. Semester : IV
8. Pre-requisite : Nil
EC-59
10. Details of Course :
EC-60