Chapter 4: Digital Logic

Section 4.1
(1) Boolean Algebra: (B.A.)
The operations of computers are based on the storage of binary data (0s, 1s). In this section we analyze how these 0s
and 1s can be implemented using digital logic. We begin with Boolean Algebra, which is the foundation of digital logic.
- B.A. is the branch of Algebra in which variables can take only the values of 0 and 1. (False and True respectively)
- There are 3 basic logical operations: AND, OR, and NOT which are represented by Ʌ, V, ̃ or sometimes: . ,+, !
respectively depending on the text.
The 3 functions are given below:
NOT: AND: OR:

X Y X·Y X Y X+Y
X ~X
F F F F F F
F T F T F F T T
T F T F F T F T
T T T T T T

In B.A. we may form equations just as those equations in regular algebra: y = x2 + 2x. In Boolean algebra one function
definition could be: y= A + (𝐵̅ x C). It’s common to have multivariable functions in Boolean algebra rather than single
variable functions as it is common in elementary algebra.

Note:
1. In the absence of parenthesis ( ) then the precedence rule is: Not →And →Or. (Precedence left to right)
2. Equations and/or functions1 are very often represented by truth tables as seen below.
3. It’s common to express AND as a product and OR as a sum

(2) Truth Tables:

Truth tables: It’s a table that lists all the possible inputs of the function and its respective output.
̅ = XY
(a) Ex: Consider the function Z = F(X,Y) = X * Y ̅ Construct a truth table for the function.

X Y ̅
𝐘 ̅
X·𝐘

0 0 1 0
0 1 0 0
1 0 1 1
1 1 0 0

When a BA function is represented as a truth table the final output is always in the last column: 2 variables, 22 ouputs.
In general, n-inputs will always produce => 2n outputs.

1
Boolean Functions are functions that receive a Boolean input and produce a Boolean output.
 (b) F(S,X, Y) = (Y * S) + (X * 𝑆̅) 3 variables: 23 inputs → 8 outputs (The + sign indicates an OR operation)
Input example (Note: On our exams, there will be a maximum of 3 inputs)

X Y S 𝐒̅ Y·S X·𝐒̅ Y·S + X·𝐒̅

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Note: Special outputs: A Tautology is when all combinations of input produce an output with all true values and a
Contradiction is when all combinations of input produce an output with all false values.

Section 4.2
Gates: We have just covered the logical construct behind computer data and now we need to implement the hardware
to achieve that. Gates are the building blocks of all digital circuits. All functions are implemented by some composition
and combination of several gates.
A gate is an electronic circuit that produces an output signal of true or false (high and low voltage respectively)
depending on its inputs. There are usually two inputs but there may be more depending on the circuit.

The basic gates used in digital logic are: AND, OR, NOT. However there are often three derived gates which are routinely
used in circuitry: NAND, NOR, XOR (These are normally used if their price is cheaper, since it’s possible to produce every
function with these three derived gates)

Note: NAND → NOT AND → ̅̅̅̅

AB
NOR → NOT OR → ̅̅̅̅̅̅̅
A+B
̅B
̅+A
XOR → either one or the other but not both → A ⊕ B = AB
̅̅̅̅̅̅̅̅
XNOR → NOT XOR → A ⊕ B

We can easily obtain the truth table for these new gates by applying their basic definitions. The logical representation
of these gates is on the next page.
Notes:
(1) Internally a 0 or 1 is represented by either a high voltage or a low voltage depending on the circuitry.
(2) Functionally complete sets (FCS) or Universal sets are gates that can be used to implement any function.
- A functionally complete set of Boolean operators is one which can be used to express all possible truth tables
by combining members of the set into a Boolean expression. A well-known FCS is the pair { AND, NOT }.
Ex: Algebraic proof: Use { AND, NOT } to produce an OR: ̅̅̅̅̅̅̅̅
̅∙B
(A ̅)
(3) NAND and NOR are individual gates and they are both FCS.
- If it’s cheaper to produce them and the delay time is negligible they should be used instead of the basic gates.
Gates are the most basic circuit level of the computer hardware. The parts that makeup the gate transistors is already
considered electrical engineering which is not the focus of our course. The XOR gate is identical to the XNOR gate
without the not function (inversion bubble) at the front. The small circles are called inversions.

Using these gates we can create circuitry from a Boolean function – meaning, we can implement a Boolean function
using logical gates. As a general rule when implementing circuits using gates we DO NOT simplify the final function.
Although later we will see a method to simplify digital circuitry.

̅ and label each gate for clarity.

Ex: Create a digital circuitry using gates for the BA function: F(A, B) = AB + AB

There are different ways to simplify logical circuits. One approach is the Algebraic Method. In order to simplify logical
functions or expressions we can use logical identities. The identities of B.A., are very similar to regular Algebraic
identities.

Commutative Law Identity Laws

(a) A + B = B + A (a) A + A = A
(b) A · B = B · A (b) A · A = A
(c) A + 0 = A
Associate Law (d) A · 0 = 0
(a) (A + B) + C = A + (B + C) (e) A + 1 = 1
(b) (A B) C = A (B C)
(f) A · 1 = A
̅=0
(g) A · A
Distributive Law
(h) A + A ̅=1
(a) A (B + C) = AB + AC (+ means OR)
(b) A + (B C) = (A + B)·(A + C) (· means AND) (i) 1 + 1 = 1
(j) 0 + 0 = 0
De Morgan's Theorem
̅̅̅̅̅̅̅
(a) (A ̅B
+ B) = A ̅ Note: The + means an OR operation and when
̅̅̅̅) = A
(b) (AB ̅+B ̅ ( · ) is not visible it is an implied AND operation.
Example: Consider the function, (A ̅ + B)(A + B). Let’s (a) Create a truth table for it, (b) Use the three basic fates (NOT,
OR, AND) to create the circuit for this function and (c) Simplify the expression using Boolean Algebra. (Use the Boolean
identities and laws above to simplify the expression)

Also consider the reverse problem: Given a truth table with two inputs (or three) develop the Boolean function that
produces the table. (Hint: Produce function with AND, OR and NOT gates only and then simplify if possible)
Ex: F(A,B) => { 00, 01, 10, 11 } → { 1, 0, 1, 1 } We only need to consider where the output is 1
̅B
Answer: (Un-simplified), F(A, B) = A ̅ + AB ̅ + AB (2nd term is ̅̅̅̅
̅ + AB ̅ B = AB
A ̅)
̅ + AB
(Simplified Algebraically) F(A, B) = B

We can also do the reverse on a circuitry: Given a logical circuit, produce the Boolean function it represents.
Ex: Produce the function that is represented by this gate circuitry: (Show each level)

̅̅̅̅)
On the first Level: OR and NAND gates. On the second level just AND gate. The function is: F(A,B) = (A + B)(AB

Note: Although it’s not necessary to show each level, for the purposes of exams students could show each gate level
since it is easier to create the final Boolean function. These problems will be on the second exam and they will count a
significant portion. Make sure to do the homework problems dealing with these circuits.

Section 4.3
Combinatorial Circuits

Circuits where the output is determined by a combination of current inputs is called a Combinatorial circuit. They do not
use any memory of storage devices.

Multiplexers: In the design of large-scale digital systems, a single line is required to carry two or more different signals.
Of course, only one signal can be placed on a line at any time. Therefore we need a device that will allow us to select at
different instants, the signal we want to place on a line. Such a device is called a Multiplexer, devices that connect
multiple inputs to a single output. At any time just 1 of the inputs is selected to be passed to the output. This Multiplexer
(MUX) selects one of several input signals and forwards the input into a single line. Multiplexers are used in digital
circuits to control signal and data routing. A MUX of 2n inputs has n select lines and obviously 1 output.

The select lines are used to select which input line is sent to the output.

A multiplexer performs the function of selecting the input on any one of the n input lines and feeding this input to the
output line.
Ex: Computer Memory: Multiplexers are used in computer memory to maintain a huge amount of memory in the
computers, and also to reduce the number of copper lines required to connect the memory to other parts of the
computer.

Network printers: Another example of multiplexers. Only one computer can send a job at a time.

(Old) Telephone Network: In telephone networks, multiple audio signals are integrated on a single line of transmission
with the help of a multiplexer. (Switch System)

Note: Multiplexers are used as one method of reducing the number of integrated circuit packages required by a
particular circuit design which in turn reduces the cost of the system.

The circuit on the left represents a 2X1 or a 2 Line Multiplexer where I0 and I1
are the inputs and S is the select line. Using this circuit we can “select” which
of the inputs passes through with the S line. Determine how this is done.

Assume that we have four input lines, I0, I1, I2 and I3, which are to be multiplexed on a single line, Output (Y). The four
input lines are known as the Data Inputs. Since there are four inputs, we need two additional lines to select which of
the inputs is to be sent to the output. We call these lines select lines S1 and S2. The implementation of a 4 by 1
multiplexer or a 4 Line Multiplexer (4X1 MUX) is shown below:

The logic circuit symbol for the above multiplexer is represented (in standard form) as the diagram on the right:
There are three methods for implementing a circuit using multiplexers. They are:
- Algebraic Manipulation
- Numerical Method
- Karnaugh Map (K-map) Method (Preferred method)

K-map Method: It can be shown that applying Boolean algebra can be awkward to implement multiplexers. This is
because it takes a lot of practice and it can be very difficult to determine the set of laws and propositions to use.
The Karnaugh map approach provides a simple and straight-forward method of implementing multiplexers. With K-maps
Boolean expressions having up to four and even six variables can be implemented with little complexity.

Ex: Obtain the multiplexer for given circuit below, using the K-map method: (Multiplexer Implementation)

1. Create a K-map for the function above. (Write the K-map vertically instead of horizontally)
2. Write the inputs in terms of B and C, which are the select lines.
3. Draw the symbolic Multiplexer 4 X 1 MUX with the inputs A, and the select lines B, C. (See picture above)

Decoders: A combinational circuit that with n input lines but only one active2 and 2n outputs.
The function or a truth table will explain which output is 1 for which combination of inputs – in other words, the device
transforms coded bits to generate the original data again. N, inputs → 2n outputs decoder.
In essence they are combinational logic circuits that convert a binary value to a pattern of output bits.

Note: Decoders have an “enable” input – not for logical operations but to either activate/deactivate the decoder.
They are used to analyze data streams for certain code CPU memory systems, CPU 1/0, etc…

Section 4.4
Sequential Circuits: These are essentially combinatorial circuits with memory since they can store information in future
clock cycles. Sequential circuits use current input variables and previous input variables by storing the information and
putting back into the circuit on the next clock (activation) cycle. Therefore, basically a sequential circuit is a circuit that
depends on a previous state or input and not only on the current input, which means the circuit must have memory.

Combinational logic is useful for interesting operations like decoding, encoding, addition and subtraction, however the
sequence of operations are cumbersome to handle using combinational logic methods. So combinatorial logic is then
interconnected with storage elements to create sequential circuits.

2
Its goal is to break down a combination of inputs.
 There are two main types of sequential circuits – Synchronous and Asynchronous (Synchronous3 use a clock to drive
the circuit, whereas the asynchronous types are cleared by the pulse of the inputs only)

In asynchronous sequential circuits, input changes may result in any of the outputs or stored information (called a state)
to change. Such circuits are difficult to design because of dependence on propagation delays and their interaction with
timing of input changes. In synchronous sequential circuits, the process uses clock signals to cause the storage elements
(and outputs) to only change at specific oscillations of the clock signal.

Let’s see some examples of both types of sequential circuits:

Latch (Flip-flops without clock signal – Devices that can be set or reset)
A storage element maintains binary state indefinitely (as long as power is applied), until directed by an input signal to
switch to its other state. The simplest latch, also referred to as the SR latch has two inputs and two outputs and can
be constructed from two NOR gates as shown.

The SR-latch is meant to have at most one of its inputs equal to 1 at any time. When both of its inputs are 0 it has
two different stable states possible. Either x is 0, in which case we have the following signal values:

Note that when S and R simultaneously change from their asserted state to their de-asserted states, the flip flop
enters an unstable state when its outputs oscillate between two binary states indefinitely.

An alternate form of the SR latch, in this case the set and reset signals active low, can be constructed using NAND
gates as follows:

Another way of eliminating the undesirable unstable state is by means of making sure that both set and reset
signals are never active at the same time giving rise to what is called a D latch.

3
Clock sends the signals of 0, 1 which means off and on modes
Flip-flops (A synchronous version of the latch)

A flip-flop is a circuit that has two stable states and can be used to store state information. Both flip-flops and
latches are used as data storage elements. Flip-flops are the basic storage elements in sequential logic. Flip flops
are devices that use a clock. The function of a flip flop is to store one bit of information.

Half Adder and Full Adder: These are examples of sequential circuits that use latches and flip-flops. As their names
imply, they add binary digits. Let’s build a device that can add two binary digits together. We can quickly calculate
what the answers should be:

0+0=0 0+1=1 1+0=1 1 + 1 = 10

Half Adder – So we need two inputs (A and B) and two outputs. One for the current bit and the other for the possibly
carry over bit. The low order output (least significant bit) will be called Σ represents the sum, and the high order
(MSB) output will be called C-out because it represents the carry out bit. The truth table is represented below.
XOR Gate

Note: The gate on top is the XOR gate: XOR behavior: { 00, 01, 10, 11 } → { 0, 1, 1 , 0 }

Full Adder: The main difference between a half-adder and a full-adder is that the full-adder has three inputs (One is
the carry in bit). The first two inputs are A and B and the third input is an input carry designated as Cin. The output
carry is designated as Cout and the normal output (sum) is designated as S.

The inputs A, B mean, add A + B and the carry IN (Cin). Cout and sum will form a two bit sum representing A + B + Cin.
Multiple adders can be cascaded together to perform n-bit addition.

Note: The logical representation of this adder is given

below. The inputs are A, B and Cin, and the output is
found by combining the bits C-out & S in this order.
Ex: Test the following values for A, B and C in the Full-Adder below:

INPUTS OUTPUTS
A B C-in C-out & Sum
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

Ex: Create a 1-Bit ALU (Arithmetic Logic Unit) with 4 functions: AND, OR, ADD, SUBTRACT (2’s Complement)

Section 4.5
Karnaugh maps (K-maps)

Logical circuitry of any machine is just an interconnected set of gates whose outputs are functions of only one input at a
time. As a general rule these circuits consist of (binary) n-inputs and m-outputs. These circuits may be represented in
three different formats:

(1) Truth tables

(2) Logical Gates (Gate circuitry)
(3) Boolean Algebraic equations

We have already seen all three of them separately. Given any form of the circuit we could derive the other two forms
with some effort. Just like the last example in the previous section we commonly need to simplify these circuits. The
simplification process in regular algebra is similar in B.A. We have already seen Algebraic simplification in the previous
section.
Although Algebraic simplification is possible it is very labor intensive and the solutions may not always appear simpler,
although many do. In this section we will implement a different simplification method called the K-map approach.
Karnaugh maps (K-maps, Minimization method)

K-map method of solving the logical expressions is referred to as the graphical technique of simplifying Boolean
expressions. K-maps are also referred to as 2D truth tables as each K-map is just a different way of representing the
values present in a one-dimensional truth table.
The process basically eliminates unwanted variables that would not impact the output of the function. In summary,
K-maps minimize the logical circuitry for Boolean functions. The diagram illustrates the relationship between the K-map
and the truth table for the general case of a two variable problem.

K-maps basically deal with the technique of inserting the values of the output variable in cells within a rectangle or
square grid according to a definite pattern. To simplify a logical expression with two inputs, we require a K-map with
four cells. A four-input logical expression would lead to a 16 celled-K-map, and so on. However it’s best used for a small
number of variables, up to 16. For larger expressions computer algorithms are normally used.
The values inside the squares are copied from the output column (F) of the truth table, therefore there is one square in
the map for every row in the truth table.

Around the edge of the K-map we find the values of the two input variables (A is on the top and B down the left side).
Here’s the Kmap for a two variable function, F(A,B):
The values around the edge of the map can be thought of as
coordinates. For example, the square on the top right hand
corner of the map in the above diagram has coordinates A=1
and B=0. This square corresponds to the row in the truth table
where A=1 and B=0 and F=1.

Note that the value in the F column represents a particular function that is represented by the K-map. The last column is
always the output, usually represented as either F or Q and it is never part of the K-map structure.

Here’s a K-map for a 3 variable function F(A,B,C). Since there can be at most 8 outputs there are 8 cells altogether. For 4
variables there would be 16 cells because there can be up to 16 possible outcomes. In general, 2n outcomes for n inputs
(We’ll use this design for our exams and homework)

̅ BC + ABC̅ . Although this function seems complicated it is

̅C + A
Ex: Consider the function: F(A, B, C) = ABC + AB
possible to simplify it. From a financial point it’s also advantageous to simplify such functions since invariably smaller
circuits will be cheaper to produce. The simplification process will produce the same logical circuit as the original one.
We call such a method a minimization method.
Important Note: The order of terms is not random. The terms
go 00, 01, 11 and 10. If you think in binary we might have
ordered terms in order 00, 01, 10, 11.

However, in a K-map terms are not arranged in numerical

sequence. This is so to ensure that crossing each horizontal or
vertical cell boundary will reflect a change of only one variable
at a time.
In the numerical sequence, the middle two terms, 01, and 10 differ by two variables, which is a violation of the K-map
structure. If we keep this structure then when only one variable changes we can eliminate that variable for the pair of
cells involved. (Simplification becomes easier with one variable change. That’s the essence of the K-map method)

̅C. The term on the right in the gray area of the map
The term on the left in the gray area of the map corresponds to AB
corresponds to ABC. So these two terms can be combined, as a product, to give: AC (B would be eliminated, we’ll see
how this is done later)

Each location in the K-map represents one minterm. A minterm is a product term of N variables. Once we have the
K-map, we group together adjacent cells or minterms that contain 1’s. Since only one variable changes from minterm to
minterm some simplification can occur.

Note: The simplification occurs by forming a product in each group within the K-map then adding all the reduced
products. In order to forms groups of the minterms we must follow the rules:

Groups of 1’s must be formed according to the rules:

- Groups may only include any cell containing a 1.
- Groups may be horizontal or vertical but not diagonal.
- Groups must contain only 2n cells, such as: 1, 2, 4, 8, … (Groups of size 3, 5, 6, 7, … are not allowed)
- Groups may overlap and wrap around if necessary.
- Larger groups must be done before smaller groups.
- There must be as few groups as possible, as long as this does not contradict any of the previous rules.
- Unused cells must be used before used cells.

Be sure to practice creating such groups as this tends to be difficult at first.

̅ BC. In the same manner we can find what every single cell
Ex: (a) Find what the cell with 1 on the first row represents: A
represents in a K-map. (b) Find the simplification of the last two 1’s on the second row: AC (c) Find the simplification of
the two 1’s on the 3rd column: BC. (d) Find each cell and then do an algebraic simplification. AB

̅ XY
Here’s a 4-variable example with F(W, X, Y, Z) in this order. The minterms are: W ̅Z̅ and W
̅ XY̅Z. Therefore the only
product term is W̅ XY̅ (After the minterms are ORed). Therefore the simplified function for this circuit is F(W,X,Y) = W
̅ XY
̅

For this group we OR both minterms, simplifying them by applying the

properties of Boolean Algebra:

̅ XY
W ̅Z̅ + W
̅ XY
̅Z = W
̅ XY
̅(Z + Z̅) = W
̅ XY
̅(1) = W
̅ XY
̅

Therefore the function produced by the K-map process is:

̅ XY
F(W, X, Y) = W ̅

Note: This has to be done for all groups found on the K-map. If there
were more groups the products would be ORed at the end.
Ex: Apply the rules above to find all the minterms and the correct groups for this mapping. Assume the function is
F(A,B,C,D) in this order. (A,B on the vertical ‘axis’ and CD on the horizontal)

1 1 0 1
0 1 0 0
1 1 0 0
1 1 0 1

Ex: (Important) Lets now create a K-map from a given truth table: (1st step → Convert truth table to a K-map)
Here’s the given truth table: (We will only use a 3 or 4 variable K-map)

A B C F 1st – Transfer the function or truth table to a K-map format (In this case the table was given)
0 0 0 0 2nd – Find all the minterms (The function of the cells with a 1) – There are 4 in this case
0 0 1 0 (All cells with 1’s in it)
0 1 0 0 3rd – Find the product terms for the K-map: (Must follow the rules above – There are 3 of
0 1 1 1
them)
1 0 0 0
4th – Find the sum of the products, SOP: That’s the simplified function produced by the K-map
1 0 1 1
1 1 0 1
1 1 1 1
BC
"00" "01" "11" "10"
"0" 0 0 1 0

A "1" 0 1 1 1

̅B
Ex: Produce a K-map for the function: F(A, B, C) = BC + AC + A ̅C̅

Note: When we are not given a truth table the work is not too different. We just have to produce the K-map from the
Boolean function before applying the process. If a variable is missing a term we must use both 0 and 1 as a possibility.

̅B
Ex 1) Find the simplified circuit for Z = F(A, B, C) = A ̅ C̅ + A
̅ BC + ABC̅ + AC

Note: For the purposes of exams, we will use the standard K-map
format which is:
(a) For 3 variables: A-row variable, BC-column variables
(b) For 4 variables: A,B-row variables, C,D-column variables

̅ B + BC̅ + AB
Ex 2) Z = F(A, B, C) = A ̅C̅ + BC

{ Largest cell in a 3 variable function }

 Note: It is common to represent Boolean functions for simplification using the K-map method as a sum of its minterms
instead of Truth tables or Algebraic format.

Here are two examples of functions, one with three and the other with four variables in summation format.
a. F(A,B, C) = ∑ 𝑚 (0, 3, 4, 6, 7)
b. F(A, B, C, D) = ∑ 𝑚 (1, 2, 4, 6, 9, 11, 12, 13, 15)

The numbers inside the summation symbol represent the one’s bit on the K-map (as example 2 above). For a 3-variable
K-map the numbers will go from 0 – 7, 7 being the largest value represented by the second row, third column. The
numerical values of the cells on the first row are: 0, 1, 3 and 2. On the second row they are: 4, 5, 7 and 6. Therefore for
the function in part (a) we could translate the sum as the K-map below:

"00" "01" "11" "10"

"0" 1 0 1 0

"1" 1 0 1 1

The same process is followed for functions with 4 variables. The numerical values of the cells on each row are:

Row 1: 0, 1, 3 and 2
Row 2: 4, 5, 7 and 6 The largest value on a 4 variable function is found on
Row 3: 8, 9, 11 and 10 the last row and third column. The value is 15.
Row 4: 12, 13, 15 and 14

The process to implement a MUX is similar. Consider the function, F(A,B,C) = BC + AC + A ̅B̅C̅. This represents a 4X1
MUX with 3 variables. Let A be the input and B, C the select lines. (This is usual classification). Create a Kmap for the
function above but using a standing up Kmap (See below).

Input A
0 1

00 1 0 ̅
𝐀 ̅
𝐀
Select Lines
01 0 1 A A 4X1 MUX
B, C → F(A,B,C)
11 1 1 1 1 Logical MUX

10 0 0 0 0

B C