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Coa 7

The document discusses a quiz assignment for a computer organization and architecture course. It provides 9 multiple choice questions about topics like instruction set, addressing modes, and processor structure and functions. The questions test student understanding of key concepts in computer design and organization.

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YASH BAJPAI
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0% found this document useful (0 votes)
68 views

Coa 7

The document discusses a quiz assignment for a computer organization and architecture course. It provides 9 multiple choice questions about topics like instruction set, addressing modes, and processor structure and functions. The questions test student understanding of key concepts in computer design and organization.

Uploaded by

YASH BAJPAI
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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SASTRA » Computer Organization & Architecture

Unit 2 - Principles of Computer Design

Course outline
Quiz assignment 7
Introduction The due date for submitting this assignment has passed.
to Due on 2022-12-11, 23:59 IST.
Computer
Organization Assignment submitted on 2022-11-05, 21:10 IST
 ()
1) Instruction is coded in ----- language 1 point

Binary
Principles
Decimal
of
Hexa decimal
Computer
assembly
 Design ()
Yes, the answer is correct.
L 2.1 Score: 1
Instruction Accepted Answers:
Binary
Set
Characteristics
2) Instruction cycle begins with ------ and end with -------- 1 point
and
functions Instruction Address Calculation, Operand store
(unit? Instruction Decoding, Interrupt checking
unit=29&lesson=30) Instruction Fetch, Instruction Address Calculation
Instruction Fetch, Operand store
Quiz: Quiz
No, the answer is incorrect.
assignment 7 Score: 0
(assessment? Accepted Answers:
name=89) Instruction Address Calculation, Operand store

L 2.1 -part 2 - 3) The content of PC cannot be ------ 1 point


Instruction
Set - Types of Branch address

operations Interrupt address

(unit? Next instruction address

unit=29&lesson=31) Operand address


No, the answer is incorrect.
L2.2 - Score: 0
Addressing Accepted Answers:
modes (unit? Operand address
unit=29&lesson=32) 4) A simple instruction has 4 bits for opcode, 6 bits for source operand and 6 bits 1 point
L 2.3: for destination operand and no bit(s) is(are) reserved for future enhancement. It implies that
the processor can perform ----- different operations. Pick the suitable one from the options
Instruction
Formats 12.0
(unit? 18.0
unit=29&lesson=33) 20.0
7.0
Quiz: Quiz
assignment 8 Yes, the answer is correct.
Score: 1
(assessment?
Accepted Answers:
name=90) 12.0

L 2.4 P1
5) The instruction "jump to the address 0x4000" will come under ------ type of 1 point
Processor
instruction
structure and
functions Control
(unit? Movement
unit=29&lesson=34) Processing
Storate
L2.4 P2 -
No, the answer is incorrect.
Pipelining
Score: 0
(unit? Accepted Answers:
unit=29&lesson=35) Control

L2.4 P3 -
6) "Pushing the accumulator content on top of the stack" instruction is an example 1 point
Pipelining for ---- address instruction when ----- is not present in the instruction
Hazards
(unit? 0,accumulator
unit=29&lesson=36) 0,top of the stack
1,accumulator
Quiz: Quiz 1,top of the stack
assignment 9
No, the answer is incorrect.
(assessment? Score: 0
name=80) Accepted Answers:
0,accumulator
L2.5 RISC &
CISC (unit? 7) The packed BCD 11000011 is equal to -------- 1 point
unit=29&lesson=37)
(+195)
L2.6 Parallel (+3)
Processing: (-3)
MultipleProcessor (-61)
organization-
No, the answer is incorrect.
P1 (unit? Score: 0
unit=29&lesson=38) Accepted Answers:
(+3)
L2.6 Parallel
Processing: 8) The decimal value for the given EBCDIC ------- is ----- and its ASCII value is --- 2 points
MultipleProcessor ------
organization- 10110011,3,1111011
P2 (unit? 11110011,3,0110011
unit=29&lesson=39) 11110101,3,0110011
1111011,5,0110101
L2.7 Increase
in Yes, the answer is correct.
Score: 2
parallelism-
Accepted Answers:
P1 (unit? 11110011,3,0110011
unit=29&lesson=40)
9) Instruction set has collection of all ----------. 1 point
L2.7 Increase
Instructions
in
Instructions and addressing modes
parallelism-
Instructions and operands
P2 (unit?
Instructions, addresses and operands
unit=29&lesson=41)
No, the answer is incorrect.
L2.8 GPU vs. Score: 0
CPU (unit? Accepted Answers:
Instructions
unit=29&lesson=42)

Quiz: Quiz
assignment
10
(assessment?
name=92)

Storage &
 Memory ()

I/O
Processing
Functions   
 ()

Hardware
Interfacing
Issues   
 ()

Introduction
to the
 course ()
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