JSS Mahavidyapeetha

Sri Jayachamarajendra College of Engineering, Mysore 570 006

An Autonomous Institution Affiliated to
Visvesvaraya Technological University (VTU), Belgaum

Design and Testing of Zero Voltage Transition Synchronous

Buck Converter

Thesis submitted in partial fulfillment of the curriculum prescribed for the

award of the degree of Bachelor of Engineering in Electrical and
Electronics Engineering by

4JC11EE001 Aaron Elphinstone Wahlang

4JC11EE013 Boston Shullai
4JC11EE053 H Shreyas
4JC11EE065 Thirumalesh H S
4JC11EE067 Rajath Kashyap S

Under the Guidance of

R S Ananda Murthy
Associate Professor and Head
Department of E&EE, SJCE, Mysore

Sponsored by
LIFE Electronics, Bangalore

DEPT. OF ELECTRICAL & ELECTRONICS ENGINEERING

May, 2015
 JSS Mahavidyapeetha
Sri Jayachamarajendra College of Engineering, Mysore 570 006
An Autonomous Institution Affiliated to
Visvesvaraya Technological University (VTU), Belgaum

Certificate
This is to certify that the work entitled Design and Testing of Zero Voltage Transi-
tion Synchronous Buck Converter is a bonafide work carried out by Aaron Elphinstone
Wahlang, Boston Shullai, H Shreyas, Thirumalesh H S and Rajath Kashyap S in partial ful-
fillment of the award of the degree of Bachelor of Engineering in Electrical and Electronics
Engineering of Visvesvaraya Technological University, Belgaum, during the year 2015. It
is certified that all corrections / suggestions indicated during CIE have been incorporated in
the report. The project report has been approved as it satisfies the academic requirements
in respect of the project work prescribed for the Bachelor of Engineering Degree.

Guide & Head of the Department

R S Ananda Murthy
Associate Professor
Department of E&EE
SJCE, Mysore 570 006

Examiners : 1._____________________________

2._____________________________
Date :
Place : Mysore 3._____________________________
Abstract

The objective of this project is to design and test a high frequency Zero Voltage Transition PWM
Synchronous buck converter which operates at low output voltage with an efficiency greater than
95%. In conventional PWM buck converters, the operating frequency of the switches is less than
50 kHz. This increases the size of filter capacitors and inductors, making the circuit bulky. During
switching there will be switching power losses in such converters due to presence of both volt-
age across and current through the devices, reducing the overall efficiency of the converter. In this
project, the switching losses in the power semiconducting devices is considerably reduced by adopt-
ing soft switching techniques and operating the switches at a high frequency of about 200 kHz. A
new passive auxiliary circuit consisting of a resonant inductor and a resonant capacitor is employed
across the main switch allowing it to turn ON under Zero Voltage Switching(ZVS). The auxiliary
switch is turned OFF under Zero Current Switching(ZCS). This is done to reduce the power losses
in the main switch and the auxiliary switch during switching transitions.
In order to maintain continuous load current, a freewheeling switch is employed in the output
circuit. The power loss in this switch is reduced by turning it ON in ZVS mode. MOSFETs(IRFZ44)
are used as power semiconducting switches in this project. For triggering the MOSFETs, TL494
PWM Control IC is used to generate the required PWM signal at a high frequency of about 200
kHz. The switches are operated at higher frequencies to reduce the size of inductors and capacitors
used in the circuit so that the overall size of the circuit is reduced. This project finds its applications
in the field of low voltage power supply in embedded systems, battery charging, laptops, mobiles,
etc, where battery backup is the key issue.

Keywords :
High Frequency, Buck Converter, Soft Switching, ZVS(Zero Voltage Switching) , ZCS(Zero Cur-
rent Switching), PWM, MOSFETs(IRFZ44), TL494 IC.
Acknowledgement

Firstly, we would like to thank our guide and mentor Sri R S Ananda Murthy for all of his help
to complete this project. His guidance gave shape and structure to our work. Also, his teaching
greatly improved our knowledge in the field of Power Electronics. We truly appreciate all of his
time and help. We would also like to thank Sri Ramesh Kumthekar and Sri M C Ganapathy of LIFE
Electronics, Bangalore for providing us the electronic components required to complete this project.

ii
Contents

Contents iii

List of Figures v

List of Tables vii

1 Introduction 1
1.1 Brief Introduction to Power Electronics . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Objective of the Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2 DC-DC Converters 3
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Principle of Step-Down Operation . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3 Types of DC-DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.4 Conventional Buck Converter and its Drawbacks . . . . . . . . . . . . . . . . . . 6

3 Power Devices Switching Techniques 7

3.1 Hard Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Soft Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3 Types of Soft Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Zero Voltage Switching (ZVS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Zero Current Switching (ZCS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Analysis and Design of Power Circuit 11

4.1 Circuit of ZVT Synchronous Buck Converter . . . . . . . . . . . . . . . . . . . . 11
4.2 Operating Modes and Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Theoretical Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Mode 1 ( t0 , t1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Mode 2 ( t1 , t2 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Mode 3 ( t2, t3 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Mode 4 ( t3 , t4 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Mode 5 ( t4 , t5 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

iii
Contents iv

Mode 6 ( t5 , t6 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Mode 7 ( t6 , t7 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Mode 8 ( t7 , t8 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3 Design Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.4 Specifications of the Synchronous ZVS Buck Converter . . . . . . . . . . . . . . . 22
4.5 Ratings of Power Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
IRFZ44N MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
BA159 Schottky Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5 Control Circuit 28
5.1 Introduction to TL494 PWM Control IC . . . . . . . . . . . . . . . . . . . . . . . 28
5.2 Pinout configuration of TL494 IC . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3 Functional Block Diagram of TL494 IC . . . . . . . . . . . . . . . . . . . . . . . 30
5-V Reference Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Output-Control Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Error Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Feedback PWM Comparator Input . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Dead Time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Output Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4 Recommended Operating Conditions of TL494 IC . . . . . . . . . . . . . . . . . . 33
5.5 PWM Signal Generation Control Circuit . . . . . . . . . . . . . . . . . . . . . . . 34

6 Experimental Results 36
6.1 Testing the Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Generation of PWM signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
PWM Signal for Auxiliary Switch S1 . . . . . . . . . . . . . . . . . . . . . . . . 37
PWM Signal for Main Switch S . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
PWM Signal for Free-wheeling Switch S2 . . . . . . . . . . . . . . . . . . . . . . 38
Dead-time between S and S2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.2 Testing of Power Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Bibliography 40
List of Figures

1.1 Block Diagram of Power Electronic System . . . . . . . . . . . . . . . . . . . . . . . 1

2.1 Circuit for basic step-down operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2.2 Waveforms for step down operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Conventional Buck Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.1 Hard Switching Characteristics of a MOSFET . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Soft Switching Characteristics of a MOSFET . . . . . . . . . . . . . . . . . . . . . . 8
3.3 Zero Voltage Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.4 ZVS - Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5 Zero Current Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.6 ZCS - Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1 Power Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.2 Waveforms of different parameters of Synchronous Buck Converter . . . . . . . . . . 12
4.3 Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4 Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5 Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6 Mode 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.7 Mode 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.8 Mode 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.9 Mode 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.10 Mode 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.11 Power Circuit View 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.12 Power Circuit View 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 Pinout of TL494 IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.2 Functional Block Diagram of TL494 PWM Control IC . . . . . . . . . . . . . . . . . 30
5.3 Oscillator Frequency vs Timing Resistance . . . . . . . . . . . . . . . . . . . . . . . 31
5.4 Generation of PWM Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5 Configuration of Output Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.6 Control Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.7 Master / Slave Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

v
List of Figures vi

5.8 Designed Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.1 Comparison Between Modulating and Carrier Signal . . . . . . . . . . . . . . . . . . 36

6.2 PWM Signal for S1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.3 PWM Signal for S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.4 PWM Signal for S2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.5 Dead-time between S and S2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.6 Input and Output Voltages of Power Circuit . . . . . . . . . . . . . . . . . . . . . . . 39
List of Tables

4.1 Absolute Ratings of IRFZ44N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.2 Thermal Resistance of IRFZ44N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.3 Source-Drain Ratings and Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26

5.1 Pinout Description of TL494 IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.2 Output modes for different values of OUTPUT CTRL of TL494 IC . . . . . . . . . . . 31
5.3 Recommended Operating Conditions of TL494 IC . . . . . . . . . . . . . . . . . . . . 33

vii
Nomenclature

Co Filter Capacitance

Cr Resonant Capacitance

f Switching Frequency

fosc Oscillator Frequency

k Duty cycle

Lo Filter Inductance

Lr Resonant Inductance

T Switching time period

Va Average output voltage

Vi Input Voltage

Vor RMS Output Voltage

MOSFET Metal Oxide Semiconductor Field Effect Transistor

PWM Pulse Width Modulation

S Main Switch

S1 Auxiliary Switch

S2 Freewheeling Switch

ZCS Zero Current Switching

ZVS Zero Voltage Switching

viii
Chapter 1

Introduction

1.1 Brief Introduction to Power Electronics

Electrical energy demands are ever-increasing in order to improve the standard of living. Power
electronics is the technology associated with efficient conversion and control of electric power by
using power semiconductor devices. It aids in efficient utilization of electrical energy. Power elec-
tronics encompasses the use of electronic components, the application of circuit theory and design
techniques, and the development of analytical tools toward efficient electronic conversion, control,
and conditioning of electric power. Definition given by IEEE Power Electronics Society .
A basic Power Electronic system consists of the electrical energy source, power converter, con-
trol circuit, and electrical load. The electrical energy source provides the input energy and the load
uses that energy to perform the desired task. The load can be anything from a motor to a micropro-
cessor or a combination of electrical and electronic components.

Power
Electrical Electrical
Electronic
Energy
Source Circuit Load

Control
Circuit

Figure 1.1: Block Diagram of Power Electronic System

Because of the increased advantages in the field of Power Electronics, it is extensively being
used in industrial automation, energy conservation and environmental pollution control. Also the
efficiency of Power Electronic devices are increasing along with a reduction in their cost. As a
result, its applications are ever increasing in industrial, commercial, residential, utility, aerospace

1
Chapter 1. Introduction 2

and military systems, etc. Modern industrial processes and energy systems benefit tremendously in
productivity and quality enhancement with the help of Power Electronics. Even though these have
a relatively higher initial investment, the energy saved in the long run provides adequate economic
benefits to the user. There is also the benefit of controlling environmental pollution because of
reduced power losses.

1.2 Objective of the Project

The objective of this project is to design and test a high frequency Zero Voltage Transition PWM
Synchronous Buck converter which operates at low output voltage with an efficiency greater than
95%. The switching losses in the power semiconducting devices are to be reduced by adopting soft
switching techniques. The switches are operated at a high frequency of about 200 kHz. As a result,
the sizes of filter capacitor and inductor used in the power circuit are reduced, thus increasing the
power density of the converter.
Chapter 2

DC-DC Converters

2.1 Introduction
In many industrial applications, fixed voltage dc sources have to be converted into variable voltage
dc sources. This can be accomplished by using a dc-dc converter or a chopper. It can be considered
as a dc equivalent to an ac transformer with a continuously variable turns ratio. Like a transformer,
it can be used to step down or step up a dc voltage source.
DC converters find applications in various fields. They can be used for traction control of motor
in electric automobiles, trolley cars, mine haulers, etc. They provide smooth acceleration control,
high efficiency and fast dynamic response. They can also be used in regenerative breaking of dc
motors to return energy back into the supply, and this feature results in energy savings for trans-
portation systems with frequent stops. DC converters are used in dc voltage regulators and are
also used in conjunction with an inductor to generate a dc current source, especially for the current
source inverter.

2.2 Principle of Step-Down Operation

Figure 2.1: Circuit for basic step-down operation

The basic principle of step down operation can be explained by the circuit shown in Figure 2.1.
Vi is the input supply voltage. S is the converter switch. The converter switch can be implemented

3
Chapter 2. DC-DC Converters 4

by using a power Bipolar Junction Transistor (BJT), power Metal Oxide Semiconductor Field-Effect
Transistor (MOSFET), Gate Turn Off Thyristor (GTO) or Insulated Gate Bipolar Transistor (IGBT).
The practical switches have a finite ON state voltage drop ranging from 0.5 to 2 V. For simplicity,
assume a resistive load R. When switch S is closed for a time t1 , the input voltage Vi appears across
the load. If the switch remains OFF for a time t2 , the voltage across the load is zero. The waveform
for the output voltage and load current are shown in Figure 2.2

Figure 2.2: Waveforms for step down operation

The average output voltage is given by

ˆ t1
1 t1
Va = v0 dt = ·Vi = f·t1 ·Vi = k·Vi (2.1)
T 0 T
where,
T is the chopping period
t1
k = is the duty cycle of chopper
T
f is the chopping frequency.
And the average load current is given by,
Va k ·Vi
Ia = = (2.2)
R R
The rms value of output voltage is found from
v
u ˆ
u kT
u1 √
Vor = t v2o dt = k ·Vi (2.3)
T
0

Assuming a lossless converter, the input power to the converter is the same as the output power
and is given by
ˆ kT ˆ kT
1 1 v20 V2
Pi = v0 ·idt = dt = k· i (2.4)
T 0 T 0 R R
Chapter 2. DC-DC Converters 5

The effective input resistance seen by the source is

Vi Vi R
Ri = = = (2.5)
Ia k ·Vi k
R
R
which indicates that the converter makes the input resistance Ri as a variable resistance of .
k
The duty cycle k can be varied from 0 to 1 by varying t1 , T , or f . Therefore, the output voltage
Vo can be varied from 0 to Vi by controlling k, and the power flow can be controlled.

1. Constant-frequency operation: The converter, or switching, frequency f (or chopping period

T ) is kept constant and the on-time t1 is varied. The width of the pulse is varied and this type
of control is known as pulse width modulation (PWM) control.

2. Variable-frequency operation: The chopping, or switching, frequency f is varied. Either on-

time t1 or off-time t2 is kept constant. This is called frequency modulation. The frequency has
to be varied over a wide range to obtain the full output voltage range. This type of control
would generate harmonics at unpredictable frequencies and the filter design would be difficult.

2.3 Types of DC-DC Converter

There are four types of dc-dc converters.

1. Buck Converter
In a buck regulator the average output voltage Va is less than the input voltage Vi . It requires
di
only one transistor, is simple and has high efficiency greater than 90%. The of the load
dt
current is limited by inductor L. However, the input current is discontinuous and a soothing
input filter is normally required. It provides one polarity of output voltage and unidirectional
output current.

2. Boost Converter
In a boost converter, the output voltage is greater than the input voltage. A boost regulator
can step up the output voltage without a transformer. Due to a single transistor it has a high
efficiency. The input current is continuous. However, a high peak current has to flow through
the power transistor. The output voltage is very sensitive to changes in duty cycle k and it
might be difficult to stabilize the regulator. The average output current is less than the average
inductor current by a factor of (1-k), and a much higher rms current would flow through the
filter capacitor, resulting in the use of a larger filter capacitor and a larger inductor than those
of a buck converter.

3. Buck-Boost Converter
A buck-boost converter provides an output voltage that may be less than or greater than the
input voltage. The output voltage polarity is opposite to that of the input voltage. It is also
known as an inverting regulator. The output voltage is reversed without the use of transformer.
It has a high efficiency.
Chapter 2. DC-DC Converters 6

4. Cuk Converter
The Cuk Converter provides an output voltage that is less than or greater than the input volt-
age, but the output voltage polarity is opposite that of the input voltage. It is based on the
capacitor energy transfer. As a result, the input current is continuous. The circuit has low
switching losses and has high efficiency.

2.4 Conventional Buck Converter and its Drawbacks

VL
iL
s L
D
Vi VD C R V0

Figure 2.3: Conventional Buck Converter

As described earlier a conventional buck converter is used to obtain an output voltage which
is less than the supply voltage. In this day and age with the development of wireless portable
devices such as laptops, phones etc, a need arises to develop a power circuit which can supply a
power in the range of 3 - 3.5 V with an efficiency greater than 90 %. Conventional buck converters
consist of a dc supply voltage followed by a switch. The switch employed may be a Metal Oxide
Semiconductor Field Effect Transistor (MOSFET), Bipolar Junction Transistor (BJT), Gate Turn
Off (GTO) thyristor and Insulated Gate Bipolar Transistor (IGBT). These switches are employed
as they can be controlled to obtain the desired turn OFF and turn ON time. A diode is connected
in parallel with the filter circuit to provide a closed path for the current to flow through the load
even when the main switch is OFF thus conserving the magnetic energy stored in the inductor Lo .
The buck converter consist of an inductor and a capacitor which form the filter circuit. The filter
inductor circuit is used to reduce the ripples present in the output current.The filter capacitor is used
to reduce the ripple in the output voltage. The output voltage is measured across the resistor R.
The major drawback of conventional buck converters is that there is a high switching loss due
to which their efficiency is low. They cannot operate at high frequencies, thus increasing the sizes
of L and C used in the circuit. This makes the circuit bulky and affects its portability. Due to this
the power density of the conventional buck converter is low. Moreover, the circuit is affected by
switched mode spiking, ringing as well as EMI (Electro Magnetic Interference).
Chapter 3

Power Devices Switching Techniques

3.1 Hard Switching

Hard switching techniques are employed in conventional buck converters. Here, simultaneous con-
duction of current and voltage takes place causing significant switching losses, thus decreasing the
efficiency of the converter. Since switching frequency is directly proportional to switching losses, it
is kept low while employing hard switching techniques. Due to this, there is an increase in the size
of the inductors and capacitors used. The voltage and current stresses on the device also increase
which may lead to an increase in the temperature of the device, ultimately causing a breakdown.
Other problems faced in hard switching are switch mode spiking and ringing, EMI and gate driver
corruption.
When the switch is turned ON, the voltage across it decreases and the current flowing through
it increases resulting in some switching losses. Similarly, losses are incurred when the switch is
turned OFF, the current through the switch decreases and the voltage across its terminals increases.
Figure 3.1 shows the turn ON and turn OFF characteristics of a MOSFET employing hard switching
technique.
V ds Id

Switching losses due to transition between current and voltage

Figure 3.1: Hard Switching Characteristics of a MOSFET

3.2 Soft Switching

Soft switching techniques can be used to minimize the switching losses and EMI. In this technique,
the device is turned ON or OFF when either the voltage or the current is zero. Due to this, the

7
Chapter 3. Power Devices Switching Techniques 8

product of voltage and current is zero resulting in zero power loss. As a result the switches can
be operated at higher frequencies. Thus, the size and weight of the capacitors and inductors used
are reduced. The size and weight of the device are also reduced because the requirement of heat
sinks is eliminated. Using this technique, it is possible to increase the efficiency of the converter
beyond 95%. The proposed converter employs MOSFETs as switching devices. Their low ON state
resistance is low which results in a lower ON state voltage drop. Also, they can operate at very high
frequencies. MOSFETs are triggered or turned ON by providing an input gate voltage VGS greater
than the threshold voltage VT , which is the minimum voltage required for a MOSFET to be turned
ON.
Figure 3.2 shows the turn ON and turn OFF characteristics of a MOSFET employing soft switch-
ing technique.
Vds Id

ZVS ZCS

Figure 3.2: Soft Switching Characteristics of a MOSFET

3.3 Types of Soft Switching

Soft Switching can be classified into two types:
1. Zero Voltage Switching (ZVS)
2. Zero Current Switching (ZCS)

Zero Voltage Switching (ZVS)

In ZVS technique the switch is either turned ON or OFF after making the voltage across it drop to
zero.

Voltage curve
amplitude

Conventional
ON ZVS Switching

Current curve

time

Figure 3.3: Zero Voltage Switching

Chapter 3. Power Devices Switching Techniques 9

In this technique, a capacitor and a diode are connected in parallel with the switch as shown in
figure 3.4.

DRAIN

GATE +
V
GS

-
SOURCE
Figure 3.4: ZVS - Operation

1. Turn ON: The voltage across the switch is brought to zero before the gate voltage is applied.
This facilitates an ideal, zero loss turn ON of the switch.

2. Turn OFF: The presence of the parallel capacitor prevents a sudden rise in the voltage across
the switch once it is turned OFF. Thus, the parallel capacitor acts like a loss-less snubber,
facilitating a low loss turn OFF of the switch.

Zero Current Switching (ZCS)

In ZCS technique the semiconductor switch is turned ON or OFF only after the current flowing
through it is made zero.

Conventional ZCS Switching

OFF
amplitude

Current curve

Voltage curve

time

Figure 3.5: Zero Current Switching

In this technique, an inductor and a diode are connected in series with the switch as shown in
figure 3.6.
Chapter 3. Power Devices Switching Techniques 10

DRAIN

GATE
+

V
GS

-
SOURCE
Figure 3.6: ZCS - Operation

1. Turn ON: The presence of the series inductor prevents a sudden rise in the current through the
switch once it is turned ON. Thus, the series inductor acts like a loss-less snubber, facilitating
a low loss turn ON of the switch.

2. Turn OFF: The current flowing through the switch is brought to zero before the gate voltage
is removed. This facilitates an ideal, zero loss turn OFF of the switch.
Chapter 4

Analysis and Design of Power Circuit

4.1 Circuit of ZVT Synchronous Buck Converter

The power circuit consists of a DC Voltage supply (battery, solar panel, etc), a load (battery charging,
embedded systems), 3 IRFZ44L MOSFETS ( Switches S1 , S2 , S), filter components( Lo , Co ), an
BA159 HY Schottky diode and resonant components (Lr , Cr ). Each MOSFET has an integrated body
diode. This diode is used to discharge the capacitance between the gate and source of the MOSFET
when it is turned OFF. It also makes the MOSFET a bidirectional switch. The filter components Lo
and Co are used to reduce ripple current and ripple voltage respectively. The presence of resonant
components Lr and Cr ensures that impedance is low under resonance, thus a higher current flows
through the load, which is suitable for higher current applications. The Schottky diode is used to
provide a path for capacitance Cr to discharge; normal diodes cannot be used as they cannot operate
at high frequencies. Switch S2 is turned ON in ZVS and turned OFF in ZCS. Switch S is turned ON
in ZVS. S1 is turned OFF in ZCS. The freewheeling switch S2 ensures that current flows through the
load even when the main switch S is OFF, thus conserving the magnetic energy stored in inductor
Lo . The auxiliary switch S1 provides a path for Cs to discharge. Only after this can the main switch
S be turned ON.

Cs

Lo

s
L

Lr Cr
Co O
A v
o
vi +
- s1 s2 D

DS

Figure 4.1: Power Circuit Diagram

11
Chapter 4. Analysis and Design of Power Circuit 12

4.2 Operating Modes and Analysis

The 8 modes of operation of the converter are explained with the help of the typical waveforms
given below. The characteristics of each parameter and their operation in each mode are explained.
The equations for each parameter have been derived.

Theoretical Waveforms
Theoretical waveforms include all the parameters of the converter such as the voltage across and
current through the individual switches(S, S1 and S2 ), resonant inductor (Lr ) and resonant capacitor
(Cr ). The waveforms are sketched for one switching cycle and aid in explaining all eight modes of
operation.

S1

S2

iLr

iS1 Io

VCr

V
i

VS
V
i

iS
Io

VS1 V
i

VS2
V
i

iS2 Io

iDS Io
t0 t1 t2 t3 t4 t5 t6 t7 t8

Figure 4.2: Waveforms of different parameters of Synchronous Buck Converter

Chapter 4. Analysis and Design of Power Circuit 13

Modes of Operation
Assumptions made during analysis

• The output inductor, Lo is considered to be very large. As a result, it acts as a constant current
source of value Io .

• The converter is assumed to be a time invariant system.

Mode 1 ( t0 , t1 )
Lo

Lr Cr
Co O
A v
o
vi +
- s1 s2 D

Figure 4.3: Mode 1

Prior to t = t0 , the body diode of S2 conducts. The main switch S and auxiliary switch S1 are
turned OFF . At t = t0 , the auxiliary switch S1 is turned ON using ZCS as it is in series with the
resonant inductor Lr . The current through resonant inductor Lr and resonant capacitor Cr rise at the
same rate as the current flowing through S2 falls. Resonance occurs between Lr and Cr during this
mode. Values of Lr and Cr are chosen such that, the resonant frequency is close to the switching
frequency of the converter. The operation in this mode ends at t = t1 , when ILr reaches Io and IS2 falls
to zero. As a result, the body diode of S2 stops conducting. The voltage and current expressions
which govern this circuit mode are given below:

ID = Io - ILr

Using KVL,

Vi 1
= ILr (s) {s·Lr + } (4.1)
s s ·Cr

1
s2 + ( √ )2
Vi Lr ·Cr
= Lr · ILr (s){ } (4.2)
s s
Chapter 4. Analysis and Design of Power Circuit 14

Vi s
ILr (s) = · (4.3)
Lr 1
s2 + ( √ )2
Lr ·Cr
√
L C
√ r· r
Vi Lr·Cr
ILr (s) = · (4.4)
Lr 2 1
s +(√ )2
Lr·Cr
1
√
Vi Lr·Cr
ILr (s) = r · (4.5)
Lr s2 + ( √ 1 )2
Cr Lr·Cr
r
Lr 1
But, Z = and ω = √
Cr Lr·Cr

Taking Inverse Laplace Transform,

Vi
iLr (t) = · sinωt (4.6)
Z
For a time invariant system,
Vi
iLr (t-t0 ) = · sinω(t-t0 ) (4.7)
Z
At t = t1 ,
iLr (t1 - t0 ) = Io (4.8)

iD(S2 ) = 0 (4.9)

Vi
Io = · sinω(t1 - t0 ) (4.10)
Z

1 Io · Z
(t1 - t0 ) = · sin−1 ( ) (4.11)
ω Vi

VCr (t1 - t0 ) = VCr1 (4.12)

Chapter 4. Analysis and Design of Power Circuit 15

Mode 2 ( t1 , t2 )
Lo

Lr Cr
Co O
A v
o
vi +
- s1 s2 D

Figure 4.4: Mode 2

In this mode Lr and Cr continue to resonate. At t1 , the synchronous switch S2 is turned ON

under ZVS condition. When iLr reaches its maximum value i.e. iLr(max) , switch S2 is turned OFF
under ZVS condition.

iS2 = iLr - Io (4.13)

Using KVL, ˆ t
d 1
Vi = Lr · iLr + iLr dt + VCr1 (4.14)
dt Cr 0
In the s domain,
Vi 1 VC
= Lr {s·ILr -Io } + · ILr + r1 (4.15)
s s ·Cr s

1 Vi −VCr1
ILr (s){s·ILr + }= + Io · Lr (4.16)
s ·Cr s

1
s2 + ( √ )2
Lr·Cr Vi −VCr1
Lr· ILr (s){ }= + Io · Lr (4.17)
s s

Vi −VCr1 s s
ILr (s) = · + Io · (4.18)
s · Lr 1 1
s2 + ( √ )2 s2 + ( √ )2
Lr ·Cr Lr ·Cr
1
√
Vi −VC Lr ·Cr s
ILr (s) = r r1 · + Io · (4.19)
Lr 1 1
s2 + ( √ )2 s2 + ( √ )2
Cr Lr ·Cr Lr ·Cr
Taking Inverse Laplace Transform,
Vi −VCr1
iLr (t) = · sinωt + Io · cosωt (4.20)
Z
Chapter 4. Analysis and Design of Power Circuit 16

Vi −VCr1
iLr (t - t1 ) = · sinω(t - t1 ) + Io · cosω(t - t1 ) (4.21)
Z
at t = t2 ,
iLr (t2 -t1 ) = ILr(max) (4.22)

1 Vi −VCr1
t12 = tan−1 ( ) (4.23)
ω Io · Z

VCr (t2 -t1 ) = VCr2 (4.24)

Mode 3 ( t2, t3 )
Lo

s
L

Lr Cr
Co O
A v
o
vi +
- s1 D

Figure 4.5: Mode 3

At t2 , iLr reaches its peak value iLr(max) . Since the value of iLr is greater than load current Io , the
capacitor CS will be charged and discharged through the body diode of main switch S, which leads
to conduction of body diode. This mode ends when resonant current iLr falls to load current Io . So
current through body diode of main switch S becomes zero which turns OFF the body diode. At the
same time the main switch S is turned on under ZVS. The voltage and current expressions for this
mode are given below:
Using KVL,
ˆ t
d 1
Lr · iLr + iLr dt + VCr2 = 0 (4.25)
dt Cr 0
In the s domain,
ILr (s) VCr2
Lr [s·ILr (s) - ILr(max) ] + + =0 (4.26)
s ·Cr s

1
s2 + ( √ )2
Lr ·Cr VC
ILr (s)·Lr [ ] = - r2 + Lr · ILr(max) (4.27)
s s
Chapter 4. Analysis and Design of Power Circuit 17

VCr2 s s
ILr (s) = - · + ILr(max) · (4.28)
s · Lr 1 1
s2 + ( √ )2 s2 + ( √ )2
Lr ·Cr Lr ·Cr
1
√
VCr2 Lr ·Cr s
ILr (s) = - r · + ILr(max) · (4.29)
Lr s2 + ( √ 1 )2 s2 + ( √
1
)2
Cr L r ·Cr L r ·Cr

Taking Inverse Laplace Transform,

VCr2
iLr (t) = - · sinωt + ILr(max) · cosωt (4.30)
Z

VCr2
iLr2 (t - t2 ) = - · sinω(t-t2 ) + ILr(max) · cosω(t - t2 ) (4.31)
Z
at t = t3 ,
iLr (t3 - t2 ) = Io (4.32)

VCr (t3 - t2 ) = VCr3 (4.33)

1 ILr(max) · Z
(t3 - t2 ) = ·[tan−1 ( ) - sin−1 (Io )] (4.34)
ω VCr2

Mode 4 ( t3 , t4 )
Lo

s
L

Lr Cr
Co O
A v
o
vi +
- s1 D

Figure 4.6: Mode 4

At t3 , the main switch S is turned ON using ZVS. During this stage the growth rate of current
through main switch iS is determined by the resonance between Lr and Cr . The resonant process
continues in this mode and the current iLr continue to decrease. Switch S1 can be turned OFF with
ZCS when iLr falls to zero. The voltage and current expressions for this mode are given below.
Using KVL, ˆ t
d 1
Lr · iLr + iLr dt + VCr3 = 0 (4.35)
dt Cr 0
Chapter 4. Analysis and Design of Power Circuit 18

In the s domain,
1 VC
Lr [s·ILr (s) - Io ] + (ILr (s)) + r3 = 0 (4.36)
s ·Cr s

1
s2 + ( √ )2
Lr ·Cr VC
ILr (s)·Lr { } = - r3 + Lr · Io (4.37)
s s

1
√
VC Lr ·Cr s
ILr (s) = - r r3 · + Io · (4.38)
L r s2 + ( √ 1 1
)2 s2 + ( √ )2
Cr L r ·Cr L r ·Cr

Taking Inverse Laplace Transform,

VCr3
iLr (t) = - · sinωt + Io cosωt (4.39)
Z

VCr3
iLr (t - t3 ) = - · sinω(t - t3 ) + Io cosω(t - t3 ) (4.40)
Z
at t = t4 ,
iLr = 0 (4.41)

Io · Z
tanω(t4 - t3 ) = (4.42)
VCr3

1 Io · Z
(t4 - t3 ) = · tan−1 ( ) (4.43)
ω VCr3

VCr (t4 ) = VCr(max) (4.44)

Mode 5 ( t4 , t5 )
Lo

s
L

s1 Lr Cr
Co O
A v
o
vi +
-
D

Figure 4.7: Mode 5

At t4 , the auxiliary switch S1 is turned OFF using ZCS. The body diode of S1 begins to conduct
due to resonant capacitor Cr which starts to discharge through the Schottky diode DS . The resonant
Chapter 4. Analysis and Design of Power Circuit 19

current iLr rises in the reverse direction, reaches a maximum negative value and increases to zero.
At this moment the body diode of S1 is turned OFF. The voltage and current equations for this mode
are given below.
Using KVL, ˆ t
d 1
Lr · iLr + iLr dt + VCr(max) = 0 (4.45)
dt Cr 0
In the s domain,
1 VCr(max)
Lr [s·ILr (s) - 0] + ILr (s) + =0 (4.46)
s ·Cr s

1
s2 + ( √ )2 VCr(max)
Lr ·Cr
ILr (s)·Lr ·{ }=- (4.47)
s s

VCr(max) s
ILr (s) = - · (4.48)
s · Lr 1
s2 + ( √ )2
Lr ·Cr
1
√
VCr(max) Lr ·Cr
ILr (s) = - r · (4.49)
Lr s2 + ( √ 1 )2
Cr Lr ·Cr
Taking Inverse Laplace Transform,

VCr(max)
iLr (t) = - sinωt (4.50)
Z

VCr(max)
iLr (t - t4 ) = - sinω(t - t4 ) (4.51)
Z
at t = t5 ,
iLr (t5 ) = 0 (4.52)

sinω(t5 - t4 ) = 0 (4.53)

π
(t5 - t4 ) = (4.54)
ω

VCr (t5 ) = - VCr4 (4.55)

VCr4 = Vi (4.56)
Chapter 4. Analysis and Design of Power Circuit 20

Mode 6 ( t5 , t6 )
Lo

s
L

Co O
A vo
vi +
-
D

Figure 4.8: Mode 6

Since the body diode of S1 has been turned OFF at t = t5 , only the main switch S carries the load
current. There is no resonance in this mode and the circuit operation is identical to a conventional
PWM buck converter. The voltage and current equations for this mode are given below.

iS = Io (4.57)

iLr (t6 ) = 0 (4.58)

VCr (t6 ) = -VCr4 (4.59)

VCr4 = Vi (4.60)

Mode 7 ( t6 , t7 )
Lo

Cr
Co O
A v
o
D

DS

Figure 4.9: Mode 7

Chapter 4. Analysis and Design of Power Circuit 21

At t6 , the main switch S is turned off using ZVS. The Schottky diode Ds starts conducting. The
resonant energy stored in the capacitor Cr starts discharging to the load through Schottky diode Ds .
This mode finishes when Cr is fully discharged. The equations that define this mode are given below.

VCr 1 VC
= · Io - r4 (4.61)
s s ·Cr s
Taking Inverse Laplace Transform,
ˆ t
1
VCr (t) = Io dt - VCr4 (4.62)
Cr 0

1
VCr (t) = · Io - VCr4 (4.63)
Cr

Io
VCr (t-t4 ) = -VCr4 + ·(t - t6 ) (4.64)
Cr
at t = t7 ,
VCr (t7 ) = 0 (4.65)

Io
VCr4 = ·(t7 - t6 ) (4.66)
Cr

Mode 8 ( t7 , t8 )
Lo

Co O
A v o
s2 D

Figure 4.10: Mode 8

At t7 , the body diode of switch S2 is turned ON as soon as Cr is fully discharged and the Schottky
diode is turned OFF under ZVS. Dead time loss is negligibly small compared to the conventional
synchronous buck converter. During this mode, the converter operates like a conventional PWM
buck converter until the switch S1 is turned ON in the next switching cycle. The equation that
defines this mode are given below.

iS2 = Io (4.67)
Chapter 4. Analysis and Design of Power Circuit 22

4.3 Design Procedure

The resonant inductor, resonant capacitor and the delay time of the auxiliary switch S1 are the most
important components when designing the auxiliary circuit. The following parameters are taken
into consideration for the design of the proposed buck converter.

1. Delay time: The ON time of auxiliary switch S1 must be lesser than one tenth of the switching
period. In this period, the capacitor CS discharges fully such that the voltage across the main
switch S is zero at which point it is turned ON under ZVS.
1
TD < TS (4.68)
10
2. Current Stress Factor: The current stress factor of the auxiliary switch is defined as
ILrm
a= (4.69)
Iin(max)
Its value is desired to be as small as possible. This factor can be used for the selection of the
auxiliary switch S1 as it determines how much extra current it can carry.

3. Resonant Capacitor (Cr ): The value of the resonant capacitor is expressed as

(a − 1)2 · Iin(max) · TD
Cr = π (4.70)
Vo · [1 + · (a − 1)]
2
4. Resonant Inductor (Lr ): The value of the resonant inductor is expressed as
Vo · TD
Lr = π (4.71)
Iin(max) · [1 + · (a − 1)]
2

4.4 Specifications of the Synchronous ZVS Buck Converter

1. Vo = 3.3 V

2. Io = 10 A

3. Vin = 15 V

4. Switching frequency: fs = 200 kHz

5. Resonant circuit :
Ls = 200 nH
Cr = 0.2673 µF

6. Filter circuit : (Assuming continuous conduction mode on the output side)

Lo = 4.29 µH (ripple current being 30% of Io ),
Co = 28.41 µF (ripple voltage being 2% of Vo )

7. Capacitor value across main switch S : Cs = 0.05 nF

Chapter 4. Analysis and Design of Power Circuit 23

Given below are the photographs of the power circuit:

Figure 4.11: Power Circuit View 1

Figure 4.12: Power Circuit View 2

Chapter 4. Analysis and Design of Power Circuit 24

4.5 Ratings of Power Devices

IRFZ44N MOSFET

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 49 A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 35 A
IDM Pulsed Drain Current 160 A
PD @TC = 25°C Power Dissipation 94 W
Linear Derating Factor 0.63 W/°C
VGS Gate-to-Source Voltage ± 20 V
IAR Avalanche Current 25 A
EAR Repetitive Avalanche Energy 9.4 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJ Operating Junction Range -55 to + 175 °C
TSTG Storage Temperature Range -55 to + 175 °C
Soldering Temperature, for 10 seconds 300( 1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf·in (1.1 N-m)

Table 4.1: Absolute Ratings of IRFZ44N

Thermal Resistance
Parameter Typ. Max. Units
Rθ JC Junction-to-Case _ 1.5 °C/W
Rθ CS Case-to-Sink, Flat, Greased Surface 0.50 _ °C/W
Rθ JA Junction-to-Ambient _ 62 °C/W

Table 4.2: Thermal Resistance of IRFZ44N

Chapter 4. Analysis and Design of Power Circuit 25

Electrical Characteristics @ TJ = 25 °C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V(BR)DSS Drain-to-Source 55 ___ ___ V VGS = 0V, ID = 250μA
Breakdown Voltage
∆V(BR)DSS
∆ TJ Breakdown Voltage ___ 0.058 ___ V/°C Reference to 25°C, ID =
Temp. Coefficient 1mA
RDS(on) Static Drain-to-Source ___ ___ 17.5 mΩ VGS = 10V, ID = 25A
On-Resistance
VGS(th) Gate Threshold Voltage 2.0 ___ 4.0 V VDS = VGS , ID = 250μA
gfs Forward 19 ___ ___ S VDS =25V, ID = 25A
Transconductance
IDSS Drain-to-Source Leakage ___ ___ 25 μA VDS = 55V, VGS = 0V
Current
___ ___ 250 μA VDS = 44V, VGS = 0V, TJ =
150°C
IGSS Gate-to-Source Forward ___ ___ 100 nA VGS = 20V
Leakage
Gate-to-Source Reverse ___ ___ -100 nA VGS = -20V
Leakage
Qg Total Gate Charge ___ ___ 63 nC ID = 25A
Qgs Gate-to-Source Charge ___ ___ 14 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") ___ ___ 23 nC VGS = 10V
Charge
td(on) Turn-On Delay Time ___ 12 ___ ns VDD = 28V
tr Rise Time ___ 60 ___ ns ID = 25A
td(off) Turn-Off Delay Time ___ 44 ___ ns RG = 12Ω
tf Fall Time ___ 45 ___ ns VGS = 10V
LD Internal Drain Inductance ___ 4.5 ___ nH Between lead. 6mm
(0.25in.) from package and
center of die contact.
LS Internal Source ___ 7.5 ___ nH
Inductance
Ciss Input Capacitance ___ 1470 ___ pF VGS = 0V
Coss Output Capacitance ___ 360 ___ pF VDS = 25V
Crss Reverse Transfer ___ 88 ___ pF f =1.0MHz
Capacitance
EAS Single Pulse Avalanche ___ 530 150 mJ IAS = 25A, L= 0.47mH
Energy
Chapter 4. Analysis and Design of Power Circuit 26

Source-Drain Ratings and Characteristics

The Source-Drain Ratings and Characteristics are as follows:-

Parameter Min. Typ. Max. Units Conditions

IS Continuous Source Current ___ ___ 49 A
ISM Pulsed Source Current ___ ___ 160 A
VSD Diode Forward Voltage ___ ___ 1.3 V TJ = 25°C, IS = 25A, VGS =
0V
trr Reverse Recovery Time ___ 63 95 ns TJ = 25°C, IF = 25A
Qrr Reverse Recovery Charge ___ 170 260 nC di/dt = 100A/μs
ton Forward Turn-On Time Intrinsic turn on time is
negligible( turn on time is
dominated by LS + LD )

Table 4.3: Source-Drain Ratings and Characteristics

BA159 Schottky Diode

MAXIMUM RATINGS (T A = 25 °C SYMBOL VALUE UNIT
unless otherwise noted)
PARAMETER
Maximum repetitive peak reverse V RRM 1000 V
voltage
Maximum RMS voltage V RMS 700 V
Maximum DC blocking voltage V DC 1000
Maximum average forward rectified I F(AV) 1.0 A
current 0.375" (9.5 mm) lead length at
T A = 55 °C
Peak forward surge current 10 ms I FSM 20 A
single half sine-wave superimposed on
rated load
Maximum operation junction TJ - 65 to + 125 °C
temperature
Maximum storage temperature T STG - 65 to + 150 °C
Chapter 4. Analysis and Design of Power Circuit 27

ELECTRICAL
CHARACTERISTICS
(T A = 25 °C unless
otherwise noted)
PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT
Maximum instantaneous 1.0 A VF 1.3 V
forward voltage
Maximum DC reverse T A = 25 °C IR 5.0 μA
current at rated DC
blocking voltage
Maximum reverse I F = 0.5 A, I R = 1.0 A, I rr = t rr 500 ns
recovery time 0.25 A
Typical junction 4.0 V, 1 MHz CJ 12 pF
capacitance
Chapter 5

Control Circuit

5.1 Introduction to TL494 PWM Control IC

Texas Instruments TL494 is a PWM control IC. It is a fixed frequency, pulse width modulation
control circuit essentially designed for Switch Mode Power Supply (SMPS) control. The TL494
IC incorporates all the functions needed in the construction of a pulse width modulation (PWM)
control circuit. It contains two error amplifiers, an on-chip adjustable oscillator, a dead-time control
(DTC) comparator, a pulse-steering control flip-flop, a 5 V, 5%-precision regulator, and two output
transistors Q1 and Q2. The presence of error amplifiers in the IC permits it to be operated in both
open loop and closed loop modes. TL494 can generate PWM signals in the frequency range 1 kHz
to 300 kHz. It can operate under extreme temperatures of about - 40°C to 85°C. Synchronization of
multiple ICs is possible by maintaining a common oscillator frequency throughout.
The TL494 IC can be operated either in single-ended (parallel) mode or push-pull mode. The
proposed control circuit employs push-pull mode of operation. The output transistors Q1 and Q2 can
be made to operate in either a Common Emitter configuration or an Emitter Follower configuration.
In the proposed control circuit, connections are made so as to operate the output transistors in the
emitter follower mode.

28
Chapter 5. Control Circuit 29

5.2 Pinout configuration of TL494 IC

Non inver�ng input 1 + + 16 Non inver�ng input

Error Error
1 2
Amp Amp
Inver�ng input 2 - - 15 Inver�ng input
VCC

Compen/PWM 3 5.0 V 14 VREF

Comp I/P REF
=0.1V
Dead�me 4 13 Output Control
Control

CT 5 12 VCC
Oscillator
RT 6 11 C2
Q2
GND 7 10 E2

Q1
C1 8 9 E1

Figure 5.1: Pinout of TL494 IC

Pin No. Name Type Description

1 1IN+ I/P Non inverting input to error amplifier 1
2 1IN - I/P Inverting input to error amplifier 1
3 FEEDBACK I/P Feedback comparator input
4 DTC I/P Dead Time Control
5 CT − Timing capacitor used to set the oscillator frequency
6 RT − Timing resistor used to control the oscillator frequency
7 GND − Ground
8 C1 O/P Collector terminal of switcing transistor 1
9 E1 O/P Emitter terminal of switching transistor 1
10 E2 O/P Emitter terminal of switching transistor 2
11 C2 O/P Collector terminal of switcing transistor 2
12 VCC − Positive voltage supply
13 OUTPUT CTRL I/P Selects single-ended/parallel output or push-pull operation
14 VREF O/P 5-V reference regulator output
15 2IN - I/P Inverting input to error amplifier 2
16 2IN+ I/P Non inverting input to error amplifier 2

Table 5.1: Pinout Description of TL494 IC

Chapter 5. Control Circuit 30

5.3 Functional Block Diagram of TL494 IC

Output Control Vcc

13
8

6
Q Q1
Oscillator D
5 9
Flip
RT CT Flop
Deadtime 11
Ck Q' Q2
Comparator
- 10
0.12 V
4 +
Deadtime
Control 0.7 V
12
- -
+ +
Vcc
UV 4.9V
0.7mA PWM
Comparator
Lockout Reference
-
Regulator
+
+
+
1 2
-
-

1 2 3 15 16 14 7
Error Feedback PWM Error Ref.
GND
Amplifier 1 Comparator i/p Amplifier 2 Output

This device contains 46 active transistors.

Figure 5.2: Functional Block Diagram of TL494 PWM Control IC

5-V Reference Regulator

The DC supply voltage VCC provides the input to the reference regulator. It regulates the supply
voltage to a 5 V DC output. Thus, VREF (pin 14) of TL494 acts as an internal 5 V reference
regulator output. This 5V reference is highly stable. It can be used to power the output-control logic
(pin 13), pulse-steering flip-flop, oscillator (pin 5), dead-time control comparator (pin 4), and PWM
comparator (pin 3).

Oscillator
The oscillator generates a carrier signal which is a positive sawtooth waveform. This waveform
is compared with the PWM input (pin 3) by the internal PWM comparator. This results in the
generation of PWM pulses in the control circuit. The same sawtooth waveform is compared with
the deadtime control input (pin 4) by the internal deadtime comparator. This is to provide additional
dead time to the PWM pulses. The oscillator charges the external timing capacitor CT at a constant
current. The value of this current is determined by the external timing resistor, RT . When the
voltage across CT reaches 3 V, the capacitor is discharged, and the charging cycle is re-initiated.
This charging and discharging of the timing capacitor CT produces a sawtooth voltage waveform.
Chapter 5. Control Circuit 31

The oscillator frequency is given by,

1
fosc = (5.1)
RT ·CT
The timing capacitor CT helps in setting the oscillator frequency, which can be controlled by varying
the value of the timing resistor RT . For 200 kHz operation, the values chosen for CT = 0.001µF , RT
= 5 kΩ. Figure 5.3 shows how the oscillator frequency can be varied in the TL494 IC. For a fixed
value of timing capacitor CT , the timing resistance RT is varied till the desired oscillator frequency
is obtained.
OSCILLATOR FREQUENCY (Hz)

500 k
= 15 V
100 k

=
0.0
= 01
10 k 0.0 μF
1μ
F
=
1k 0.1
μF
0.5 k
-

1k 2k 5k 10 k 20 k 50 k 100 k 200 k 500 k 1M

- TIMING RESISTANCE (Ω)

Figure 5.3: Oscillator Frequency vs Timing Resistance

Output-Control Input
The output-control input (pin 13) determines whether the output transistors Q1 and Q2 operate in
single-ended mode or push-pull mode.

INPUT TO OUTPUT CTRL OUTPUT FUNCTION Output Frequency : f

1
VI = GND Single-ended or parallel output RT ·CT
1
VI = VREF Normal push-pull operation 2·RT ·CT

Table 5.2: Output modes for different values of OUTPUT CTRL of TL494 IC

For single-ended operation, the output-control input must be grounded. This disables the pulse-
steering flip-flop and inhibits its outputs. In this mode, the pulses seen at the output of the dead-
time comparator and PWM comparator are transmitted by both output transistors in parallel. For
push-pull operation, the output-control input (pin 13) is connected to the output of the internal
5 V reference regulator (pin 14). Under this condition, each of the output transistors is enabled
alternately by the pulse-steering flip-flop, thus facilitating push-pull operation.
Chapter 5. Control Circuit 32

Error Amplifiers
TL494 IC has two high gain error amplifiers which are useful while implementing closed loop
control systems. In a closed loop control system, the feedback signal (output voltage of the power
circuit) can be given to either input terminal of either of the error amplifiers 1 or 2. A reference
voltage VREF is given from pin 14 to the other input terminal . This way, the output voltage of the
power circuit is compared with a stable reference voltage. If there is any difference between the two,
a compensating error voltage is generated by the error amplifier which restores the output voltage
to its original value.

Feedback PWM Comparator Input

PWM signals are generated by comparing the positive sawtooth waveform (carrier signal) generated
by the oscillator (pin 5) with the feedback comparator PWM input from pin 3 (modulating signal).
By adjusting the amplitude of the modulating signal, the ON time of the PWM signals fed to the
transistors can be varied.
Modulating Carrier Signal
Signal

0
Carrier Signal > Modulating Signal
Q
0
Carrier Signal < Modulating Signal
Q'
0

Figure 5.4: Generation of PWM Signal

Dead Time Control

When the voltage at the DTC input is greater than the ramp voltage of the oscillator (pin 5), the out-
put of the deadtime comparator inhibits switching transistors Q1 and Q2. The deadtime comparator
has an internal offset voltage of 0.12V. This ensures a minimum dead time of ∼3% of the PWM
pulses when the DTC input is grounded. Applying a voltage to the DTC input can increase the dead
time of the PWM pulses. This provides a linear control of the dead time from its minimum of 3% to
100% as the input voltage is varied from 0 V to 3.3 V. The DTC input is a relatively high impedance
input (II <10 μA). Therefore, a voltage should be applied to it only when additional control of the
output duty cycle is required. An open circuit for the DTC input is an undefined condition.

Output Transistors
TL494 has two output transistors Q1 and Q2. They are capable of sinking or sourcing currents up
to 200 mA. They can be operated in two modes, namely:
Chapter 5. Control Circuit 33

1. Common Emitter ( CE ) mode

2. Emitter Follower ( EF ) mode

15 V 15 V

(a) Common Emitter Configuration (b) Emitter Follower Configuration

Figure 5.5: Configuration of Output Transistors

In CE configuration, both the collector terminals of Q1 and Q2 are connected to the supply
VCC via a resistance. The emitter terminals of both transistors are connected directly to the ground.
In this configuration, the transistors invert the PWM pulses that are fed to them. In the case of
EF configuration, the collector terminals of both transistors are connected to the supply VCC . The
emitter terminals of both transistors are connected to the ground via a resistance. The PWM pulses
fed to the transistors are followed at the output end. Thus, they perform a buffering action. The
transistors have a saturation voltage of less than 1.3 V in the CE configuration and less than 2.5 V
in the EF configuration.

5.4 Recommended Operating Conditions of TL494 IC

MIN MAX UNIT
VCC Supply voltage 7 40 V
VI Amplifier input voltage −0.3 Vcc −2 V
Vo Collector output voltage 40 V
Collector output current(each transistor) 200 mA
Current into feedback terminal 0.3 mA
fOSC Oscillator frequency 1 300 kHz
CT Timing Capacitor 0.47 10000 nF
RT Timing Resistor 1.8 500 kΩ
TL494IC 0 70
TA Operating free-air temperature °C
TL494I −40 85

Table 5.3: Recommended Operating Conditions of TL494 IC

Chapter 5. Control Circuit 34

5.5 PWM Signal Generation Control Circuit

Feedback from output of Power Circuit

10kΩ
10kΩ
+
15 V
100μF

100μF

470Ω

470Ω
470Ω

470Ω
- S1 S and S2
1 IN1+ 8 1 IN1+ 8
C1 C1
2 2
C2 11 C2 11

1kΩ
IN1 - IN1 -
16 IN2+ 16 IN2+
15 15
IN2 - E1 9 IN2 - E1 9
E2 10 E2 10

1.2kΩ

1.2kΩ
5 CT 5 CT
1.2kΩ

1.2kΩ
6 RT 6 RT
2.5kΩ

14 Vref 14 Vref
1nF
3 3

1kΩ
1kΩ

COMP COMP
4 4

1kΩ
1kΩ

DTC DTC
13 S1_PULSE 13 S_PULSE S2_PULSE
OC OC
7 GND 7 GND
12 Vcc 12 Vcc
TL494 TL494

Figure 5.6: Control Circuit Diagram

A closed loop control system is built for generating the PWM signals required for triggering
the MOSFETs. The control circuit consists of two TL494 ICs as shown in Figure 5.6. The DTC
input (pin 4) and the feedback PWM comparator input (pin 3) are both connected to VREF (pin 14)
through 1k potentiometers. The voltage at these pins can be varied through the potentiometers. The
output transistors Q1 and Q2 of both ICs are operated in emitter follower mode. To minimize the
effect of noise input in the voltage supply to the controller, two electrolytic capacitors of 100µF
are connected across the VCC and GND. The two ICs need to have a common operating oscillator
frequency in order to achieve synchronism. To do so, the internal oscillator of the second IC is
disabled by connecting its RT terminal (pin 6) to VREF (pin 14) and its CT pin to the CT pin of first
IC. Now the first IC acts as the master circuit, while the second ICs acts as the slave circuit. The
output frequency of second IC remains the same as that of first IC.
MASTER ( IC1 ) SLAVE ( IC2 )

Figure 5.7: Master / Slave Synchronization

The ICs are operated in push-pull mode by connecting the output control pin 13 to the VREF
pin 14. In this mode, each of the output transistors is enabled alternately. Thus, two MOSFETs
can be triggered using a single IC. The auxiliary switch S1 of the power circuit is triggered by the
Chapter 5. Control Circuit 35

PWM pulses generated by the first IC at pin 10. The free wheeling switch S2 and the main switch
S of the power circuit are triggered by the pulses generated by the second IC at the pins 9 and 10
respectively. S2 should be ON when S is OFF , which can be achieved by push pull operation.
In push-pull mode, for an output frequency of 200 kHz, the oscillator frequency should be 400
kHz. . To match this frequency, CT = 0.001µF and RT = 2.5kΩ. Pull-up resistors of 470Ω are used
to limit the amplitude of the PWM signals generated to around 10V (IRFZ44N has VGS(max) = 20 V).
This reduces voltage stress at the gate-to-source terminals of the MOSFETs. The feedback signal
(output voltage of the power circuit) is given to error amplifier 1 of the second IC (pin 2) through a
voltage divider network. This network consists of two 10kΩ resistors. Through this configuration,
Vo 3.3
50% of output voltage of the power circuit ( 2 = 2 = 1.65 V ) is given to pin 2 of IC2. A positive
voltage of 1.65 V is given to pin 1 of the same error amplifier from VREF via a 1kΩ potentiometer.
This feedback network also limits the current input to the IC. Whenever the output voltage drops
below 3.3 V , the feedback voltage (1.65 V) decreases correspondingly. After comparing the inputs
at pin 1 and pin 2, the error amplifier generates an error signal which increases the duty cycle of the
PWM signals generated. Thus, output voltage is brought back to 3.3 V.
Given below is the photograph of the control circuit.

Figure 5.8: Designed Control Circuit

Chapter 6

Experimental Results

6.1 Testing the Control Circuit

The control circuit was successfully built and tested. The oscillator frequency fosc was set to 408
kHz by choosing the values of CT = 0.001µF and RT = 1.974 kΩ. Since TL494 IC was used in
fosc
push-pull mode the output frequency fout was 203.3 kHz ≈ 2 . The power circuit was designed for
this frequency.
Given below are the photographs of the waveforms obtained from the control circuit.

Generation of PWM signals

Figure 6.1: Comparison Between Modulating and Carrier Signal

The modulating DC signal is compared with the carrier ramp signal to generate a PWM signal.
The DC signal and the ramp signal are observed at pin 3 and pin 5 of the TL494 IC respectively. The
duty cycle of the generated PWM signal is controlled by adjusting the amplitude of the DC signal.

36
Chapter 6. Experimental Results 37

PWM Signal for Auxiliary Switch S1

(a) Frequency and Delay Time (b) Amplitude and Frequency

Figure 6.2: PWM Signal for S1

1 1
The switching period of the pulse was TS = fo = 203.3∗103
= 4.92µs. As shown in Figure 6.2a
the auxiliary switch S1 was turned ON for a duration of 0.398µs, which is 8.1% of TS . This satisfies
1
the delay time equation : TD < 10 TS . The max amplitude of PWM signal for S1 was 10.6 V as
shown in Figure 6.2b

PWM Signal for Main Switch S

(a) Amplitude and Frequency (b) Frequency and Duty Cycle

Figure 6.3: PWM Signal for S

The frequency of the PWM signal for the main switch was 202.4 kHz to 203.3 kHz. The
maximum amplitude of this signal was 10.4 V. The duty cycle was automatically controlled by the
control circuit whenever there is a drop in the output voltage on loading the power circuit.
Chapter 6. Experimental Results 38

PWM Signal for Free-wheeling Switch S2

(a) Amplitude and Frequency (b) Frequency and Duty Cycle

Figure 6.4: PWM Signal for S2

This signal is complementary of the PWM signal of S with a dead time. The frequency of the
PWM signal for the freewheeling switch is 202.4 kHz to 203.3 kHz. The maximum amplitude of
this signal was 10.2 V.

Dead-time between S and S2

Figure 6.5: Dead-time between S and S2

If both the switches S and S2 of the power circuit are ON simultaneously, the input of the power
circuit gets shorted. High current passes through this short circuit. If this short circuit current
exceeds the continuous drain current rating ID of the MOSFET, the MOSFET gets damaged. To
avoid this, the voltage to the DTC input (pin 4) of the second IC is varied. It can be seen that there
is no common turn ON time for S and S2 as shown in Figure 6.5.
Chapter 6. Experimental Results 39

6.2 Testing of Power Circuit

A regulated power supply (RPS) of 0 - 30 V, 15 A was used as the voltage source for the power
circuit. The power circuit was tested for an input voltage of 15 V. The input current was set to a
maximum value of 10 A. With only the filter capacitance of Co = 28.41µF, few ripples in the output
voltage were still present. Thus, an additional 100µF capacitor was connected externally across the
output of the power circuit to reduce the ripples, thereby giving a constant DC voltage of 3.4V as
shown in Figure 6.6

Figure 6.6: Input and Output Voltages of Power Circuit

6.3 Conclusion
The control circuit was tested and it was found that the generated PWM triggering signals were
identical to the theoretical waveforms described in chapter 4. The MOSFETs in the power circuit
were operated at 203.3 kHz. The closed loop control system was successfully implemented. As a
result, the output voltage of the power circuit remained constant at 3.4 V for different resistive loads
ranging from 1Ω to 40 kΩ .
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