Computer Science Practice Book III
Computer Science Practice Book III
SCIENCE
Practice Book - III
(DSA | OS | DBMS | CN | COA)
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Q.5 Consider the following code with
inputs given are {1, 2, 3, 4, 5, 6, 7, 8, 9, Q.7 Consider the following C fragment:
10} (Assume, integer takes 4 bytes): main( )
#include <stdio.h> {
int main () char x{ ] = “ICE-GATE”;
{ char *y =x;
int arr [10], x, sum = 0; printf(“%s”, x + y[2] - y[5]):
for (int i= 0; i < 10; i++) }
{ What is the output of above C
x = scanf("%a", & arr fragment?
[#]); a) ICE-GATE
sum = sum + x; b) -GATE
} c) GATE
printf (“%d %a”, x, sum); d) TE
return 0;
} Q.8 The keys 15, 17, 23, 32, 37, 45, 57, 63,
What will be the output of the above 2, 5, 18, 73 are inserted into an initially
code? empty hash table of length 7 with hash
a) 10, 10 function h(k) = k mod 7. The collisions
b) 4, 40 are resolved by chaining. The average
c) 1, 40 chain length of hash table is ______.
d) 1,10 (Upto 2 decimal place) (Assume every
element stored outside the hash table)
Q.6 In delete operation of binary search
tree, we need inorder successor (or Q.9 Given a hash table T with load factor
predecessor) of a node when a node to 80 that stores 2000 elements, the
number of slots is ______.
be deleted where it has both left and
right child. Which of the following is Q.10 Which of the following statement is
true about inorder successor needed in correct reason for “Balanced binary
delete operation? tree is better than a complete binary
a) Inorder successor is always either tree for sorting a set S of n elements”?
leaf node or a node with empty right S1: A balanced binary tree is more
child. space efficient.
S2: Insertion and deletion can be
b) Inorder successor maybe an ancestor
preformed faster.
of the node. S3: Implementation of balanced binary
c) Inorder successor is always a leaf tree requires less RAM space.
node. Which of the following is always true?
d) Inorder successor is always either a (a) Only S1 and S2
leaf node or a node with empty left (b) Only S2
child. (c) Only S1 and S3
(d) Only S3
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LEVEL 2
Q.1 Consider the following AVL tree.
Sequences are:
S1: abedfc S2: acdebf
S3: abcfde S4: bacedf
S5: cdabef
The number of sequences are DFS
traversal on the given graph _______.
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{ enqueue(Q1,
Node * P1 = head, * P2 = head; dequeue(Q2));
while (P2) }
{ Insert the element x into stack S
P1=P1 → next; void push(S, x){
P2 = (P2 → next)? P2 enqueue(Q1, x);
→ next → next : NULL; }
} How many enqueue and dequeue
printf(“%d", P1 → value); operations are required to perform a
} pop operation if Q1 contains n
Assume Node is the structure type with elements initially?
two members: ‘value’ and ‘next’. a) 3n+1, 2n-1
Identify the node value printed by the b) 2n-1, 2n
above code if non-empty linked list c) 2n-2, 2n-1
header is passed to the function find? d) 2n-2, 3n-3
a) First element of the list [i.e., value of
the first node] Q.10 Consider the following C-fragment
b) Second element of the list where size of int is 1 B (Assume
c) Middle element of the list starting address of array is 1000)
d) Last element of the list int main ()
{
Q.9 An implementaion of a stack S, using int S[6] = {10, 20, 30, 40, 50, 60};
two queues Q1 and Q2 is given below. int * Str = (int *) (&S + 1);
Delete the element from stack S and printf(“% d”, Str);
store it in x: }
void pop(S, x) The output generated by above code
{ is_______.
if (isEmpty Q(Q1))
{
printf(‘S is empty”); LEVEL 3
return;
} Q.1 An n-ary tree in which every node has
while (1) 0 or n children. If number of internal
{ nodes is 40 and leaf nodes is 401, then
the value of ‘n’ is _____.
x = dequeue(Q1);
if (isEmptyQ(Q1))
Q.2 Consider the following elements are
break;
inserted into an empty AVL tree in the
enqueue(Q2, x);
given order: 50, 40, 30, 20, 10, 5,7
}
The number of rotations are applied to
while (! isEmptyQ(Q2))
construct an AVL tree with the given
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elements are (Assume LR, RL, LL and strings. Assume finding an empty slot
RR a single rotation) is a successful probe, while non-empty
is a unsuccessful probe. The total
Q.3 What will be the output of the number of unsuccessful probes needed
using linear probing to hash all strings
following C program?
is ____.
#include <stdio.h>
int main ()
{
char c='A’;
int x = 5, y= 10, res1, res2;
res1 = c++ || x++ || --y;
res2 = ++x && --c && ++y;
printf("%d %d %d %c", res1,
res2, x + y, c);
return 0;
}
a) 1 0 17 B
b) 1 1 17 A
c) 1 0 16 B
d) 1 1 16 B
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(d) (d) (c) (c) (d) (d) (c) (1.71) (25) (b)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(c) (d) (8) (2) (a) (c) (5) (c) (c) (1006)
LEVEL 3
1 2 3 4 5
(11) (4) (b) (b) (8)
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SOLUTIONS
LEVEL 1
Q.1 (d)
Compiler error: Cannot modify a
constant value.
P is a pointer to a “constant integer”.
Q.7 (c)
But we tried to change the value of the
“constant integer”.
Q.2 (d)
In C, static variable can be initialized x = 2000, y=2000
only using constant literals. They can't y[2] = E(69 in ASCII)
be assign like this, so it will generate y[5] = A(65 in ASCII)
compile time error. x + y[2] - y[5] = 2000 + 69 - 65 = 2004
Therefore it prints from the array
Q.3 (c) starting at address: 2004 to the end.
After the switch statement, the control
directly transfers to the matching case, Q.8 (1.7- 1.8)
without executing any statement
between them.
Q.4 (c)
Both a and b points at the 6th location
(index 5) of the array because once in a
loop, pointer is increamented twice.
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S3 is false, since Balanced binary tree So, Preorder: 17, 13, 11, 7, 12, 14, 15,
can never require less space. It usually 21, 20, 24, 22, 25
takes more space since some time we
need to store flags also i.e. in red-black Q.3 (8)
tree for color. And complete binary
tree can be store in a RAM as an array
without using pointers.
LEVEL 2
Q.1 (c)
The order: 86, 25, 98, 83, 27, 90, 71, Total nodes when tree is balanced but
94 will result the given AVL Option minimally connected = 7
(c) is correct. [Note: Option (a) & So, maximum difference should be =
option (b) will generate different AVL 15-7 =8
trees]
Q.4 (2)
Q.2 (d) S1: ‘abedfc': DFS traversal.
We know that in order of BST is S2: ‘acdebf’: DFS traversal.
increasing order S3: ‘abefde': is neither BFS traversal
In order: 7, 11, 12, 13, 14, 15, 17, 20, nor DFS traversal.
21, 22, 24, 25 S4: 'bacedf’: BFS traversal but not
Post order: 7, 12, 11, 15, 14, 13, 20, 22, DFS traversal.
25, 24, 21, 17. S5: ‘cdabef’: BFS traversal but not
DFS traversal.
Q.5 (a)
S1: If two keys started from same hash
address, they both will follow same
path in linear manner, to get empty
slot. Because of this problem average
searching time increases and this
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situation is called primary clustering.
This is possible only in LINEAR
probing. Hence S1 is false.
S2: If they follow same path in
quadratic manner to get empty slot, the
average searching time increases (less
than linear probing). This is called
secondary clustering and is possible
only in quadratic probing.
Only S3 is absolutely true because 99%
secondary clustering do not exist in
double hashing.
Q.8 (c)
Q.6 (c)
P1 traverses node by node. P2 traverses
Postfix expressions can be found using
by skipping one node. The node
operator stack operations.
pointed by P1 is the middle node in the
Push A A
linked list when P2 reaches to NULL.
+ + A
:. Middle element of the list is printed
( +( A
by P1 → value.
Push B +( AB
x +(x AB
Q.9 (c)
Push C +(x ABC In first while loop, there will be n
- +(- ABC x {pop x, because dequeue and n-1 enqueue operations
precedence of x is greater than -} performed.
( +(-( ABC x In Second for loop, there will be n-1
Push D +(-( ABC x D dequeue and n-1 enqueue operations
/ +(-(/ ABC x D performed.
Push E +(-(/ ABC x DE So, Total 2n-2 enqueue and 2n-1
↑ +(-(/↑ ABC x DE dequeue operations will be performed
F +(-(/↑ ABC x DEF for a pop operation.
) +(- ABC x DEF ↑/ {pop/ ↑}
x +(-x ABC x DEF ↑/ Q.10 (1006)
G +(-x ABC x DEF ↑/G
) (+ ABC x DEF ↑/ G x –
Push x +x ABC x DEF ↑/G x –
Push H +x ABC x DEF ↑/G x - H
) - ABC x DEF↑/G x-H x +
Q.7 (5)
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LEVEL 3 evaluates all components and returns
true.
Q.1 (11)
Let I be the number of internal nodes, Q.4 (b)
L be number of leaf nods and T be total Unsorted doubly linked list:
number of nodes
I+L=T
n.I + 1 = T
From (i) and (ii);
I + L = nI + 1 Q.5 (8)
40 + 401 = 40.n + 1 Checks last 3 bits:
440 = 40.n
n = 11
Q.2 (4)
Q.3 (b)
|| and && are also called short circuit
operators because:
|| operator, evaluation takes place from
left to night and stops evaluating next
component when it gets true value. So
far res1, c++ returns true value so
further components it does not
evaluate. And && operator, evaluation
takes place from left to right, it
evaluates all of its components until it's
getting true value, whenever it gets
false value, next components doesn't
evaluate and stops. So for res2, it
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Data Structure & Algorithm
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Q.10 If the number of records to be sorted is to a join algorithm. The output is an
small, then ...... sorting can be efficient. array C[1,... 2n] which has all the value
(a) Merge of the arrays A[] and B[] and is in
(b) Heap increasing order. What is the worst
(c) Insertion case time complexity for join algorithm
(d) Bubble to join the two array?
(a) O(n2)
LEVEL 2 (b) O(n)
(c) O(n log n)
(d) O(1)
Q.1 Consider the following statements:
S1: Implementation of stack using Q.4 What is the worst case time complexity
queue, deletion of second element from to design unique binary search tree
top of stack time complexity O(n), with n elements, when its preorder and
when insertion take O(1) time. post order is given?
(a) O( n )
S2: In implementation of queue using (b) O(n)
stack, deletion of second element from (c) O(nlogn)
(d) Cannot be designed using BST
front take 0(1) time, when insertion
take O(n) time.
Q.5 Consider two sorted arrays A and B
Which of the following is correct ? has distinct elements, but there may be
a) Only S1 many elements common in both A & B
b) Only S2 What is the best case time complexity
c) Both S1 and S2 intersection of two array A and B?
d) None of the above (a) O(log n) (b) O(n)
(c) O(n log n) (d) O(n2)
Q.2 Consider the following graph:
Q.6 Using the best algorithm, what is the
time complexity to determine that a
number n is prime?
(a) O( n ) (b) O(n)
(c) O(log n) (d) O(n2)
Q.3 Consider two arrays A[] and B[], if Q.8 Let P be a Quick sort Program to sort
A[1... n] is in increasing order, and numbers in ascending order using the
B[1... n] is in decreasing order is input first element as pivot. Let t1 and t2 be
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the number of comparisons made by P int i, X[N], Y[N], Z[N];
for the inputs {1, 2, 3, 4, 5} and {4, 1, X[0]=Y[0]=Z[0]=0;
5, 3, 2} respectively. Which one of the X[1]=1; Y[1]=2; Z[1]=3;
following holds? for i=2, i≤ n, i++ {
(a) t1 = 5 (b) t1< t2 X[i]= Y[i-1] + Z[i-2];
(c) t1> t2 (d) t1 = t2 Y[i]= 2 * X[i];
Z[i] = 3 * X[i];
Q.9 State True or False for internal sorting }
algorithms: return X[n];
(i) Internal sorting are applied when the }
entire collection if data to be sorted is
small enough that the sorting can take Q.2 The running time of f1(n) and f2(n) are
place within main memory. (a) Ѳ(n) and Ѳ(n)
(ii) The time required to read or write (b) Ѳ(2n) and Ѳ(n)
is considered to be significant in (c) Ѳ(n) and Ѳ(2n)
evaluating the performance of internal (d) Ѳ(2n) and Ѳ(2n)
sorting.
(a) (i)- True, (ii)- True Q.3 f1(8) and f2(8) returns the value of
(b) (i)- True, (ii)- False (a) 1661 and 1640
(c) (i)- False, (ii)- True (b) 59 and 59
(d) (i)- False, (ii)- False (c) 1640 and 1640
(d) 1640 and 1641
Q.10 .......... is putting an element in the
appropriate place in a sorted list yields Q.4 Which of the following is correct
a larger sorted order list. recurrence for worst case of Binary
(a) Insertion (b) Extraction Search?
(c) Selection (d) Distribution (a) T(n) = 2T(n/2) + O(1) and T(1) = T(0) = O(1)
(b) T(n) = T(n-1) + O(1) and T(1) = T(0) = O(1)
(c) T(n) = T(n/2) + O(1) and T(1) = T(0) = O(1)
LEVEL 3 (d) T(n) = T(n-2) + O(1) and T(1) = T(0) = O(1)
Q.1 Let A, B, C, D, E are sorted sequences Q.5 Given a sorted array of integers, what
having length 70, 74, 80, 85, 102 can be the minimum worst case time
respectively. They are merged into a complexity to find ceiling of a number x
single sequence by merging together in given array? Ceiling of an element x is
two sequences at a time. The maximum the smallest element present in array
number of comparison that will be which is greater than or equal to x.
needed by best algorithm for doing Ceiling is not present if x is greater than
merging is ____. the maximum element present in array.
For example, if the given array is {12,
Common Data for Questions 2 & 3 67, 90, 100, 300, 399} and x = 95, then
int f1 (int n){ output should be 100.
if (n= =0 || n= =1) return n; (a) O (Log Log n)
else return (2*f1 (n-1) + 3*f1 (b) O (n)
(n-2)); (c) O (Log n)
} d) O (Log n * Log n)
int f2 (int n){
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(a) (b) (b) (c) (b) (c) (b) (b) (b) (c)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(c) (7) (b) (c) (b) (a) (b) (c) (b) (a)
LEVEL 3
1 2 3 4 5
(962) (b) (c) (c) (c)
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elements, T(4n/5) is for the rest 4n/5
SOLUTIONS elements, and n is for finding the pivot.
If there are more than n/5 elements in
LEVEL 1 one set then other set will have less
than 4n/5 elements & time complexity
will be less than T(n/5) + T(4n/5) + n
Q.1 (a) because recursion tree will be more
If input is already sorted, then insertion balanced.
sort will give O(n) comparison i.e., for
every element 1 comparison. i.e., n
Q.8 (b)
element = O(n) comparison.
The recursion expression becomes:
While selection sort have O(n2), quick T(n) = T(n/4) + T(3n/4) + cn
sort O(n log n) and merge sort have
After solving the above recursion, we
O(n log n). get θ (nLogn).
Q.2 (b) Q.9 (b)
Visit each node one time by comparing
Q.10 (c)
parent node with its children, will take
O(n) time in worst case.
LEVEL 2
Q.3 (b)
Q.4 (c) Q.1 (c)
Average time required is (n+1)/2 but In implementation of stack using queue:
time complexity is O(n). If we do some extra work in inserting the
element then deletion of second element
Q.5 (b) from top of stack required queue (n - 1)
In worst case, the chosen pivot is
always placed at a corner position and element in another queue then again (n -
recursive call is made for following. 1) i.e. (n - 2) element to another queue so
a) for subarray on left of pivot which is it take O(n) time.
of size n-1 in worst case. In implementation of using stack; will
b) for subarray on right of pivot which take O(1) time to delete second element
is of size 0 in worst case. from front will take O(1) time.
Q.6 (c)
Q.2 (7)
Randomized quick sort has expected
Maximum height of stack needed,when
time complexity as O(nLogn), but
depth of the graph is maximum, so,
worst case time complexity remains
same. In worst case the randomized
function can pick the index of corner
element every time. So, it is O(n2).
Q.7 (b)
For the case where n/5 elements are in
one subset, T(n/5) comparisons are
needed for the first subset with n/5 Which is 7, so maximum height of
stack is 7.
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Q.3 (b) In every step of quick sort, numbers are
This Join algorithm is similar to merge divided as per the following ecurrence:
algorithm in merge sort. It takes O(n + T(n) = T(n-1) + O(n)
n) = O(2n) = O(n).
Q.9 (b)
Q.4 (c) Q.10 (a)
To create unique BST, we need either
inorder and preorder or inorder and LEVEL 3
postorder.
Since inorder of BST is element in
Q.1 (962)
increasing order. So, sorting of
Given file size: 70, 74, 80, 85, 102
elements take O(n logn) time then
create min heap.
design unique BST from inorder and
Algorithm: Take 1st 2 min element,
preorder will take O(n) time.
merge it, and put back result into heap,
So total time = O(nlogn) + O(n) =
again find next two min element,
O(nlogn)
merge them, repeat until one element
left.
Q.5 (b)
Since both arrays are sorted, so
applying merge procedure will take (n
+ n - 1) = O(n) time.
Q.6 (a)
If (n%2==0) then {return "not prime";}
Else {
For(i=3;i<(√n)+1;i=i+2;){
If (n % I == 0) then
{return "not prime";}
}
}return "prime";
Q.7 (b)
Time complexity of merge sort is
Θ(nLogn)
c*64 Log 64 = 30
c*64*6 = 30
c = 5/64
For time 6 minutes: Q.2 (b)
5/64*n Log n = 6*60 The recursive and iterative approach of
the same algorithm.
n Log n = 72*64 = 512 * 9
n = 512.
Q.3 (c)
Q.4 (c)
Q.8 (c)
When first element or last element is Q.5 (c)
The time complexity T(n) can be written
chosen as pivot, Quick Sort‘s worst
as: T(n) ≤ T(n/2) + O(1) ⇒ O (Log n).
case occurs for the sorted arrays.
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Data Structure & Algorithm
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• Profits: (P1, P2, …, P7) = (12, 8, 20, 8, P Q R S
10, 24, 5) (a) (iv) (i) (ii) (iii)
• Capacity of the bag (m) = 17 (b) (iv) (i) (iii) (ii)
(c) (iii) (i) (ii) (iv)
If knapsack problem is solved using (d) (iii) (i) (iv) (ii)
maximum profit per unit weight then
the overall profit is __________. Q.3 The cost of minimal spanning tree
(using prim’s algorithm) for below
Q.10 A graph G is such that every vertex is graph is ______ (root vertex is ‘a’).
connected to every other vertex via
direct link. We need to find shortest path
between two vertices using Bellman ford
algorithm. How much time does it take?
(a) O(V2 log V)
(b) O(V2)
(c) O(V3)
(d) (V+E) log V (a) 37
(b) 38
(c) 36
LEVEL 2 (d) 28
Q.1 Consider f(n), g(n) and h(n) be Q.4 Consider the following data:
function defined as follows: W1 = 2, W2 = 3, W3 = 4, W4 = 1
P1 = 10, P2 = 15, P3 = 5, P4 = 12 and
Knapsack capacity = 5
Which of the following is the possible
combination of weights for maximum
Which of the following represents profit using 0/1 knapsack concept?
correct asymptotic solution for f(n) + (a) (W1, W2)
[g(n) x h(n)]? (b) (W2, W4)
(a) Ω(n3 ) (c) (W3, W4)
(b) Ο(n4) (d) (W1, W4)
(c) Θ(n4)
(d) O(n3) Q.5 The correct matching for the following
pairs is
Q.2 Consider a list of problem and a list of (a) All pairs shortest path
corresponding time complexity using (b) Merge sort
dynamic programming: (c) Minimum weight spanning tree
Problem Time complexity (d) Connected Components
P. Matrix chain multiplication (i) O(n)
Q. Fibonacci number (ii) O(n2) (1) Greedy
R. LCS problem (m, n) (iii)O(2n) (2) Depth-first search
S. 0-1 Knapsack (m, n) (iv)O(n3) (3) Dynamic programming
(4) Divide and conquer
Which of the following is the correct
match between the problem and their (a) A-2, B-4, C-1, D-3
time complexity? (b) A-3, B-4, C-l, D-2
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(c) A-3, B-4, C-2, D-1 (a) X[m] ≥ Y[n], m, m – 1
(d) A-4, B-1, C-2, D-3 (b) X[m] ≤ Y[n], m, m – 1
(c) X[m] = = Y[n], m, m + 1
Q.6 If graph contains negative weight (d) None of these
edges then which of the following is
correct when we run dijkstra’s Q.10 Using Kruskal’s algorithm how many
algorithm? distinct minimum cost spanning trees are
(a) It may not terminate possible?
(b) It terminates but may produce
incorrect result
(c) It never terminates due to cycle in
graph
(d) None of these
(a) 3
Q.7 What is the time complexity of (b) 4
Huffman Coding? (c) 5
(a) O (N) (d) 6
(b) O (NlogN)
(c) O (N (logN) ^ 2) LEVEL 3
(d) O (N^2)
Q.1 Assume Dijkstra’s algorithm to find
Q.8 Assume Dijkstra’s algorithm is used to
the shortest paths from node ‘A’ in
find the shortest paths from node ‘A’ in
the following graph. following graph:
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(b) 44000
(c) 19000
(d) 25000
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(b) (d) (a) (b) (c) (c) (c) (a) (71) (c)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(a) (a) (a) (b) (b) (b) (b) (4) (d) (b)
LEVEL 3
1 2 3 4 5
(4) (c) (c) (c) (d)
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Adjacency list is scanned for every
SOLUTIONS vertex, when it is dequed. So overall
O(E) time to scan adjacency lists
LEVEL 1 ∴ O(V2 + E) = O(V2)
Q.8 (a)
Q.1 (b)
II, III and IV are not asymptotically
It does not give optimal solution of 0/1
tight. They can be expressed with more
knapsack problem.
tightness.
2n = o(n2)
Q.2 (d)
n2 = o(n5)
Longest common subsequence is the
n4 = ⍵(n3)
example of dynamic programming.
I is already asymptotically tight.
Q.3 (a)
Q.9 (71)
Both prim’s and kruskal’s are greedy
algorithm. P1 P2 P3 P7
, , ,...,
W1 W 2 W 3 W7
Q.4 (b) = (4, 2, 3.33, 1.142, 5, 6, 2.5)
A greedy algorithm always makes the Decreasing order of Pi / Wi is x6, x5,
choice that looks best at the moment. x1, x3, x7, x2, x4
Since capacity of bag is 17 we can only
Q.5 (c) add the following items using the
Travelling salesman problem with Pi / Wi ratio.
dynamic programming has exponential x6(4) + x5(2) + x1(3) + x3(6) + x7(2)
time complexity. Total profit = 1 × 24 + 1 × 10 + 1 × 12
+ 1 × 20 + 1 × 5
Q.6 (c) = 24 + 10 + 12 + 20 + 5
Huffman coding is a lossless data = 71
compression algorithm.
The codes assigned to input characters Q.10 (c)
are Prefix Codes, means the codes are In Bellman ford algorithm for every
assigned in such a way that the code round ‘E’ edges are relaxed. Each edge
assigned to one character is not prefix relaxation takes constant time. In
of code assigned to any other character. general there are (V – 1) rounds
This is how Huffman Coding makes excluding the verification round.
sure that there is no ambiguity when Total time = (V – 1) × O(E) × O(1)
decoding. = O(VE)
But for complete graph E = O(V)
Q.7 (c) ∴ Total time = O(V3)
In normal BFS both enqueing and
dequeing operation takes O(1) but in LEVEL 2
this algorithm it takes O(V) time.
All the vertices will be enqued and Q.1 (a)
dequed once.
∴ V(V + V) = O(V2) times
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 22
Q.4 (b)
Knapsack capacity is 5
In 0/1 knapsack, either you have to
consider full weight or no weight,
fraction is not allowed.
So, W4 = 1
W2 = 3
--------------------
Weight = 4
We will get max profit = 27.
So, (W2, W4) is the combination.
Q.5 (b)
Q.6 (b)
It terminates after |E| relations and |V|
Q.2 (a)
Matrix chain multiplication using + |E| priority queue operations, but may
dynamic programming take O(n3) time produce incorrect results.
while without dynamic programming
(nn). Q.7 (b)
Fibonacci number take O(n) using O (nlogn) where n is the number of
dynamic programming while O(2n) unique characters. If there are n nodes,
without dynamic programming. extractMin() is called 2*(n – 1) times.
LCS problem take O(n2) with dynamic extractMin() takes O(logn) time as it
programming and without dynamic called minHeapify().
programming O(22n). 0-1 Knapsack So, overall complexity is O(nlogn).
take O(n2) with dynamic programming
i.e. one of NP-complete problem, Q.8 (4)
because of very less repetition O(m, n) A → E : 3[edge e1]
≈ O(2n) and without dynamic A → D : 6[edge e3]
programming O(2n). A → B : 4[edge e2]
A → C : 9[edge e2, edge e5]
Q.3 (a) The edges e4, e6, e7 and e8 are never
In prim’s algorithm we start with root used in any of the shortest paths.
vertex and grow until the tree spans all
vertices in v. At each step an edge with Q.9 (d)
The following is the respective
lowest cost is added to the tree.
expressions for A, B and C.
A: X[m] = = Y[n]
B: m
C: m – 1
Q.10 (b)
Cost = 4 + 8 + 2 + 4 + 2 + 1 + 7 + 9
= 37
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 23
Only these four minimum cost Iteration 4:
spanning trees are possible.
LEVEL 3
Q.1 (4)
Edge (T, M), (M, E), (M, A) and (A, E)
are not included.
Q.2 (c)
Total number of characters in the
message = 100.
Each character takes 1 byte. So total
number of bits needed = 800. Q.4 (c)
After Huffman Coding, the characters It is basically matrix chain multiplication
can be represented with: problem. We get minimum number of
f: 0 multiplications using ((M1 × (M2 × M3))
c: 100 × M4).
d: 101 Total number of multiplications =
a: 1100 100×20×5 (for M2 × M3) + 10×100×5
b: 1101 + 10×5×80 = 19000.
e: 111
Total number of bits needed = 224 Q.5 (d)
Hence, number of bits saved = 800 – The LCS is of length 4. There are 3 LCS
224 = 576 of length 4 “qprr”, “pqrr” and “qpqr”.
Q.3 (c)
Iteration 1:
Iteration 2:
Iteration 3:
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Operating System
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 25
Q.10 Consider the following set of processes Q.3 Consider the exponential average
that need to be scheduled on a single formula used to predict the length of
CPU. the next CPU burst.
If α = 0 and T0 = 100 ms. The next
CPU burst time of the process is?
where T0 represents predicted burst
time of process.
Q.4 int i;
for(i=0;i<3;i++) {
Assume all times are given in
fork( );
milliseconds and round robin CPU
fork( );
scheduling is used with time quantum 2
}
msec. The average turnaround time is
If a process executes the above code,
________ (in msec).
after the execution of the code, the
number of child processes are _____.
LEVEL 2
Q.5 An operating system uses SRTF
Q.1 Let the time taken to switch between algorithm. Consider arrival time and
two process is t1, time taken to switch execution time for the following
between two kernel level threads is t2 processes:
and time taken to switch between two
user level threads is t3.
Then which of the following is true?
a) t1 < t2 < t3
b) t1 > t2 = t3
c) t1 > t2 > t3
d) t1 = t2 > t3 What is total waiting time for P1?
a) 5
Q.2 Match List1 with List2. b) 6
List1 c) 7
(A) FCFS d) 8
(B) Round Robin
(C) Working set algo. Q.6 A scheduler which selects partial
(D) SJF executed processes from secondary
storage device is called
List2 a) Short term scheduler
(1) Least response time b) Long term scheduler
(2) Min. average waiting time c) Medium term scheduler
(3) Belady’s anomaly d) Process scheduler
(4) Principle of Locality
Q.7 Considering the exponential average
a) A – 4, B – 3, C – 2, D – 1 behavior used to predict the next CPU
b) A – 3, B – 1, C – 4, D – 2 burst. If α = 0.80 and τ0 = 25 ms and
c) A – 2, B – 1, C – 3, D – 4 previous (T0, T1, T2, T3) runs were as
d) A – 1, B – 2, C – 3, D – 4 10, 12, 15, 20. The predicted value of
τ4 is _______
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 26
d) m, 0, n
Q.8 Consider the following set of processes
that need to be scheduled on a single Q.2 Which of the following is TRUE?
CPU. a) User level threads are scheduled by
the kernel.
b) When a user level thread is blocked,
all other threads of its process are
blocked.
c) Context switching between user
level threads is slower than context
What is the throughput of the system if switch between kernel level threads.
SRTF CPU scheduling is used? d) Kernel level threads cannot share
a) 0.30 data segment.
b) 0.25
c) 0.35 Q.3 A process executes the following code
d) 0.40 for (i=0 ; i < n-1 ; i + +)
fork ( );
Q.9 Disabling interrupts solution: The number of child process created is
(1) Guarantees Mutual Exclusion a) 1
(2) Guarantees Bounded Waiting b) n-1
(3) Guarantees Progress c) 2n-1 – 1
(4) Most feasible solution for real time d) 2n - 1
Which of the above statements are
true? Q.4 Suppose in a system processes arrive at
a) 1, 3 an average rate of 6 per minute. On
b) 1, 2, 3 average each process takes 8 seconds
c) 2, 4 of service time. Estimate the % of time
d) 1, 2, 3, 4 CPU is idle in a single processor
system is _____.
Q.10 What is the common problem seen in
Strict Alteration & Peterson’s solution? Q.5 Consider 3 processes A, B, C to be
a) Progress is not guaranteed scheduled as per the Shortest
b) Busy waiting Remaining Time First (SRTF)
c) Both A & B algorithm. The process 'A' is scheduled
d) None of the above first and when 'A' has run for 7 units of
time, the process 'C' has arrived.
LEVEL 3 Process C gets its CPU immediately
after arrival and has run for 1 unit of
Q.1 The maximum, minimum and time; then process B arrives and
maximum number of processes that preempts process C. Process B takes 2
can be in running, blocked and ready time units to complete its execution.
state respectively for a computer After that process C completes and at
system with n process and m CPUs is, the end process A completes. The
a) 1, n, n minimum burst time of process A is __
b) n, 0, m
c) m, 0, m .
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 27
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(c) (a) (d) (d) (d) (d) (d) (14) (b) (7.75)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(c) (b) (100) (63) (b) (c) (18.9) (a) (a) (b)
LEVEL 3
1 2 3 4 5
(d) (b) (c) (20) (12)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 28
SOLUTIONS
LEVEL 1
Q.1 (c)
By definition, the time required for the Q.9 (b)
process to complete its execution is Thread management is done in user
called Burst Time. space by thread library.
Q.3 (d)
Shortest Remaining Time First is Pre-
emptive version of SJF.
SJF is non pre-emptive.
Average = 31 / 4 = 7.75 msec
Q.4 (d)
FCFS & Round Robin are starvation LEVEL 2
free.
Q.1 (c)
Q.5 (d) Time taken for processes to switch is
Increasing or decreasing degree of more than time taken for kernel level
multiprogramming is the constraint of threads switching which is more than
long term scheduler. user level threads switching time.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 29
Q.5 (b)
Q.2 (b)
(a) is false, because user level threads
At t = 5, P1 arrives and executed for 2 are not scheduled by kernel. Kernel
ms until P2 arrives (so no waiting time level threads are scheduled by kernel.
here) At t = 13 again P1 gets the (b) is true, because OS is unaware of
execution. So waiting time for P1 = 6. user level threads. So, when one thread
is blocked entire process gets blocked.
Q.6 (c) (c) is false, because context switching
is faster in user level threads compare
Q.7 (18.9) (18.7 - 19.5) to kernel level threads.
τn+1 = α Tn + (1-a) τn (d) is false, because all the threads
τ1 = 0.8(10) + (0.2) (25) = 13 share code and data segments.
τ2 = 0.8(12) + (0.2) (13) = 12.2
τ3 = 0.8(15) + (0.2) (12.2) = 14.44 Q.3 (c)
τ4 = 0.8(20) + (0.2) (14.44) = 18.999 ≈ We know that the total number of
19.0 processes is 2n-1 but we subtract the
parent process. Therefore, total number
Q.8 (a) of child processes = 2n-1 – 1
GANTT Chart
Q.4 (20)
CPU is busy for 48 seconds.
Throughput = 6 processes × 8 seconds = 48 sec
60 seconds 100%
No. of processes
48 seconds → 48/60 × 100% = 80%
Max(completion time)- Min(Arrival time) CPU idle = 20%
4
= = 0.307
13 − 0 Q.5 (12)
Process C runs for 1 unit of time and is
Q.9 (a) pre-empted by Process B (Which takes
Disabling interrupt guarantees Mutual 2 unit of time), that means remaining
Exclusion and Progress. time of Process C when Process B
It does not guarantee Bounded waiting. (with burst time 2) arrives should be
It is not suitable for real time system minimum 3. Hence minimum burst
because interrupts are very useful in time of Process C = 1 + 3 = 4.
real time systems. Now, Process A runs for 7 unit of time
and preempted by Process C with burst
Q.10 (b) time remaining 4, that means
remaining time of Process A should be
LEVEL 3 minimum 5.
Hence minimum burst time of process
Q.1 (d) A = 7 + 5 = 12.
Ready Running Block
state state state
Min. 0 0 0
Max. n m n
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 30
Operating System
Q.4 Consider a system has 4 processes and Q.6 The necessary condition for Deadlock,
three resource types A, B, C. Resource which states that at least one resource
type A has 6 instances, B has 14 must be held in a non-sharable mode
instances and C has 3 instances. The a) Hold and wait
maximum requirement for each process b) Circular wait
and its current allocation are c) Preemption
d) Mutual exclusion
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 31
Q.8 Consider following statements with LEVEL 2
respect to interprocess communication:
S1: Message passing is useful for Q.1 A system contains 30 programs and
exchanging smaller amount of data. each requires 5 tape units for its
S2: Message passing require kernel operation. The minimum number of
support. tape units which the system must have
S3: Shared memory is faster than such that deadlocks never arise is ____.
message passing mechanisms.
S4: Shared memory is implemented Q.2 Which of the following is true for Lock
with the help of system calls and variable mechanism?
continuous requires system call support a) Mutual Exclusion is guaranteed
for exchanging data. Which of the b) Progress is guaranteed
statements are NOT TRUE? c) Bounded Waiting is achieved
a) S2 & S4 only b) S3 only d) None of this
c) S4 only d) S1 & S4 only
Q.3 Consider a non-negative counting
Q.9 What is the drawback of banker's semaphore S. The operation P(S)
algorithm? decrements S and V(S) increments S.
a) In advance process rarely knows that During an execution, 11 V(S)
how many resources that they need operations and 21 P(S) operations are
b) The number of processes changes as issued in some order. The largest initial
time progresses value of S for which at least one P(S)
c) Resource once available can operation will remain blocked is?
disappear
d) All of the above Q.4 Race condition in IPC environment
a) results when several threads try to
Q.10 Consider program for P1 and P2: read the same data concurrently
b) results when several threads try to
read & modify the same Data
concurrently
c) implies cooperation between non-
concurrent execution
d) outcome does not depend on
execution sequence
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 32
c) Mutual exclusion is never x + +; y + +;
guaranteed wait(n); wait(m);
d) Progress is not guaranteed y + +; x + +;
signal(n); signal(m);
Q.6 Assume P1 and P2 are two concurrent signal(m); signal(n);
processes and that the following data } }
are shared between processes and Which of the following is true about
initialized as given for execution. above processes?
Semaphore m = 1 a) Race condition and deadlock both
Semaphore n = 1 occurs.
int x = 0 b) Deadlock but no race condition.
int y = 0 c) Race condition but no deadlock.
Here x and y are shared resources. d) No deadlock and no race condition.
Consider the following programs for
P1 and P2. Q.8 Consider the following resource
P1 ( ) P2( ) allocation graph:
{ {
wait(m); wait(n)
x + +; y + +;
wait(n); wait(m);
y + +; x + +;
signal(n); signal(m);
signal(m); signal(n);
} }
Which of the following is true about
above processes? Which of the following is true?
a) Race condition and deadlock both a) Graph represents unsafe state.
occurs. b) The system is safe and safety order
b) Deadlock but no race condition. is P2, P4, P1, and P3.
c) Race condition but no deadlock. c) The system is safe and safety order
d) No deadlock and no race condition. is P1, P2, P3 and P4.
d) The system is safe and safety order
Q.7 Assume P1 and P2 are two concurrent is P3, P2, P1 and P4.
processes and that the following data
are shared between processes and Q.9 In dining philosopher problem with 5
initialized as given for execution. philosophers and 6 chopsticks
Semaphore m = 1 a) Deadlock is possible but not
Semaphore n = 1 starvation
int x = 0 b) Neither Deadlock nor starvation is
int y = 0 possible
Here x and y are shared resources. c) No Deadlock but starvation is
Consider the following programs for possible
P1 and P2. d) Both Deadlock & starvation is
P1 ( ) P2( ) possible
{ {
wait(m); wait(n) Q.10 Consider following statements about
deadlock:
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 33
S1: If a system is in unsafe state, the begin
process may complete its execution x=2
without entering a deadlock state. y=y+x
S2: If a process release all resources end
before request new resource, the begin
deadlocks and starvation both are y=3
possible. x=x+y
S3: Deadlock avoidance is less end
restrictive than deadlock prevention. parend
S4: In deadlock prevention, the request What can be the final value of ‘x’ and
for resources is always granted if the ‘y’ after computing the above
resulting state is safe. concurrent program.
Which of the statements are true? 1. x = 5, y = 3
a) S1, S2 and S3 2. x = 5, y = 8
b) S1 and S3 3. x = 2, y = 5
c) S3 and S4 4. x = 2, y = 8
d) S2, S3 and S4 Which of the above claims are
possible?
LEVEL 3 a) Only 1, 2, 3
b) Only 2, 3, 4
Q.1 Consider a system with 4 processes c) Only 1, 3, 4
that share 6 instances of the same d) All
resource type. Each process can request
a maximum of K instances. Resource Q.4 To provide synchronization for
instances can be requested and released producer - consumer problem with
only one at a time. The largest value of buffer size 1; minimum number of
K that will always avoid deadlock is? semaphores are required is? (Solution
should be using only semaphores)
Q.2 Consider the following statements:
S1: A thread running in critical section Q.5 Starvation problem can be solved in
may get context switched. priority based process scheduling
S2: Hardware access to devices is algorithms by
usually unavailable in user mode. a) Assigning static priorities to each
S3: Modification to the page tables are process
only possible in kernel mode. Which of b) Assigning dynamic priorities to each
the above statements are correct? process with priority of a process
a) S1, S2 directly proportional to waiting time of
b) S2, S3 the process
c) S1, S3 c) Assigning dynamic priorities to each
d) S1, S2, S3 process with priority of a process
inversely proportional to waiting time
Q.3 Consider the following concurrent of the process
program d) None of these
int x = 0
int y = 0
parbegin
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 34
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(6) (3) (a) (c) (a) (d) (c) (c) (d) (a)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(121) (b) (9) (b) (c) (b) (b) (b) (c) (b)
LEVEL 3
1 2 3 4 5
(2) (d) (a) (2) (c)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 35
SOLUTIONS Now remaining resources = (3, 5, 1) +
(3, 5, 1) = (6, 10, 2)
Finally request for P0 can be
LEVEL 1
completed. So only possible safe
sequence is <P2 P3 P1 P0>
Q.1 (6)
P1 P2 P3
Q.5 (a)
1. If we take X= 1, Y= 1, then after
2R 3R 4R
process-1 or process-3 if both are
1R 2R 3R = 6R concurrently running, then both of the
So, Maximum number of resources that
processes will block and will stuck in
are needed but still deadlock occurs = deadlock situation.
6.
2. If we take X = 2, Z = 1, Y = 0 or X =
1, Y = 0, Z = 2 then only one of the
Q.2 (3) output above mentioned will print.
7 P operations, 9 V operations 3. An X=2, Y=0, Z=2, if either
S = 1 => S = 1 – 7 + 9 = 3. So, S=3
process-1 or process-3 starts, it will set
after the given operations. value to X= 1, Y=0, Z=1 and if either
process want to interrupt, then it will
Q.3 (a) set value to X = 0, Y = 0, Z = 0 and
Deadlocks avoidance problem in an
then output will be printed.
operating system can be solved by
Dijkstra's banking algorithm.
Q.6 (d)
By Definition of mutual exclusion.
Q.4 (c)
Need matrix for processes is calculated
Q.7 (c)
as:
A cycle in resource allocation graph is
necessary and sufficient for system
with single instance resource, but for
multi instance it is necessary but not
sufficient.
Q.8 (c)
System calls are required only to
establish shared memory region. After
establishing shared memory region, all
Total allocated resources are (A, B, C)
accesses are treated as routine memory
= (5, 12, 3)
access and no assistance from the
So, remaining resources are (1, 2, 0)
kernel is required.
Here, only request for P2 can be
completed.
Q.9 (d)
Now remaining resources = (1, 2, 0) +
(0, 1, 1) = (1, 3, 1)
Q.10 (a)
This satisfies only resources for P3
P1 first executes wait(m) i.e. m = 0; P2
Now remaining resources = (1, 3, 1) +
executes wait(n) then n = 0;
(2, 2, 0) = (3, 5, 1)
(3, 5, 1) satisfied the need for P1.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 36
Now the process which will perform Signal (mutex) will never result in
wait( ) an any of the two semaphore blocking a process, when concurrent
will block. process access mutex.
Here P1 and P2 both again executes
wait( ) and goes to the block condition. Q.6 (b)
Hence deadlock occurs. No mutual No Race Condition: x can be accessed
exclusion occurs. by one process only at a time and same
as y. Both processes cannot access x or
LEVEL 2 y parallel. Hence mutual exclusions
holds; means No race condition.
Q.1 (121) Deadlock:
If 120 resources are there then it may P1( ) executes: wait(m);
be possible that all 30 process have 4 x + +;
resources and waiting for 1 more P2( ) executes: wait(n);
resource. If 121 resources are there, y + +;
then atleast one must have 5 resources Now both P1 and P2 are blocked.
so deadlock can never occur. Hence deadlock.
Q.4 (b)
Race condition occurs when two or
more processes try to modify same data
item.
Q.5 (c)
P2, P4, P1 and P3 is safe sequence.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 37
x=x + y //D
Q.9 (c) end
Deadlock never happens, but starvation For 1. ⇒A, B, C, D
to a particular philosopher may be 2. ⇒A, C, D, B
possible. 3. ⇒C, D, A, B
Q.2 (d)
Thread running in critical section may
get context switched, because, ‘locks’
(user-level) independent to the
scheduler and if thread running in the
kernel with interrupts disabled would
get context switched. S2 & S3 are also
correct statements.
Q.3 (a)
Consider
begin
x=2 //A
y=y+x //B
end
begin
y=3 //C
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 38
Operating System
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 39
LEVEL 2 Q.5 A Disk of size 40MB uses Bit Map for
free space management with a disk
Q.1 Page size has impact on which of the block of size 4KB, the number of
following: blocks needed to store the Bit Map of
I. Internal fragmentation this disk is ______.
II. Page Table size
III. Page-fault rate Q.6 On a system using simple
a) All the three segmentation, compute the physical
b) Only I & II address for each of the logical address,
c) Only II given the following segment table
d) None of these
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 40
S3: The main reason to have a Page table entries are 32 bits wide. The
hardware TLB is to speed up address page size in KB of the system should
translation be _____ in order to make sure that the
Which of the above statements are page table exactly fits in one frame of
correct? memory.
a) S1 and S2
b) S1 only Q.2 Consider the following heap in which
c) S3 only blank regions are not in use and shaded
d) S2 and S3 regions are in use.
Q.9 Mapping of logical address to physical Q.3 Consider a logical address space of
address is done with the help of eight pages of 1024 words each
a) Page table mapped onto a physical memory of 32
b) Segment table frames. How many bits are there in the
c) Both (a) and (b) logical address?
d) Either (a) or (b) a) 13 b) 15
c) 12 d) 14
Q.10 Consider a 2-level paging system with
TLB support. The page table has Q.4 In a paging system, page size is 2048
divided into 2 K pages each of size 8 K bytes. A process might need 15 frames.
words. If the physical address space What is the maximum possible internal
has 32 M words which are divided into fragmentation size?
8K frame. TLB access time is 20 ns a) 2048 bytes
and main memory access time is 200 b) 1024 bytes
ns. The CPU finds 135 page references c) 2047 bytes
in the TLB out of total reference of d) No internal fragmentation
180. Then what is the effective
memory access time? Q.5 Consider linked allocation system, a
a) 315 ns b) 270 ns program has just read the 15th disk
c) 220 ns d) 320 ns block. After some point of time, if it
next want to use the 20th block, then
LEVEL 3 how many disk blocks must the
program access?
a) 5 b) 10
Q.1 A system supports 32 bit virtual
address, with a page size of power of 2. c) 20 d) 15
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 41
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(d) (b) (d) (7) (3) (d) (1) (59) (48) (d)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(a) (a) (a) (a) (1) (c) (c) (d) (d) (d)
LEVEL 3
1 2 3 4 5
(128) (125) (a) (c) (c)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 42
SOLUTIONS 225
Number of frames = = 212
213
LEVEL 1 That's each page table entry will
contain 12 bits address of page frame
Q.1 (d) so 2 byte (byte-addressable memory)
Interrupts are useful for all of the Size of the page table = Number of
above. entries x each entry size
= 219. 21 = 220 = 1 MB
Q.2 (b)
Limit denotes number of words/bytes Q.8 (59)
in a segment, to limit a segment to SCAN:
access the memory allocated to other
segment which is protection of
memory.
Q.5 (3)
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LEVEL 2
Q.7 (c)
Q.1 (a) S1: Multi-level page table is to save
All the above three depends on page space in memory.
size directly or indirectly. S2: TLB hit time is not affected by
page table structure
Q.2 (a) S3: TLB is used for cache address
File name is not a part of UNIX-I node. translations and hence it will speed up
the entire process.
Q.3 (a) So, S1 and S2 are false.
Seek time: Time taken to get the track. S3 is true.
Latency Time: Time taken to get
desired sector. Q.8 (d)
Transfer time: Time to read data. All actions are performed during
context switching.
Q.4 (a)
If page fault rate is = p then, Effective Q.9 (d)
access time In paging → page table
k = p(x + z) + (1 - p)x In segmentation → segment table
k = px + pz + x – px For particular implementation either of
p = (k - x) / z these two is used.
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So, internal fragmentation is [50 + 35 +
40] KB = 125 KB
Q.3 (a)
Logical address space as:
Q.4 (c)
In the worst case, a process would need
n pages plus 1 byte. Then it would be
allocated n + 1 frames i.e. in the last
frame, only 1 byte is used resulting in
2048-1, 2047 bytes of internal
fragmentation.
Q.5 (c)
Since in linked allocation, to find the ith
block, we must start at the beginning of
that file and follow the pointer until we
get to the ith block. No random access
is possible. So to read the 20th block, it
has to come from first again.
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Database Management System
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 46
between a weak & a non weak entity S (C B) C primary key and attribute
set. “B” of relation “R” is foreign key
a) II only references to S and no NULL values in
b) III only both relations and both R and S
c) II, III only consists more than two records. Which
d) I and II only of the following statement is false?
a) ΠB (R) – ΠC (S) always empty.
Q.2 Consider the following relations: b) Πc (S) – ΠB (R) may not empty.
R1 (PQR) and R2 (PST) c) ΠB (R⋈R.B=S.c S) – Πc (S) always
R1 has 500 records and R2 has 800 empty.
records. The non-Null attribute ‘P’ in d) ΠB (R⋈R.B≠S.C S) – Πc (S) may not
R2 is referencing attribute ‘P’ in R1. empty.
The maximum number of records
present in R1 ⋈ R2 is _____. Q.6 Which of the following statements
is/are true?
Q.3 The following table has two attributes S1: In relational algebra σ (selection)
A and C where A is the primary key operation is NOT commutative.
and C is the foreign key referencing A S2: In relational algebra Π (projection)
with on-delete cascade. operation is commutative.
a) Only S1
b) Only S2
c) Both S1 and S2
d) Neither S1 nor S2
Q.4 Consider the following ER diagram: Q.8 Processor and I/O Ports is an example
of
a) One-to-one relationship
b) One-to-many relationship
c) Many-to-one relationship
d) Many-to-many relationship
The minimum number of relational Q.9 Let R(a, b, c) and S(d, e, f) be two
table required for above ER diagram is relations in which d is the foreign key
_______ of S that refers to the primary key of R.
Consider the following four operations.
Q.5 Consider the following relations: (1) Insert into R
R (A B) A primary key (2) Insert into S
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 47
(3) Delete from R
(4) Delete from S
Which of the following is true about
the referential integrity constraint
above?
a) None of them can cause any If ‘n’ entries in E1 and ‘m’ entries in
violation E2. How many entries in relationship
b) All of the can cause violation set (R)?
c) Operations (1) and (2) can cause a) At least n
violation b) At most n
d) Operations (2) and (3) can cause c) Exactly n
violation d) At least n and At most m
Q.10 Find out the degree of the relationship. Q.3 Consider the following relation:
A student uses exactly one notebook Supplier (Sid, Sname, Address)
for each project. Each notebook Parts (Pid, Pname, Color)
belongs to one student for each project. Catalog (Sid, Pid, Cost)
Note that a student may still work on Retrieve pairs of Sids such that the
many projects and maintain different supplier with the first Sid charges more
notebooks for different projects. for some part than the supplier with the
a) Unary second Sid.
b) Binary Q1: πsid,s (Catalog
c) Ternary ⋈ (Sid≠S ∧ Pid=P ∧ cost>c) ρS, P, C (Catalog))
d) Two binary relations Q2: πsid,s (Catalog
⋈ (Sid ≠ S ∧ Cost > S) ρS, P, C (Catalog))
LEVEL 3
Which of the following is correct about
Q.1 Consider the following relations: above queries?
R(A B) A is primary key a) Q1 correct but not Q2
S(C D E) C is primary key and D is b) Q2 correct but not Q1
alternative key. An attribute “B” of c) Q1 and Q2 both correct
relation R is foreign key references to d) Q1 and Q2 both false
alternative key D of relation S. Which
of the following statement is true? Q.4 Which is the optimized version of the
a) Every record of R must references to relational algebra expression?
some record of S. ПA1 (ПA2 (σF1 (σF2 (r)))
b) Each record of R can references to at Where A1, A2 are sets of attributes in r
most one record of S. with A1< A2 and F1, F2 are
c) Each record of R can reference zero Boolean expression based on attributes
or more record of S. in r.
d) Each record of R must reference one a) ПA1 (σF1⋂F2 (r))
or more record of S. b) ПA1 (σF1⋃F2 (r))
c) ПA2 (σF1⋂F2 (r))
Q.2 Consider the following ER model: d) ПA2 (σF1⋃F2 (r))
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 48
How many tuples will be in the result
of the following relational algebra
expression?
(STUDENT ⨝AGE ≥ 25 ⋂ STUDENT.SID =
RESERVE.SID RESERVES ⨝
GATEEXAM)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 49
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(c) (c) (b) (c) (a) (d) (b) (b) (c) (b)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(a) (800) (6) (4) (d) (d) (d) (d) (d) (c)
LEVEL 3
1 2 3 4 5
(b) (c) (a) (a) (4)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 50
SOLUTIONS LEVEL 2
Q.1 (a)
LEVEL 1
Q.1 (c)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 51
ΠB (R⋈R.B≠S.C S) – Πc (S) is always Remaining records of R references to
empty. at most one record of S.
All foreign keys values – All primary
key values = Always empty
Q.6 (d)
Both the statements are incorrect.
The select operation is commutative
i.e. σc1 (σc2 (R)) ↔ σc2 (σc1 (R)).
Ultimately only those tupples will be
selected which satisfy both C1 and C2.
Hence order does not matter.
But Π (projection) operation is not Q.2 (c)
Here, E1 has Key + Participation
commutative.
Π a1 (Π a2 (R)) ↔ Π a2 (Π a1 (R)) if and Constraint. So E1 must relate with
exactly one entry of E2.
only if a1 is substring (or subset) of a2,
otherwise operation would be E2 has Only Key Constraint. So E2
incorrect. relate with at most one entry of E2.
E2 has more or equal entries in relation
(table of E2).
Q.7 (d)
With any proper subset of the entity set So, exactly n entries in relationship set
(R).
we cannot uniquely identify any
passenger. Thus all entities are required
to form primary key. Q.3 (a)
Queries 1 will return pairs of Sids such
that the supplier with the first Sid
Q.8 (d)
Processor can have more than one I/O charges more for some part than the
ports and I/O process can be assigned supplier with the second Sid. Which is
to more than one processor in multi- possible by the condition that is when
core processor system. two supplier id is different but part id is
same and charges of first supplier is
more than second supplier.
Q.9 (d)
Insertion into child table and deletion Queries 2 will return empty set because
from parent table can cause violation. we compare cost with Sid which
always returns empty set.
Q.10 (c)
Degree of relationship is ternary Q.4 (a)
because relationship will keep three Since, A1 < A2, final relation R
entity students, notebook and project. displaying values for attributes will be
present in set A1.
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Database Management System
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Employee ID Salary How many records resulted by above
101 10k query on given instant of relation R?
202 25k a) 1
333 17k b) 2
454 NULL c) 3
The following sequence of SQL d) 4
statements was successfully executed
in table T1. Q.4 Given relation R(P, Q, R, S, T) and set
Update T1 set salary = salary + 5k; of functional dependencies
select avg(marks) from T1; F = {PQ → R, PQ → S, S → P, QR →
What is the output of the select S, QR → T} The highest normal form
statement? satisfied by R is
a) 18 a) 1NF
b) 16.75 b) 2NF
c) 25 c) 3 NF
d) NULL d) BCNF
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 54
candidate keys are simple candidate
key.
d) Relation R must consist at least two
compound candidate keys.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 55
Which of the following query results {AB → C, BC → A, AC → B, B → D,
“all students who never got a grade D → E}.
above 4.0”? The minimum relations required to
a) Only Q1 decompose R into BCNF which satisfy
b) Only Q2 lossless join and dependency
c) Both Q1 and Q2 preserving decomposition is ______.
d) None of them
Q.5 What is the output of following SQL
Q.2 What does the following SQL query query?
find if applied on relation Select * from student S where not
emp (ssn, name, salary); exists (select * from course C
SELECT MAX (E1.salary) FROM where C.ID = S.ID and C.MARKS >
emp E1, emp E2 WHERE 60)
E1.salary < E2.salary; a) Displays all students who never got
a) It finds the highest salary available marks above 60
in the given relation. b) Displays all students who never got
b) It finds the second highest salary marks less than equal to 60
available in the given relation. c) Displays all students who got marks
c) It finds the lowest salary available in above 60
the given relation. d) Displays all students who got marks
d) It finds the second lowest salary less than 60
available in the given relation
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 56
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(d) (d) (d) (a) (c) (a) (d) (c) (d) (b)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(c) (240) (b) (c) (d) (c) (b) (d) (c) (c)
LEVEL 3
1 2 3 4 5
(c) (b) (4) (4) (a)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 57
SOLUTIONS Q.9 (d)
Both (b) and (c) cannot be derived.
Because, for one value Smith there are
LEVEL 1 two different DNAME. Same with
PNAME.
Q.1 (d)
Q.10 (b)
(AB)+ = ABCDEF Average = (15 + 30 + 22 + null) / 4
(AC)+ = ACDEFB
= 16.75
(AD)+ = ADEFBC
(AF)+ = AFBCDE
(AE)+ = AEFBCD LEVEL 2
There are 5 candidate keys are present
for given relation. Q.1 (c)
F1 covers F2: True
Q.2 (d) F2 covers F1: True
BCNF satisfied all the conditions that
are followed from 1NF and 2NF and is Q.2 (240)
more strict than 3NF. If there are m attributes in relation and
n simple candidate keys then maximum
Q.3 (d) number of super keys possible
= [2n – 1] × 2m-n
Q.4 (a) = [24-1] × 24
Foreign key is used to connect two = 15 × 16 = 240
tables with parent-child relationship
between them. Q.3 (b)
Given query will result tupple where A
Q.5 (c) ≥ 5 (i.e. A =5, 6, 10, 8) and B ≥ C (i.e.
Main objective of primary key is to B = 8 because we cannot compare Null
search data easily and by indexing it values) or C ≥ 5 (i.e. C= 5, 6, 5 because
we can order the data in sequential we cannot compare Null values) so the
manner. resulting tupples are 2 i.e. A=6, A=8.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 58
W+ → WVSRT, Hence it can be second statement will not execute,
decomposed to W → R, W → T because primary key cannot be
So, the dependencies remained are NULL.
W → V, W → S, T → S, W → R, W
→ T, QS → P LEVEL 3
Now, {W → T, T → S} by transitive
rule W → S can be obtained.
Q.1 (c)
Hence minimal cover is: W → V, T →
Both query results students who never
S, W → R, W → T, QS → P.
got a grade above 4.0 but 1st query also
give those students who never enrolled
Q.6 (c)
any course.
If relation R is in 3NF but not BCNF
then at least two compound keys must
Q.2 (b)
exist where non-trivial FD with
Condition E1.salary < E2.salary; will
determinant is not super key.
find all salaries accept highest.
Aggregate function MAX(E1.salary)
Q.7 (b)
will find maximum of all salaries
(a) and (c) can be derived by given
which are less then highest salaries i.e.
FDs. But (b) cannot be derived by any
second highest salary.
FD.
Q.3 (4)
Q.8 (d)
The output Table will be
It follows partial dependency, so it is
not in 2 NF.
Q.9 (c)
The six basic operators of relational
algebra are the selection (σ), projection
(π), Cartesian product (×), Set union
(U), Set difference (–), and Rename
(ρ). Many other operators have been Q.4 (4)
defined in terms of these six. Among Given relation is in 1NF.
the most important are set intersection, For 2NF:
division, and the natural join, but
aggregation is not possible with these R1(ABCDFG)
basic relational algebra operations. So, AB → C
we cannot run sum of all marks with BC → A
the six operations. AC → B
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BC → A
AC → B
R2(BD)
B→D
R3(DE)
D→E
R1(ABC) R2(ABFG)
AB → C
BC → A
AC → B
R2(BD)
B→D
R3(DE)
D→E
Q.5 (a)
Inner query results all students who got
marks above 60. Now Not exist will
display all students who never got
marks above 60.
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Database Management System
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c) A-1, B-2, C-2, D-1 which are working on two data items
d) A-2, B-2, C-1, D-1 namely A and B:
S: R4 (A), R2 (A), R3 (A), W1 (B),
W2 (A), R3 (B), W2 (B)
LEVEL 2 Which of the following is correct?
a) The schedule cannot be serialized
Q.1 Which of the following claims are
b) The schedule is equivalent to T3,
correct about strict 2PL? T4, T1, T2
I. Guaranteed conflict serializability
c) The schedule is equivalent to T1,
II. Guaranteed strict recoverable T4, T3, T2
III. Guaranteed deadlock avoidance
d) The schedule is equivalent to T2,
a) I, II only T3, T1, T4
b) I only
c) I, II, III Q.5 Consider the following schedules:
d) II, III only
S1: r1(x), r2(z), r1(z), r3(x), r3(y),
w1(x), c1, w3(y), c3, r2(y), w2(y),
Q.2 Suppose the process P has been
w2(z), c2
running for several days when a new S2: r1(x), r2(z), r1(z), r3(x), r3(y),
process Q starts up and begins
w1(x), w3(y), r2(y), w2(z), w2(y), c1,
contending with P for resources. Which c2, c3
of the following is true?
S3: r1(x), r2(z), r3(x), r1(z), r2(y),
a) In a wait-die system, if P needs a r3(y), w1(x), c1, w2(z), w3(y), w2(y),
resource held by Q, then P waits.
c3, c2
b) In a wait-die system, if Q needs a The number of above schedules
resource held by P, then Q waits.
recoverable is _______.
c) In a wound-wait system, if P needs a
resource held by Q, then Q yields and
Q.6 Consider the following schedules:
waits.
d) In a wound-wait system, if Q needs
a resource held by P, then Q dies.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 62
S: R2(A) W1(B) W1(C) R3(B) R2(B)
R1(A) C1 R2(C) C2 W3(A) C3 Q.10 Which of the following is true about
Which of the following is correct about the given schedule ‘S’?
above schedule?
a) Schedule(S) is not conflict
serializable schedule.
b) Schedule(S) is allowed by 2PL.
c) Schedule(S) is strict recoverable
schedule.
d) Schedule(S) is allowed by strict
2PL.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 63
on A. If exclusive locks are held until
the end of transaction and shared locks
can be released at any time then which
of the following properties are
guaranteed?
a) Conflict serializability
b) Recoverability
c) Avoids cascading rollbacks
d) All of the above
The minimum number of key
Q.3 A database relation has 5000 records insertions that causes a new level to be
block can hold either 10 records or 15 introduced in the above B+ tree _____.
keys and pointer pairs. If sparse index (Assume key redistribution is not
is used at 1st level and multilevel allowed)
indexing is used in system, then the
number of disk block required to store
relation and index is ________
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 64
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(b) (b) (b) (c) (c) (d) (d) (a) (c) (d)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(a) (a) (d) (c) (2) (d) (b) (b) (36) (d)
LEVEL 3
1 2 3 4 5
(10) (d) (538) (a) (3)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 65
Primary index and clustered index are
SOLUTIONS sparse. Secondary key and non-key
index are dense.
LEVEL 1
LEVEL 2
Q.1 (b)
Q.1 (a)
In sparse index number of entries
Every 2PL is conflict serializable, and
depends on number of data block in
every strict 2PL is always guaranteed
previous level.
to be strict recoverable but not
In dense index number of entries
deadlock free.
depends on number of data record in
previous level.
Q.2 (a)
In wait-die scheme, when transaction
Q.2 (b)
Ti request a data items currently held
Shared locks can be shared by different
by Tj, Ti is allowed to wait only if it
transactions simultaneously.
has a time stamp smaller than that of Tj
otherwise Ti is rolled back (die). Here
Q.3 (b)
process P is running so it has time
stamp less than process Q now if
Q.4 (c)
process P need a resource held by
Isolation is managed by concurrency
process Q then process P has to wait.
control component.
Q.3 (d)
Q.5 (c)
2PL ensures conflict serializability but
Isolation ensures that no transaction
may lead to deadlock.
will affect the existence of any other
Time-stamp concurrency control
transaction.
algorithm is a non-lock concurrency
control method. In time-stamp based
Q.6 (d)
method, deadlock cannot occur as no
The above all and lost update problem
transaction ever waits.
are all effects of executing multiple
transactions concurrently. Q.4 (c)
The precedence graph of the given
Q.7 (d) schedule is
Conservative 2PL is deadlock free.
Q.8 (a)
Q.9 (c)
Both Basic timestamp and Thomas
write rule timestamp schedule accepts
view serializable schedule. Therefore schedule is equivalent to
(T1, T4, T3, T2), (T1, T3, T4, T2) and
Q.10 (d) (T4, T1, T3, T2).
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 66
Q.5 (2)
In S2: w3(y) is first and r2(y) appears
second
Hence, c2 should appear after c3.
In recoverable [If Ti reads a value
written by Tj, then Ti must commit
after Tj commits] Schedules S1 and S3
are recoverable.
Q.6 (d)
Checking for conflict serializable:
Q.10 (d)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 67
The given schedule is not serializable,
since it is not conflict serializable, not Q.4 (a)
view serializable. Content of index <key, BP> = 6 + 10 =
16
Block factor of database = 512 / 16 =
LEVEL 3 32
Number of block in database =
Q.1 (10) 8192 / 32 = 256
In first level entry for each record,
Number of blocks in first level =
Number of database block
Entry of 1st level
256
= =8
32
In second level
Number of blocks in second level =
Number of 1st level Block
Entry size of 2nd level
8
= =1
32
Q.5 (3)
If we insert keys 45, 48, 55 in same
Q.2 (d)
order, then on insertion of key 55, root
The given locking protocol follows the
will be overflow and new level will be
properties of strict 2 PL which is
created.
conflict serializable, recoverable and
avoids cascading rollbacks.
Q.3 (538)
Disk block size = 5000 records
Block size = 10 records or 15 (keys +
Pointers)
Sparse index at 1st level. So number of
disk block at 1st level is number of
block in database.
Database = 5000 / 10 = 500 blocks
500
1st level = =
15 = 33.33 34 blocks
34
2nd level = = 15 =
2.26 3 blocks
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 68
Computer Networks
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 69
LEVEL 2 b) It can be used with slotted aloha but
not with carrier sense multiple access.
c) Over a short time scales, it improves
Q.1 Which of the following MAC address the fairness of the throughput achieved
represent multicast address?
by different nodes compared to not
a) 24:2B:34:59:48:1B using the mechanism.
b) B4: B3:C7:C5:89:10
d) It ensure that two or more nodes that
c) B3:B4:C5:C7:10:89 experience a collision in a time slot
d) Both (a) and (c)
will experience a lower probability of
colliding with each other when they
Q.2 Consider the following statements:
each retry that packet.
S1: Data link layer define the
boundaries of frames because framing
Q.5 The maximum length of the cable
is always of fixed size. (min) for transmitting data at a rate of
S2: Bit stuffing is the process of adding
600 Mbps in IEEE 802.3 LAN with a
one extra 0 after 6th bit whenever five frame size of 18,000 bits is ______
consecutive 1’s follow a 0 in the data,
meter. (Assume the signal speed in the
if 0111110 is assumed as a flag. cable to be 2,50,000 km/s)
Which of the following option is
correct?
Q.6 If a network designer wants to connect
a) Only S1 is true.
5 routers as point-to-point simplex line,
b) Only S2 is true. then total number of lines required
c) Both S1 and S2 are true.
would be?
d) Neither of S1 or S2 is true. a) 5
b) 10
Q.3 Which of the following are not true in c) 20
IEEE 802.3?
d) 32
S1: The maximum frame size that is
supported by IEEE 802.3 is 1500 bytes
Q.7 Start and stop bits are used in serial
S2: The maximum payload that is
communication for
supported by IEEE 802.3 is 1518 bytes
a) Error detection
S3: Minimum frame size and payload
b) Error correction
size are 46 and 64 bytes respectively.
c) Synchronization
a) Only S3
d) Slowing down the communication
b) Only S2 and S3
c) Both S1 and S2
Q.8 Select incorrect statement in error
d) All of these
retransmission used in continuous
ARQ method.
Q.4 Binary exponential back off is a
a) Go-back-N method requires more
mechanism used in some MAC
storage at the receiving side
protocols. Which of the following is
b) Selective repeat involves complex
true?
operation than GO-back-N
a) It ensures that two nodes that
c) Go-back-N has better line utilization
experience a collision in a time slot
d) Selective repeat has better line
will never collide with each other when
utilization
they each retry that packet.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 70
Q.9 Consider a 10 km long broadcast LAN transmissions of a frame to make it
has 1010 bps bandwidth and uses success is _____.
CSMA/CD. The signal travels along
Q.3 Assume there are 100 nodes connected
the wire at 2.5 ×108 m/s. What is the
to a 1000 meter length of the coaxial
minimum packet size that can be used
cable. Using some protocol, each node
on this network?
can transmit 50 frames/second, where
a) 106 bits the average frame length is 2500 bits.
b) 107 bytes The transmission rate at each node is
c) 104 bits 108 bps. The efficiency of this protocol
is ____. (Upto 1 decimal place)
d) 105 bytes
Q.4 In synchronous transmission, 5 eight
Q.10 Choose the best matching between bit characters are included in 30 eight
List-I and List-II bit information characters. If bit rate of
List-I (Protocol) sender is 4200 bits/sec, what is the bit
A. MAC, LLC, PPP rate of receiver (in bits per sec)?
B. DHCP, ICMP, BGP
C. Telnet, FTP, SMTP Q.5 Consider a network connecting two
nodes A and B having propagation
List-II (Layers)
delay of 3 ×104 µ sec . Bandwidth of
1. Application Layer
2. Transport Layer network is 50 Mbps. If each frame size
3. Network Layer is 5000 bytes and both uses Go-Back-N
4. Data link layer sliding window protocol, where
maximum 100 frames can be sent at a
Codes: time then the maximum possible data
a) A-3, B-2, C-4 rate is ____ (Mbps)
b) A-3, B-4, C-1
c) A-4, B-3, C-1
d) A-1, B-2, C-3
LEVEL 3
Q.1 Consider a 40 Kbps satellite link has a
propagation delay of 504 ms. The
transmitter employs the “go back n
ARQ” scheme with n set to 15.
Assuming that each frame is 105 bytes
long, the maximum data rate possible
is ______ (in kbps). (Upto 2 decimal
places)
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(d) (d) (a) (c) (b) (a) (a) (c) (a) (c)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(c) (d) (d) (d) (3750) (b) (c) (c) (d) (c)
LEVEL 3
1 2 3 4 5
(12.24) (10) (12.5) (3500) (66.67)
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Encryption and decryption of data are
SOLUTIONS responsibility of presentation layer.
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 73
off mechanism used in CSMA
protocol. Q.9 (d)
Minimum packet size =
Q.5 (3750) 2×Distance×Bandwidth
Tt ≥ 2Tp Velocity
Distance = 10 km
Frame length Distance
⇒ ≥2* Velocity = 2.5 ×108 m/s
Bandwidth Speed
Bandwidth = 1010 bps
18000 2x
⇒ 6
≥ Minimum packet size =
600*10 250000 km
2×10×103 ×1010
18 × 10 × 25 × 104
3
= 8 ×105 bits =
⇒ Km ≥ 2x 2.5 ×108
600 × 106 5
⇒ x = 3.75 km 10 bytes
So, x = 3750 m
Q.10 (c)
Q.6 (b) Option (c) is the best matching.
If 1st router connects with other 4
routers then total for 1st = 4. Same as
2nd router connects with 3 routers, so LEVEL 3
total for 2nd = 3. Same as for 3rd router
connects with 2 routers, so total = 2. Q.1 (12.24) [12.23 - 12.25]
Same as 4th router connects with 1. So Tx = 105 x 8 bits / 40 Kbps = 21 ms
total simplex lines will be = 4 + 3 + 2 + Tp = 504 ms
1 = 10. So answer is ‘b’. Tp
a= = 504 / 21 = 24
Tx
Q.7 (c)
Start and stop bits are used to W
Efficiency of GBN =
synchronize sender and receiver in (1 + 2a )
serial communication. where, W = Window size
= 15 / (1 + 48)
Q.8 (c) = 15 / 49
Go-back-N has better line utilization is BW utilization or throughput or
incorrect statement. Because if there is maximum data rate = Efficiency × BW
an error at the receiver the frames must = 15 / 49 × 40 kbps = 12.24 Kbps
be retransmitted where the error
occurred in the transmission. Q.2 (10)
Option (a) is correct because in Go- The mean number of transmissions
Back-N method sometimes when before successful transmission is 1 / p,
acknowledgement is not received by where p is the probability of frame
sender then sender assumes that packet reaching safely. Therefore required
is not received by receiver so he again number of transmissions are 1/0.1 = 10.
sends the packet. So receiver requires
more memory to store. Q.3 (12.5) [12.4- 12.6]
Selective repeat involves complex Node throughput = 50 frames/sec
processing than GO-back-N is correct. = 50 x 2500 bits/sec
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= 125000 bits/sec
System throughput = 125000 × 100
nodes = 125 × 105 bps
Maximum system rate = 108 bits/sec
125*105
Efficiency = × 100 = 12.5 %
108
Q.4 (3500)
Synchronous bits are not taken by
receiver.
They are sent by sender just to alert the
receiver about the incoming data.
5 eight bit character = 40 bits
30 eight bit character information =
240 bits
40 synchronous bits → 240 info bits
X Synchronous bits → 4200 info bits
X = 40 * 4200 / 240 = 700
synchronous bits
Q.5 (66.67)
Bandwidth = 50 Mbps
Frame size = 5000 bytes
Propagation delay = 3 ×104 µ sec
= 30 msec
So in 1RTT =
30×2×10-3×50×106 bits
= 3000×103bits
But maximum bits that can be
transferred in one time = 100 frame
= 5000 × 8 × 100 bits
= 4000000 bits
So, effective bandwidth =
4000000
×50 Mbps
3×106
4
= ×50×106 bps
3
= 66.67×106 bps
= 66.67 Mbps
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Computer Networks
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 76
b) 255.255.0.0 d) Under some circumstance, a circuit
c) 192.127.255.255 switched network may prevent some
d) 255.0.0.0 sender from starting new conversation.
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transmission delay of 20 ms. Assume
that the transmission time for the
acknowledgment and the processing
time at nodes are negligible. It's needed
to design a selective repeat sliding
window protocol for this network.
Then the minimum size in bits of the
sequence number field to achieve a link
Q.5 A router uses the following routing utilization of atleast 50% has to be __.
table:
Q.8 Two computers C1 and C2 are
configured as follows:
• C1 has IP address 197.168.76.24 and
network mask 255.255.192.0.
• C2 has IP address 197.168.114.28
and network mask 255.255.224.0.
Find the next hop (where router will Which one of the following statements
send the packet), if the router has IP is true?
address “205.32.16.63” a) C1 and C2 both assume they are on
a) R0 the same network.
b) R1 b) C2 assumes C1 is on same network,
c) R2 but C1 assumes C2 is on a different
d) R3 network.
c) C1 assumes C2 is on same network,
Q.6 Consider a source computer (S) but C2 assumes C1 is on a different
transmitting a file of size 105 bits to a network.
destination computer (D) over a d) C1 and C2 both assume they are on
network of three routers (R1, R2 and the different networks.
R3) and four links (L1, L2, L3 and L4).
L1 connects S to R1; L2 connects R1 Q.9 Following specifications are given for
to R2; L3 connects R2 to R3 and L4 a packet switch network.
connects R3 to D. Let each link be of Bandwidth = 200 bps
length 100 km. Assume signals travel Packet Size = 5000 bits
over each link at a speed of 108 meters Distance between two hopes = 500 m
per second. Assume that the link Speed of signal = 80 m/s
bandwidth on each link is 1 Mbps. Let Number of hopes = 11
the file be broken down into 100 Find the total time for a packet to travel
packets each of size 1000 bits. The from sender to receiver.
total sum of transmission and
propagation delays in transmitting the Q.10 How many class-B Hosts per network
file from S to D is _______ (in msec). (Usable Addresses) are possible?
a) 254
Q.7 Consider a network connecting two b) 65534
systems 10000 km apart. The c) 65535
propagation speed of the media is 4 x d) 255
106 meters per second. Link has a
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LEVEL 3 d) 172.89.0.1/26 and
172.89.255.254/26
Q.1 Consider hierarchal routing with 4800 Q.5 Consider the following scenario:
routers, they are divided in hierarchy as
clusters, regions, routers. What is the
minimum size of routing for three level
hierarchy?
a) 5, 48, 20
b) 3, 80, 20 Suppose a TCP message that contains
c) 15, 16, 20 900 B of data and 20 B of TCP header
d) 5, 24, 40 is passed to IP code at host A for
delivery to B. IP header is of 20 B.
Q.2 Which of the following statements is Assume that link A-R1 has maximum
TRUE about IPv4 protocol? frame size of 1024 B including a 14-B
a) A best-effort delivery service, best- frame header, link R1 – R2 can support
effort means that IPv4 provides no a maximum frame size of 512 B,
error control or flow protocol. including an 8 B frame header and link
b) TTL field is used to optimize R2 – B can support a maximum frame
throughput. size 512 B including a 12 B frame
c) IPv4 supports only unicast and header.
broadcast addressing mode. The lengths of the last fragment at each
d) ARP is used to acquire the IP of the three links respectively are:
address of a host whose MAC address a) 920; 440; 440
is known. b) 960; 460; 440
c) 960; 460; 460
Q.3 Consider the flow specification having d) 940; 460; 460
the maximum packet size 800 bytes,
token bucket rate of 8 × 106 bytes/sec.
Token bucket size is 4 MB and the
maximum transmission rate 16 × 6
bytes/sec. The time for which burst be
send at maximum speed will be ____
(in sec). (Up to 2 decimal places)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 79
ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(d) (c) (d) (a) (a) (a) (d) (b) (c) (a)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(b) (d) (b) (c) (d) (107) (8) (c) (312.5) (b)
LEVEL 3
1 2 3 4 5
(c) (a) (0.50) (d) (d)
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SOLUTIONS Q.8 (b)
IP address of network: 143.128.67.235
/ 20
LEVEL 1 143.128.0100 0011.11101011
Last IP address assigned to any host:
143.128.01001111.11111110
Q.1 (d)
3rd octet: 01001111 = 79
Total number of networks = 27 , from
which 2 networks are reserved. So, 126 Q.9 (c)
numbers of networks are possible. Network id is computed by ANDING
of Network mask and IP address.
Q.2 (c) Here, Network mask is 255.255.0.0,
Distance vector and link state are intra because of Class B network.
domain routing protocol (routing inside By doing AND operation, answer will
an autonomous system is intra domain be 130.60.0.0.
routing)
Routing information protocol is based Q.10 (a)
on distance vector routing follows In a limited broadcast packet
Bellman ford algorithm and OSPF is destination address is all ones.
based on link state routing follows
Dijkstra algorithm.
LEVEL 2
Q.3 (d)
In IPv6 address: Q.1 (b)
Prefix bits: 001 indicate geographic Since packet encapsulate datagram and
unicast address. frame encapsulate packet. So, cannot
Prefix bits: 010 indicate provider change IP address and port number but
unicast address. destination MAC address may change
So, both statements are false. on intermediate routers.
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Routing table for ‘V’ by using Dijktra's N
≤1/2
Algorithm. 1 + 2a
V to V = 0 Tp
V to W = 4(Via V) a=
Tt
V to X = 12(Via W) Tp (Propagation delay) = d / v =
V to Y = 10(Via V)
V to Z = 15(Via X) 1000*103
= 2.5 sec
4*106
Q.5 (d) Tt (Transmission delay) = 20 msec
Routing in classless addressing follows
“Longest Mask Matching”. This states a = 2.5 / 20*10-3 = 125
that the routing table is sorted from the N 1
≤
longest mask to the shortest mask. 1 + 2*125 2
So, here firstly start with /27
To find N/W address = (Window size) N ≤ 125.5
205.32.16.63 AND 255.255.255.224 In selective repeat protocol, the
= 205.32.16.32 {Matched with R3} window must be less than half the
So, interface chosen is R3. sequence number space.
Q.6 (107) 2m
≤ 125
2
2m-1 ≤ 125
2m-1 = 27
Propagation delay to travel from S to m=8
R1
Distance Q.8 (c)
= 105 / 108 = 1ms Subnet/Network mask is to check
Link Speed whether some other IP belongs to the
same network or some other network.
Total propagation delay to travel from Case-I:
S to D = 4 * 1ms = 4ms. (IP of C1) IPc1 = 197.168.76.24
Total transmission delay for 1 packet = (Network mask of C1) NMc1 =
Number of bits 255.255.192.0
4* = 4 * (1000) / 106
Bandwidth NIDc1c1 = 197.168.64.0
= 4 ms
So the first packet will take 8 ms to Network ID of C2 as per C1:
reach D. While first packet was (IP of C2) IPc2 = 197.168.114.28
reaching D, other packets must have NMc1 = 255.255.192.0
been processing in parallel. NIDc2c1 = 197.168.64.0
So D will receive remaining packets, 1
packet per 1 ms from R3. So remaining Since, NIDc1c1 = NIDc2c1
99 packets will take 99 ms and total So, C1 will assume C2 is on the same
time will be 99 + 8 = 107 ms. network.
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(Network mask of C2) = 255.255.224.0 IPv4 supports multicast addressing
NIDc2c2 = 197.168.96.0 mode along with unicast and broadcast
addressing mode.
Network ID of C1 as per C2: ARP is used to acquire the MAC
IPc1 = 197.168.76.24 address of a host whose IP address is
NMc2 = 255.255.224.0 known.
NIDc1c2 = 197.168.64.0
Q.3 (0.50)
Therefore, NIDc1c2 # NIDc2c2 C
t=
So, C2 will assume C1 is on a different M −ρ
network. Where, C: Capacity of token bucket
ρ : Token generation rate
Q.9 (312.5)
Formula for total time in packet switch M: Maximum data rate of token bucket
network = t = Time for which token bucket can
send the data with maximum data rate.
M d
(x-1) + (x-1) , where So, t=
B v
4*106 bytes
x = Number of hopes
M = Packet Size 16*106 bytes / sec− 8*106 bytes / sec
B = Bandwidth t = 4 / 8 = 0.50 sec.
d = distance between hopes
v = speed of signal Q.4 (d)
So, 10*25 + 10*6.25 Number of subnets = 1024
= 250 + 62.5 Bits required for subnet = 10
= 312.5 s Subnet mask = 255.255.255.192
[i.e. take bits from host portion]
Q.10 (b) Number of hosts = 26 – 2
Class B network has 16 host bits. Ranges are:
From which 2 hosts cannot be used. 172.89.0.0/26 to 172.89.0.63/26
So, (216 – 2) = 65,534. 1st subnet
172.89.0.64/26 to 172.89.0.127/26
2nd subnet
LEVEL 3 :
:
Q.1 (c) 172.89.255.192/26 to
For hierarchical routing, table size 172.89.255.255/26
should be reduced logically, so that 1024th subnet
searching time reduces. 5+48+20 = 73 So, first host address will be
3+80+20 = 103 172.89.0.1/26 and last host address will
15+16+20 = 51 be 172.89.255.254/26.
5+24+40 = 69
Here, 51 is minimum. So, option (c) is
Q.5 (d)
correct. Frame header is the header attached at
DLL. Since fragmentation is at
Q.2 (a) network layer. Hence MTU for A – R1
TTL field is used to prevent packet → 1010B
looping.
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MTU for R1 – R2 → 504B
MTU for R2 – B → 500B
Total IP packet size → 940 B [920 B +
20 B]
Link A-R1:
Length = 940, DF = 0, MF = 0, Offset
=0 [920 B + 20 B]
Link R1 – R2:
1. Length = 500, DF = 0, MF = 1,
Offset = 0 [480 B + 20 B]
2. Length = 460, DF = 0, MF = 0,
Offset = 60 [440 B + 20 B]
Link R2 – B:
1. Length = 500, DF = 0, MF = 1,
Offset = 0 [480 B + 20 B]
2. Length = 460, DF = 0, MF = 0,
Offset = 60 [440 B + 20 B]
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Computer Networks
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 85
C. FTP control 3. 21 C. Connect ( ) 3. Associates a
D. FTP data 4. 20 socket with
Codes: socket address
A B C D structure.
(a) 1 2 3 4 D. Poll () 4. Check the
(b) 1 2 4 3 state of a socket
(c) 2 1 3 4 in set of sockets.
(d) 2 1 4 3 Codes:
A B C D
a) a (a) 4 2 1 3
b) b (b) 3 2 4 1
c) c (c) 3 2 1 4
d) d (d) 4 1 2 3
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 86
and second segments are 750 and 870 c) When a strict routing has been
respectively. The first segment was specified by the source but can't be
lost, but second was received correctly followed by the intermediate routers,
by the receiver. Let X be the amount of such events will not be reported by
data carried in first segment (in Bytes), ICMP.
Y be the Ack number sent by the d) Symmetric encryption algorithm is
receiver. The value of X and Y are: same as public key encryption
a) 120 and 870 algorithm.
b) 120 and 990
c) 750 and 990 Q.2 Consider the following statements:
d) 120 and 750 S1: Asymmetric key cryptography and
digital signature both use the private
Q.9 In public key, private key and public keys of the sender.
cryptography, if ‘A’ has PuA and PrA, S2: Public key cryptosystems require n
‘B’ has PuB and PrB as public and (n-1) / 2 keys for a set of n individual
private keys. Then if ‘A’ wants to send to be able to communicate with each
a message to ‘B’ securely ‘A’ will use other.
which key for encryption Which of the statements options are
a) PrA true?
b) PuA a) S1 and S2 are true
c) PuB b) S1 is true, S2 is false
d) PrB c) S1 is false, S2 is true
d) Both are false
Q.10 In a IP datagram, a TCP segment is
present. Total length of IP datagram is Q.3 Consider the following statements:
1000 bytes. Header length field in TCP S1: TCP is message oriented protocol
header is 7. Then what is size of TCP while UDP is stream oriented.
data present in the datagram. S2: TCP guarantees that No-out-of-
a) 988 order segment is delivered to the
b) 952 process.
c) 964 S3: In congestion avoidance algorithm,
d) 900 the size of congestion window
increases exponentially until it reaches
a threshold.
LEVEL 3 Which of the statements are NOT true?
a) Only S3
Q.1 Which of the following statements is b) Only S2 and S3
true? c) Only S1 and S3
a) The size of TCP receiver window d) Only S1 and S2
never changes throughout the duration
of connection. Q.4 Let the size of congestion window of a
b) Suppose host A is sending a large TCP connection be 38 KB when a
file to host B over a TCP connection, timeout occurs. The propagation time
the number of unacknowledged bytes of the connection is 100 msec and the
that host A send cannot exceed the size maximum segment size used is 2 KB.
of advertised receiver buffer. The time taken (in msec) by the TCP
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connection to get back to 36 KB
congestion window is ___.
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(d) (c) (c) (c) (a) (b) (a) (d) (d) (c)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(c) (30) (7) (c) (5) (a) (a) (d) (c) (b)
LEVEL 3
1 2 3 4 5
(b) (d) (c) (3000) (d)
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 89
SMTP is reliable protocol. It uses
SOLUTIONS connection oriented service. So, it uses
TCP as transport layer protocol.
LEVEL 1
Q.8 (d)
In TCP check sum calculation, it is
Q.1 (d) calculated on TCP header, TCP data
Remote login – Telnet, and pseudo header from IP.
Mail service – SMTP,
File transfer and access – FTP are Q.9 (d)
application layer protocols.
Q.10 (c)
Q.2 (c) If ‘n’ is the sequence number bits and
Real time multimedia- UDP B is the bandwidth in bytes/sec.
FTP- TCP
2n
DNS- UDP Then, wrap around time =
Email- TCP B
∴ WAT depends on sequence number
Q.3 (c) bits as well as BW.
• Trivial File Transfer Protocol (TFTP)
process includes flow and error control. LEVEL 2
It can easily use UDP.
• UDP is used for management Q.1 (c)
processes such as SNMP.
• SMTP uses TCP. Q.2 (30)
• UDP is used for some route updating With Go-back-N:
protocols such as Routing Information
Protocol (RIP).
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 90
Amount of data carried in first segment
Q.4 (c) = 870 – 750 = 120.
Bind () is used on the server side and Acknowledgement number field
associates a socket with socket address contains the next sequence number that
structure. is expected to receive. Here, 1st
Listen () is also used on the server side segment is lost. Receiver expects the
and bound TCP socket to enter 1st segment sequence number which is
listening state. 750. So, Ack number sent by the
Connect () is used on the client side receiver is 750.
and assigns a free local port number to
a socket. In case of TCP socket, it Q.9 (c)
causes an attempt to establish a new If the message is encrypted using PuB,
TCP connection. then it can be decrypted using only PrB,
Poll () is used to check the state of a which will be known only to ‘B’.
socket in a set of sockets. The set can
be tested to see if any socket can be Q.10 (b)
written to, read from, or if an error
occurred.
Q.5 (5)
IRTT = 5.5 msec
α = 7/8
NRTT = 1.5 msec Given IP header field = 5
Basic algorithm = ∴ IP header size= 5*4= 20 bytes
α ( IRTT ) + (1 − α ) ( NRTT ) Similarly, TCP header field = 7
RTT = 7/8 (5.5) + 1/8 (1.5) = 5 msec Therefore, TCP header size = 7*4 = 28
TCP data = 1000 – 20 – 28 = 952.
Q.6 (a)
Given for every 4 secs, counter is
incremented by 2, 56,000 LEVEL 3
So for every 1 sec, counter increments
by 2, 56, 000/4 = 64000 Q.1 (b)
The sequence no. is 32 bit long and it 1). Receiver window is used to give the
can hold only 232 – 1. sender an idea of how much free buffer
So it takes (232 – 1) / (64000) = space is available at receiver. So, as the
67,108.86 seconds receiver buffer changed receiver
window also change.
Q.7 (a) 2). TCP does not allow the host to send
Sequence no. will be given to sender more data than receiver buffer
window and receiver window. Sender requirement which restrict the data
window size is 127 and receiver overflow.
window size is 1. So, 127 + 1 = 128. 3). When a strict routing has been
Sequence no. will start from 0. So, specified by the source but can't be
answer is 0-127. followed by the intermediate routers,
such events will be reported by ICMP.
Q.8 (d)
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4). Secret key encryption algorithm is 2 → 4 → 8 → 16 → 19 → 21 → 23 →
often referred to as symmetric 25 → 27 → 29 → 31 → 33 → 35 →
encryption algorithm as the same key 37 → 38
can be used in bidirectional Time taken to reach 38 KB = 15
communication between sender and segments * 200 msec = 3000 msec.
receiver.
Q.5 (d)
Q.2 (d) Given Size of TCP segment = 1KB =
S1: Asymmetric key cryptography uses 1024 Bytes
the private key for decryption and Header Length field is 6, so header size
public key for encryption of the = 6*4 = 24 bytes
receiver. While digital signature use Total data size
the private and public keys of the = size of Segment – Header size
sender. = 1024 – 24 = 1000 bytes of data
S2: For public key encryption, each Starting Sequence no. is 3500
individual needs to have a public and So the range of sequence no. of the
private key, so the total keys required data is 3500 to 4499
is 2 × n. URG pointer = 45 so data from 0th byte
till 45th byte are urgent so 46 bytes are
Q.3 (c) urgent data.
S1: UDP is a message oriented Therefore, the urgent data is 1000 to
protocol. In UDP, a process sends 1045 and its sequence no. range is
messages, with predefined boundaries, 3500 – 3545.
to UDP for delivery. TCP allows the
sending process to deliver data as a
stream of bytes and allows the
receiving process to obtain data as a
stream of bytes. So TCP is stream
oriented protocol.
S2: Data may arrive out of order and
temporarily stored by the receiving
TCP, but TCP guarantees that No-out-
of-order segment is delivered to the
process.
S3: In congestion avoidance algorithm,
the size of the congestion window
increases additively until congestion is
detected. The window size increases
exponentially in slow-start algorithm.
Q.4 (3000)
Congestion window = 38 KB
Threshold = 19 KB
Round trip time = 2 × propagation time
= 2 × 100 = 200 msec
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Computer Organization and Architecture
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 93
Q.10 A computer has 170 different
operations. Word size is 4 bytes one
word instruction requires two address
fields. One address for register and one
address for memory. If there are 37
registers then the memory size is_____
(in KB).
(a) 2, 6 (b) 2, 8
LEVEL 2 (c) 8, 2 (d) 6, 2
© Copyright Reserved by Gateflix.in No part of this material should be copied or reproduced without permission 94
While designing the vertical µ -
If no intermediate results can be stored programmed control unit, single
in memory, what is the minimum address field format is used for branch
number of registers needed to evaluate control logic. The size of control
this expression? memory in byte is ____.
(a) 2 (b) 3
(c) 4 (d) 5 Q.9 Suppose a CPU contains 1000 memory
references there are 40 misses in L1
Q.6 Suppose that a 4-way set associative cache (First Level Cache) and 20
cache has 2048 cache lines and main misses in the L2 cache (Second Level
memory of size 225 bytes. Both cache Cache). Assume miss penalty from the
and main memory are partitioned into L2 cache to memory is 100 clock
64 words block, where word size is 1 cycles the hit time of L2 cache is 10
byte. Which of the following represents clock cycles, the hit time of L1 cache is
the size of tag memory? 1 clock cycle. What is the average
(a) 2800 bytes memory access time?
(b) 2048 bytes (a) 3.4 clock cycles
(c) 2560 bytes (b) 3.5 clock cycles
(d) 2304 bytes (c) 5.3 clock cycles
(d) 1.8 clock cycles
Q.7 Consider the following instruction uses
addition operation i.e. C ← [A] + [B]: Q.10 Consider the following µ -operation:
(i) Add A, B [[A] + [B] → B] I1: PC → MBR I2: IR[Add] → MAR
= I3: M[MAR] → MBR I4: MBR → ACC
MOV B, C [[B] → C], I5: PC → MAR I6: SP → MAR
Add A, C [[A] + [C] → C] I7: MBR → M[MAR] I8: ACC → MBR
Which of the following sequence is
(ii) Add A, B, C [[A] + [B] → C] correct for operand store?
= (a) I1, I4, I7
MOV A, C [[A] → C], (b) I8, I5, I7
Add B, C [[B] + [C] → C] (c) I8, I2, I7
(d) None of these
In which of the following option, result
of RHS execution is same as execution
of LHS? LEVEL 3
(a) Only (i)
(b) Only (ii) Q.1 Consider a 32 bit microprocessor that
(c) Both (i) and (ii) has an on chip 16 Kbyte four way set
(d) Neither (i) nor (ii) associative cache. Assume that cache
has a line size of four 32 bit words.
Q.8 Consider a CPU where all the Which of the following set number in
instruction requires 10 clock cycles to the cache to which the word from
complete execution. There are 258 memory location FFFAE8FA is
instructions in instruction set. It is mapped ?
found that 129 control signals are (a) 142
needed to be generated by control unit. (b) 143
(c) 135
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(d) 139
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(b) (1.56) (16) (a) (-12) (18) (11) (274.125) (4) (256)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(a) (d) (c) (a) (b) (c) (b) (6450) (a) (c)
LEVEL 3
1 2 3 4 5
(b) (c) (b) (20.9) (b)
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Dirty bits are used by only write back
SOLUTIONS protocol to know which cache block is
updated.
LEVEL 1
Q.5 (-12)
Each instruction of 24 bits = 24 / 8 =3B
Q.1 (b)
In T1 cycle content register goes to
MAR i.e. address which contain actual
data.
In T2 cycle content of MAR i.e. actual
data transferred to MBR.
In T3 cycle content of MBR transferred
to ALU after the execution start.
So, this µ -program represent direct
operand fetch which is shown by below
diagram.
Q.6 (18)
Number of blocks
Number of sets =
2
=8/2=4
Q.2 (1.56)
Apply Amdhal’s law
S= 10
f = 40%
−1
0.4
Soverall= 1 − 0.4 + =[0.64]-1 = 1.56
10
So total number of miss = 10 + 8 = 18
Q.3 (16)
Block size is 16 bits = 2 bytes. Q.7 (11)
So, Block number with respect to Assume each block contains 2x words
(1440)10 cell is = 1440 / 2 = 720 or bytes
Location in cache memory = So, x bits as word offset.
720 mod 64 = 16
Q.4 (a)
Write through protocol update cache
and main memory simultaneously
221
where in write back first cache is Number of blocks in cache = = 221-x
updated and marked by dirty bit then 2x
main memory is updated.
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LEVEL 2
Q.1 (a)
Cache = 64KB = 216
Block size = Cache line size = 128
Q.8 (274.125) bytes = 27
Taverage read = 0.90 x 45 + 0.10 x 750 216
= 40.5+75 = 115.5 nsec Number of cache lines = 7 = 29
2
In write-through technique, CPU 9
2
performs simultaneous WRITE Number of sets = 3 = 26 = 64
operation in both cache memory and 2
main memory. So,
Taverage read = Max [Tupdation (Cache),
Tupdation (Main memory)]
= Max [45, 750]
= 750 nsec
So, Taverage = 0.75(115.5) + 0.25 (750)
= 86.625 + 187.5
= 274.125 nsec Q.2 (d)
All the above statements are correct.
Q.9 (4) S1: Update bit is used in the write back
cache to indicate the cache updation.
S2: In hierarchical memory access,
CPU perform read and write operation
only on level 1 memory. If miss occur
#lines then data is first transferred to level 1
Number of set = [Since 128
P − way then CPU access data.
lines, so # bits = 7] S3: In simultaneous memory access,
27 CPU perform read and write operation
32 = on any level of memory i.e. not
P − way
necessary to take data first into level 1
27 memory than access it.
P-way = 5 = 22 = 4
2
Q.3 (c)
Q.10 (256) Anti dependency (WAR): I1 – I2, I1 –
I3, I2 – I3, I1 – I4, I3 – I4, I2 – I5, I4 – I5,
I3 – I5
Output dependency (WAW): I1-I5, I2-I4
Q.4 (a)
In Horizontal µ Control unit design
Control signals are in decoded binary
format, Longer Control Word and High
degree of parallelism.
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In Vertical µ Control unit design Q.8 (6450)
Control signals are in encoded binary
format, Shorter Control Word and Low
degree of parallelism.
2580 x 20 bits
Size in bytes = = 6450.
8
Q.9 (a)
Average Memory Access time = Hit
Time L1 + Miss rate L1 x (Hit time L2
+ Miss rate L2 x Miss Penalty L2)
= 1 + 4% (10 + 50% x 100) [Miss rate
L1 = (40/1000) x 100= 4%]
Q.6 (c)
= 1 + 4% x 60 [Miss rate L2 = (20/40)
Number of cache lines = 2048 = 211
x100 = 50%]
Number of sets = 211 / 22 = 29 (9 bits
= 3.4 clock cycles
required)
Alternate method,
Block size = Cache line size = 26 (6
Tavg = Hit time L1 + (Miss rate L1 *
bits required)
Miss penalty L1)
Miss penalty L1 = Hit time L2 + (Miss
rate L2 * Miss penalty L2)
= 10 cycles + 50 cycles = 60 cycles
Tavg = (1 + ((40/1000) x 60))
= 3.4 cycles
Tag bits = 10
Tag memory size = Number of tag bits x Q.10 (c)
Number of set x Number of cache line in I1: ACC → MBR
each set I2: IR [Add] → MAR
= 10 x 29 x 22 I3: MBR → M[MAR]
= 10 x 211 bits
= 20480 / 8 bytes
= 2560 bytes LEVEL 3
32 - (8 + 4) = 20 tag bits
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16 × 210 bytes H2)(L1 access time + L2 access time +
Number of lines = = 210 Main memory access time)]
16 bytes
tB = (0.70)(2ns) + (0.3) x [0.85 x 10 ns
lines + 0.15 x (110 ns)] = 8.9ns
Number of sets = 210 / 4 = 256 set = 8 tA + tB = 12 + 8.9 = 20.9
set bits
8 F = 10001111 Mapped to 143rd set. Q.5 (b)
The address division will be given as:
Q.2 (c)
Q.3 (b)
Number of cache lines = 32KB / 32B
= 1K = 210
Number of sets = 210 / 2 = 29
H1 = 18 / 5 + 0.7 ns
= 3.6 + 0.7 ns = 4.3 ns
Direct mapped cache:
Q.4 (20.9)
‘A’ is slower than B.
Cache A:
Average access time = H(Access
time) + (1 – H) (Cache access time +
Memory access time)
tA = 0.92(4 ns) + 0.08 (4 + 100) = 12 ns
Cache B:
Average access time = H1(L1 access) +
(1-H1)[H2 (L2 access time) + (1 –
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Computer Organization and Architecture
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S2: Number of control bits required in (a) Data dependency
the horizontal micro- programmed (b) Resource conflict
control unit is log2N bits for ‘N’ (c) Structural dependency
number of control signals. (d) Anti dependency
S3: Base register addressing mode is
used for program relocation
S4: PC relative addressing mode is LEVEL 2
used for reducing the opcode size of
the instruction. Q.1 Consider 4 stage instruction pipeline
S5: Memory indirect addressing mode executed on a system:
instruction execution requires less
number of clock cycles than Register
indirect addressing mode instruction
execution.
In the above, the correct statements are
(a) All
(b) S1, S2, S3 and S4 If all instructions are executed only
(c) S1, S3 and S4 once, what is the throughput of
(d) S1, S2, S4 and S5 system?
(a) 4/9 cycles
Q.8 Consider the following 5 stage (b) 4/10 cycles
pipelined processor. The number of (c) 4/12 cycles
clock cycles needed by the four (d) 4/11 cycles
instructions I1, I2, I3, l4 in stages S1,
S2, S3, S4, S5 is shown below. Q.2 Consider the following statements:
S1: Micro programmed control unit
uses fixed logic to interrupt instruction.
S2: Horizontal microprogramming
control unit requires an additional
hardware (like a decoder)
S3: The overall performance of a
system is directly proportional to the
memory accesses which can be
The minimum number of clock cycles satisfied by the cache.
required to execute the above is ____ Which of the following options is
correct?
Q.9 Which of the following addressing (a) Only S1 and S2 are true
mode is best to specify the target (b) Only S1 and S3 are true
address in branch instruction? (c) Only S3 is true
(a) Direct addressing mode (d) None of the above
(b) Relative addressing mode
(c) Auto decrement addressing mode Q.3 A DMA is transferring characters to
(d) Index addressing mode processor from a device transmitting at
8000 bits per sec. Assume DMA using
Q.10 Which of the following dependency cycle stealing mode. If processor needs
problem can be eliminated by using access to main memory once every
Register Renaming technique?
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micro second. The percentage Q.6 An instruction pipelined processor has
processor be slow down due to DMA 5 stages where each stage takes 4
activity is______ (in %). nanosec and these five stages are
(a) 0.1 required for executing all stages. Only
(b) 0.3 branch instructions are not overlapped
(c) 0.5 because there is no branch prediction.
(d) 0.7 The instruction after the branch
instruction is not fetched until the
Q.4 Consider a 6 stage instruction pipeline, branch instruction operation is
where all stages are perfectly balanced. completed in 4th stage.
When a program is executing on this Assume that 10% instructions are
pipeline, the speed up achieved with branch instructions; while executing
respect to non-pipeline execution, if the larger number of instructions the
30% instructions incur ‘3’ pipeline stall average instruction time in nano
cycles and 15% of instructions incur seconds is _____
‘2’ pipeline stall cycles is _____
Q.7 Instruction size of the system is 64 bits.
Q.5 Consider the following Instructions (I1 A program starts at address 250. All
to I5), each instruction is represented values are in decimal. Which of the
with three address fields following is a legal program counter
OPR Rd Rs2 Rs1 value?
Operation OPR is performed on the (a) 300
content of Rs1 and Rs2 and the result is (b) 350
placed in the register Rd. (c) 650
I1 ADD R3, R5, R6 (d) 950
I2 MUL R7, R1, R8
I3 SUB R7, R1, R3 Q.8 Assume that for a certain processor,
I4 ADD R9, R5, R6 TCM ( cache access time ) = 10 ns,
I5 DIV R3, R4, R2
TMM ( main memory access time ) =
Consider the following statements 100 ns and Hit rate is 90% [Note:
S1: There is a true dependency always words to the processor are
between I3 and I5 supplied by the cache memory only].
S2: There is an anti-dependency The average read access time in nano
between I3 and I5 seconds is?
S3: Within an instruction pipeline, an (a) 20
anti-dependency always does not (b) 30
requires stalls (c) 40
Which one of the above statements (d) 60
is/are correct?
(a) S1 only Q.9 A system has 32 bits instruction that
(b) S1 and S3 support zero address, one address and
(c) S2 and S3 two address instructions. Assume each
(d) S2 only address field size is 12 bits, it is
designed for supporting 200 number of
two address instructions, 376 number
of one address instructions. The
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maximum number of zero address Which of the following is the correct
instructions that can be formulated is__ match between the List-1 and List-2?
P Q R S
Q.10 A DMA controller has two registers (a) (ii) (iii) (iv) (i)
known as address register and (b) (ii) (iv) (i) (iii)
Terminal Count Register (TCR). (c) (ii) (iii) (i) (iv)
Address register is used to hold the (d) (ii) (iv) (iii) (i)
address of the data to be transferred
and TCR is used to hold the size of the Q.3 Consider the two processors P1 and P2
data to be transferred (i.e. number of with intermediate register gateway is 0.
bytes to be transferred) for one DMA P1: Has four stage pipeline with stage
request. Assume that the size of the latency 1.5 nsec, 2 nsec, 1 nsec and 0.5
above registers is 32 bits each and nsec.
DMA is operated in burst transfer P2: Has five stage pipeline with stage
mode. Memory is byte addressable latency 1 nsec, 2.5 nsec, 1.5 nsec, 2
type. The maximum size of the data nsec and 1 nsec.
that can be transferred by the DMA If each processor has infinite number
controller if it generates the DMA of instruction to execute, then which of
request signal 100 times is the following is true?
(a) 400 GB (a) Processor 2 slower than processor 1
(b) 4 GB (b) Both processors have same clock
(c) 3.2 GB rate
(d) 400 MB (c) Processor 1 slower than processor 2
(d) None of the above
LEVEL 3 Q.4 A hard disk with a transfer rate of 1
KBps is constantly transferring data to
Q.1 Consider the following 8 bit memory using DMA cycle stealing
multiplication process (-121) x (-113). mode. The size of the data transfer is
What is the recorded multiplier in the 16 bytes. The processor runs at 400
multiplication? kHz clock frequency. The DMA
(a) -100+1000-1 controller requires 10 cycles for
(b) 100+1000-1 initialization of operation and transfer
(c) -100-1000+1 takes 2 cycles to transfer one byte of
(d) None of these data from the device to the memory.
What is the percentage of processor
Q.2 Consider the floating point Arithmetic time blocked during this DMA
for single precision, match the operation?
following pairs if E' = Biased exponent (a) 0.70 %
and M = Mantissa: (b) 0.65%
(c) 0.50 %
(d) 0.55%
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(ID), Operation performed (OP), Data
memory access (MA) and Write back
(WB). The IF, ID, MA and WB stages
takes 1 clock cycle each for any
instruction. The OP stage takes 1 clock
cycle for ADD and SUB instructions
and takes 3 clock cycles for MUL
instruction. The minimum numbers of
clock cycles are needed to complete
following sequence of instruction if
operand forwarding is used ______.
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ANSWER KEY:
LEVEL 1
1 2 3 4 5 6 7 8 9 10
(a) (b) (d) (127) (10) (b) (c) (15) (b) (d)
LEVEL 2
1 2 3 4 5 6 7 8 9 10
(d) (c) (a) (2.72) (c) (5.2) (c) (a) (937984000) (a)
LEVEL 3
1 2 3 4 5
(a) (c) (a) (b) (11)
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SOLUTIONS Type of operand is unsigned integer,
the longest integer that can be
produced with 7 bit is (27-1) = 127
LEVEL 1
Q.5 (10)
tn n×k
Q.1 (a) Speed up = =
‘S1’ is false because memory mapped t p n + k −1
I/O us used to connect more number of n = number of instruction = 200
I/O devices than I/O mapped I/O. k = number of segments = ?
‘S2’ is true. tn = non-pipeline time
‘S3’ is false because I/O mapped I/O is tp = pipeline time
also known as Isolated I/O, in this n×k 200 × k
= 9.2, = 9.2
technique processor can address n + k −1 199 + k
maximum 216 input devices and 216 200k = 9.2 ×199 + 9.2k
output devices when it’s port address
size is 16 bit. 190.8k = 1830.8
‘S4’ is false because valuable memory k = 9.59
space is wasted when the I/O devices Therefore minimum number of
are addressed in memory mapped I/O, segments (stages) is 10.
because in this mode one memory
address is reserved for one I/O device Q.6 (b)
connection. In all processors; Vectored interrupt
permits only one IO device but Non-
Q.2 (b) vectored interrupt permits one or more
Processor gives highest priority for IO devices.
high speed devices (like secondary
memories) and least priority for I/O Q.7 (c)
devices (like keyboard and mouse) S1 is true; S2 is false because
because I/O devices are slower than horizontal micro-programmed control
magnetic and optical memories unit word size is ‘N’ bit for generating
and keyboard is slower than scanner. ‘N’ control signals.
S3, S4 are True. S5 is false because
Q.3 (d) memory indirect addressing mode
All statements are false. instruction requires two memory visits
in execution cycle (except fetch cycle)
Q.4 (127) but register indirect addressing mode
Size of the opcode word = 32 bits instruction requires only one memory
Number of Registers = 33 visit.
Register field size = log2 33 ≅ 6
Number of instruction = 65 Q.8 (15)
Opcode field size = log2 65 ≅ 7
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since it uses encoded scheme for the
instruction.
• Horizontal microprogramming
control unit does not require an
additional hardware (like a decoder)
because a fixed logic is associated with
the instructions.
• The performance of a system depends
on the direct proportion of memory
accesses satisfied by cache.
Q.3 (a)
8000 bits transmitting → 1seconds
8
1 character takes = seconds
8000
= 1 msec = 1000 µ sec
Processor access main memory in
Q.9 (b) every µ sec.
Relative addressing mode is best to
y
specify the target address in branch Slow % = * 100
instruction. x+ y
x = 1000 µ sec and y= 1 µ sec
Q.10 (d) 1 µ sec
So slow % = *100 = 0.1
Register Renaming is used to remove (1000 + 1) µ sec
output dependency and anti
dependency. Q.4 (2.72)
Non-Pipeline: tn = 6 clocks
LEVEL 2 Pipeline: tp = (0.30*(3+1)) +
(0.15*(2+1)) + (0.55*(1)) = 2.2 clocks
Q.1 (d) Speed up = tn / tp = 6 / 2.2 = 2.72
1 2 3 4 5 6 7 8 9 10 11
S1 I1 I2 I2 I3 I4 I4 Q.5 (c)
S2 I1 I1 I1 I2 I3 I3 I4 S1 is False and S2 is TRUE because
S3 I1 I2 I2 I3 I4 I4 there is an anti-dependency (write after
S4 I1 I2 I3 I3 I4 read) between I3 and I5.
Throughput = S3 is true because anti-dependency
Number of task completed requires stall cycles only some time but
Total time taken to process the tasks not always.
= 4 / 11 cycles
Q.6 (5.2)
While executing large number of
Q.2 (c)
instructions, only one segment time (4
Considering each statement:
ns) is sufficient to complete one
• Micro programmed control unit uses
instruction when there is no hazard.
variable logic to interrupt instruction
For non branch instruction one clock (4
ns) and for branch instruction 3 (stall
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cycles) clocks and one more clock is Now in these it uses only 376 and
required for execution 12+4=16ns. remaining 229000 free combinations
Average instruction time = (0.9 x 4 ns) are used for zero address instruction.
+ (0.1 xx 16 ns) = 3.6 + 1.6 = 5.2 ns i.e. maximum number of zero address
instruction to be formulated
Q.7 (c) = 229000 x 212 = 937984000
Legal PC value can be (250 + 8x)
where x is an integer variable. (64 bits Q.10 (a)
= 8 Bytes) Size of TCR is 32 bit, i.e. the
250 + 8x ≠ 300 maximum size of the data to be
250 + 8x ≠ 350 transferred for one DMA request is
232 B = 4 GB. Total number of requests
250 + 8x ≠ 950 made the processor is 100. Then
250 + 8x = 650 (x = 50) maximum size of the data that can be
So, ans is 650. transferred = 4 GB x 100 = 400 GB
Q.8 (a)
As given in note; always words are
supplied through CM only
LEVEL 3
Q.1 (a)
TCM = 10ns
TMM = 100ns
Tavg = (H × TCM ) + (1-H)(TMM + TCM )
Q.9 (937984000)
Size of instruction = 32 bits
Maximum no of 2 address instructions
= 28 = 256 Q.2 (c)
Q.3 (a)
For P1:
Pipeline time = max (1.5, 2, 1 and 0.5)
= 2 nsec
But it uses only 200 instructions, 1
remaining 56 free combinations used Clock rate = = 500 MHz
for one address instruction, then 2 nsec
maximum number of one address For P2:
instructions to be formulated = 56 x 212 Pipeline time = max (1, 2.5, 1.5, 2, 1)
= 229376 nsec = 2.5 nsec
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1
Clock rate = = 400 MHz
2.5 nsec
So, processor-1 is faster than
processor-2
Q.4 (b)
% Time CPU is blocked =
Transfer Time
Transfer Time + Preparation Time
Preparation Time:
103 bytes → 1 sec
1 byte → 1 msec
So, 16 bytes → 16msec
Transfer time = 10 cycles for
initialization + (2 x 16) cycles for
transfer = 42cycles
1
1 cycle time =
400 KHz
= 0.0025 msec
So, 42cycles = 42 x 0.0025 msec
= 0.105msec
0.105
% of time CPU blocked =
16 + 0.105
= 0.0065 x 100
= 0.65%
Q.5 (11)
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