Chapter 2

Computer System
Structures

1
 Computer System
Architecture

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Computer-System
Operation
 A general-purpose computer system consists of one or more
CPUs and a number of device controllers.
 Each device controller is in charge of a specific type of
device.
 Each device controller has a local buffer.
 The CPU and device controllers can execute concurrently.
 Device controller informs CPU that it has finished its
operation by causing an interrupt.
 Interrupt indicates the occurrence of an event from either
the hardware or software.
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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Interrupt Handling
 When the CPU is interrupted, it stops what it is doing and
immediately transfers execution to a fixed location.

o The fixed location contains the starting address of the interrupt

service routine.

 Interrupt vector provide the address of the interrupt service

routine for the interrupting device.

4
Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Interrupt Handling (Cont)
 Separate segments of code determine what action should
be taken for each type of interrupt.

 The OS preserves the state of the CPU by storing registers

and the program counter.

 After the interrupt is serviced, the saved return address is

loaded into the program counter.
o The interrupted computation resumes.

5
Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Interrupt Handling

6
Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Synchronous I/O
Structure
 After I/O starts, control returns to user program only
upon I/O completion.

o Wait instruction idles the CPU until the next interrupt

o Wait loop (contention for memory access).

o At most one I/O request is outstanding at a time, no

simultaneous I/O processing.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Asynchronous I/O
Structure
 After I/O starts, control returns to user program without
waiting for I/O completion.

o System call – request to the operating system to allow

user to wait for I/O completion.

o Device-status table contains entry for each I/O device

indicating its type, address, and state.

o Operating system indexes into I/O device table to

determine device status and to modify table entry to
include interrupt.
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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Two I/O Methods
Synchronous Asynchronous

9
Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Storage Structure
 Main memory – only large storage media that the CPU
can access directly.

o A volatile storage device that loses its contents when

power is turned off.

 Secondary storage – extension of main memory that

provides nonvolatile storage capacity.

o It is capable to hold large quantities of data permanently.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Storage Hierarchy
 Storage systems organized in hierarchy.
o Speed
o Cost
o Volatility

 Caching – copying information into faster storage system;

main memory can be viewed as a last cache for secondary
storage.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Storage Device Hierarchy

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Caching

Migration of A From Disk to Register

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Dual-Mode Operation
 In order to ensure the proper execution of the operating
system, the computer system must be able to distinguish
between the execution of operating system code and user-
defined code.

 Provide hardware support to differentiate between at least

two modes of operations.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Modes of Operation

User Mode Kernel Mode

• user program executes in • monitor executes in kernel
user mode mode
• certain areas of memory are • privileged instructions may
protected from user access be executed
• certain instructions may not • protected areas of memory
be executed may be accessed

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Adapted from Silberschatz, Galvin and Gagne (2013),
Operating System Concepts
 Dual-Mode Operation
 Mode bit is added to computer hardware to indicate the current mode:
kernel (0) or user (1).

 When an interrupt or fault occurs, hardware switches to kernel mode.

 Privileged instructions can be issued only in monitor mode.

 In the kernel mode, the software has complete control of the processor
and all instruction, registers and memory.

 This level of control is not necessary and for safety is not desirable for
user programs.
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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 I/O Protection
 All I/O instructions are privileged instructions; user
program cannot issue I/O instructions directly.

o User program must executes a system call to request that

the operating system to perform I/O.

 Must ensure that a user program could never gain control

of the computer in monitor mode (i.e., a user program, as
part of its execution, stores a new address in the interrupt
vector).

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Use of A System Call to
Perform I/O

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Memory Protection
 The computer system must provide memory protection at
least for the interrupt vector and the interrupt service
routines.

 In order to have memory protection, two registers are used

to determine the range of legal addresses a program may
access:
o Base register – holds the smallest legal physical memory address.
o Limit register – contains the size of the range

 Memory outside the defined range is protected.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Use of A Base and Limit
Register

20
Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Hardware Address
Protection

21
Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Hardware Address
Protection
 When executing in kernel mode, the operating system has
unrestricted access to both monitor and user’s memory.

o Operating system is allowed to load users’ programs into

users’ memory, to access and modify parameters of
system calls.

 The load instructions for the base and limit registers are
privileged instructions.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 CPU Protection
 Timer – interrupts computer after specified period to
ensure operating system maintains control over CPU.
o Every time the clock ticks, the counter is decremented.
o When timer reaches the value 0, an interrupt occurs.

 When timer interrupts, control transfers to the operating

system.

 Load-timer is a privileged instruction.

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts
 Summary
 Computer-system operation  Dual-mode operation
 Interrupt handling  I/O protection
 I/O structure  Memory protection
 Storage structure / Storage  CPU protection
hierarchy

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Adapted from Silberschatz, Galvin and Gagne (2013), Operating System Concepts