Computer Organizationand Architecture Syllabus
Computer Organizationand Architecture Syllabus
Computer Engineering
Contents:
Contact
Unit Topics
Hours
1 Register Transfer and Micro- operations: 4
Register Transfer language, Register Transfer, Bus and Memory
Transfers, Arithmetic Micro-Operations, Logic Micro-Operations,
Shift Micro-Operations, Arithmetic logical shift unit.
2 Basic Computer Organization and Design: 7
Instruction codes, Computer registers, Computer instructions,
Timing and Control, Instruction cycle, Memory-Reference
Instructions, Input- output and interrupt, Complete computer
Syllabus for Bachelor of Technology
Computer Engineering
References:
1. M. Morris Mano, 3rd edition, 2007, Computer System Architecture, Pearson.
2. Andrew S. Tanenbaum and Todd Austin, 6th edition 2013, Structured Computer
Organization, Sixth Edition, PHI.
3. M. Murdocca & V. Heuring, 2007, Computer Architecture & Organization, WILEY.
4. John Hayes, 3rd edition, 2007, Computer Architecture and Organization, McGrawHill.
Tutorial work:
Syllabus for Bachelor of Technology
Computer Engineering
Tutorial work will be based on binary adder, subtract circuit, instruction set, Booth
Multiplication algorithm with 14 tutorials to be incorporated that will be considered for
evaluation.
Instructional Method:
a) The course delivery method will depend upon the requirement of content and
need of students. The teacher in addition to conventional teaching method by
black board, may also use any of tools such as demonstration, role play, Quiz,
brainstorming, MOOCs etc.
b) The internal evaluation will be done on the basis of continuous evaluation of
students in the laboratory and class-room.
c) Practical examination will be conducted at the end of semester for evaluation
of performance of students in laboratory.
d) Students will use supplementary resources such as online videos, NPTEL
videos, e-courses, Virtual Laboratory.
Supplementary Resources:
a) https://nptel.ac.in/courses/106106166
b) http://www.intel.com/pressroom/kits/quickreffam.htm
c) web.stanford.edu/class/ee282