MPMC - Unit 1 - 8085 Architecture
MPMC - Unit 1 - 8085 Architecture
8085 Architecture
Dr.M.N.Vimal Kumar,B.E.,M.E.,Ph.D
Associate Professor
Department of Mechatronics Engineering,
Sona College of Technology
Salem - 636005
1
Control Unit
Generates signals within Microprocessor to carry out the instruction, which has
been decoded.
In reality causes certain connections between blocks of the uP to be opened or
closed, so that data goes where it is required, and so that ALU operations occur.
The 8085A has a simple 8 bit ALU and it works in coordination with the accumulator,
temporary register, five flags, and arithmetic and logic circuits.
ALU has the capability of performing several mathematical and logical operations.
The temporary register is used to hold the data during an arithmetic/logic operation.
Registers
The 8085 have six general purpose registers to store eight bit data during program execution.
They can be combined as register pairs BC, DE, and HL to perform 16 bit operation.
The programmer can use these registers to store or copy data into the registers by using data
copy instructions.
Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU).
This register is used to store 8-bit data and to perform arithmetic and logical operations.
Z – Zero Flag:
The Zero flag is set if the ALU operation results is 0,and the flag is reset if the result is not 0.
In an arithmetic operation, when a carry is generated by digit D3 and passed on to digit D4, the
AC flag is set.
P – Parity Flag:
After an arithmetic/logic operation, if the result has an even number of 1’s, the flag is set.
If it has an odd number of 1’s flag is reset.
CY - Carry Flag:
If an arithmetic operation results in a carry. The carry flag is set; otherwise it is reset.
The carry flag also serves as a borrow flag for subtraction.
Program Counter (PC)
This 16-bit register deals with sequencing the execution of instructions. This register is a memory
pointer.
Memory locations have 16-bit addresses, and that is why this is a 16-bit register.
The microprocessor uses this register to sequence the execution of the instructions.
The function of the program counter is to point to the memory address from which the next byte
is to be fetched.
When a byte (machine code) is being fetched, the program counter is incremented by one to point
to the next memory location
Stack Pointer (SP)
This unit synchronizes all the microprocessor operations with the clock and generates the control signals
necessary for communication between the microprocessor and peripherals.
The control signals RD and WR indicate the availability of data on the data bus.
SID - Serial Input Data Line: The data on this line is loaded into accumulator bit 7 whenever a RIM
instruction is executed
SOD – Serial Output Data Line: The SIM instruction loads the value of bit 7 of the accumulator into SOD
latch if bit 6 (SOE) of the accumulator is 1.
Interrupts
INTR: It has the lowest priority and is a maskable interrupt. This is also called as hand shake interrupt
RST5.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC
register into stack and branches to 2CH (hexadecimal) address.
RST6.5 is a maskable interrupt When this interrupt is received the processor saves the contents of the PC
register into stack and branches to 34H (hexadecimal) address.
RST7.5 is a maskable in saves the contents of the PC register into stack and branches to 3CH
(hexadecimal) address
TRAP is a non-maskable interrupt when this interrupt is received the processor saves the contents of the
PC register into stack and branches to 24H (hexadecimal) address.
Address Bus
The address bus is a group of 16 lines generally identified as A0 to A15.
The address bus is unidirectional i.e. bits flow in one direction from MPU to peripheral devices.
The 8085 MPU with its 16 address lines is capable of addressing 216 = 65,536(64K) bytes memory
location.
Data Bus
The data bus is a group of 8 lines used for data flow.
These lines are bi-directional i.e. data flow in both direction between MPU and peripheral
devices.
Control Bus
The control bus comprised of various single lines that carry synchronization signals.
The MPU uses such lines to provide timing signals.