Phase Locked Loop

6.1 Introduction

A phase locked loop is basically a closed loop system designed to lock the output
trequency and phase to the trequency and phase of an input signal. It is commonly
abbreviated as PLL. The PLL was first introduced in its discrete form in early 1930s. The
high cost of realizing PLL in discrete form limited its use earlier. Now with the advanced
IC technology, PLLs are available as inexpensive monolithic ICs. They are used in
applications such as frequency synthesis, frequency modulation/demodulation, AM
detection, tracking filters, FSK demodulator, tone detector etc.
In this chapter, we are going to discuss basic operating principle, popular PLL IC 565
and important applications of PLL.

6.2 Block Diagram of PLL

Fig. 6.1 shows the block diagram of PLL. It consists of

Phase detector
Low pass filter

Error amplifier,

Voltage Controlled Oscillator (VCO)

Input Vs Phase Lowpass Error

detector filter amplifier

VCO
Vol
Fig. 6.1 Block diagram of PLL
(6 1)
 The phase detector compares the input frequency f, with the feedback frequency ,
and generates an output signal which is a function of the difference between the phases of
the two input signals. The output signal of the phase detector is a dc voltage. The output
noise from the de
of phase detector is applied to low-pass filter to remove high frequency
voltage.The of low
output pass filter without high frequency noise is often referred to as
error voltage or control voltage for VCO.

controlled oscillator is an oscillator circuit in which the frequency of

A voltage
oscillations can be controlled by an externally applied voltage. The VCO provides the
linear relationship between the applied voltage and the oscillation frequency. Applied
voltage is called control voltage. When control voltage is zero, VCO is in free-running
frequency f. The non-zero control
mode and its output frequency is called as center

voltage results in a shift in the VCO from its free-running frequency, fo to a

frequency
frequency f, given by f fo +K, Ve, where Kv is the voltage to frequency transfer
=

coefficient of the VCO. The error or control voltage applied as an input to the VCO, forces
the VCO to change its output frequency in the direction that reduces the difference
between the input frequeny and the output frequency of Vco.
This action, known as capturing, continues till the output frequency of VCO
commonly
is same as, the input signal frequency. Once the two frequencies are same, the circuit is
said to be locked. In locked condition, phase detector generates a constant de level which
is required to shift the output frequency of VCO from centre frequency to the input
frequency. Once locked, PLL tracks the frequency changes of the input signal. Thus, a PLL
goes through three states free running, capture and phase lock.

6.3 Important Definitions Related to PLL

Some important definitions related to PLL are as follows

Lock range When tLL is in lock, it can track frequency changes in the incoming
signal. The range of frequencies over which the PLL can maintain lock with the incoming
signal is called the lock range or tracking range of the PLL. It is usually expressed as a
percentage of f, the VCO frequency.

Capture range The range of frequencies over which the PLL can acquire lock with an
input signal is called the capture range. It is also expressed as a percentage of fa

Pull-in time: The capture of an input signal does not take place as soon as the signal is
applied, but it takes finite time. The total time taken by the PLL to establish a lock is
called pull-in time. This depends on the initial phase and frequency ditference between
the two signals as well as on the overall loop again and the bandwidth of the low pass

ilter
6.8 565 PLL Applications

6.8.1 Frequency Multiplier

Fig 6.15 shows the block diagram for a frequency multiplier using PLL 565. Here, a
divide network is inserted between the VCO output (pin 4) and the
by N phase
comparator input (pin 5). Since the output of the divider is locked to the input frequency
the VCO is actually running at a multiple of the input frequency. Therefore, in the
locked state, the VCO output frequency fo is
given by,
f = Nf (1)
- . - --

Input Phase Error

comparator amplifier

N
+N
VCO
network

PLL

Fig. 6.15 Block diagram of frequency multiplier

By selecting proper divider by N network, we can obtain desired multiplication. For
example, to obtain output frequency fo= 6 fi, a divide by N should be equal to 6.
Fig. 6.16 shows LM 565 IC used as a
frequency multiplier circuit. The IC 7490 is a 4 bit
binary counter. It is configured as a divide by 10 circuit.

6.8.2 Frequency Synthesizer

The PLL can be used as the basis for
frequency synthesizer that can produce a precise
series of frequencies that are derived from a stable
shows the block diagram of crystal controlled oscillator. Fig. 6.17
frequerncy
circuit except that divided by M networksynthesizer.
It is similar to
frequency multiplier
is added at the
frequency of the crystal-controlled oscillator is divided by aninput phase lock loop. The
of
network to integer factor M by divider
produce a frequency fose /M, where fose is the
Controlled oscillator. The VCO frequency of the crystal
crysta
network to
frequency fvco is similarly divided
by factor by N divider
give frequency equal to fvco/N. When the on the
aivided-down oscillator frequency, we will have PLL is locked in
fose /M fyco/N, so that fvco =(N
=

sc
 Frequency multiplier (x 10)
+6 V

6V
750 pF Lsn 470 nF

100 nF O LM565
9
1K
100 nF
INPUT 10 kHz o K
2 Phase
comp vco 1 nF
IK

IK100 nF
°loUTPUT= 100 kHz

| 14 13 12 11 10 9 8

MM74C90

2 3 4 5 6

+5 V
Fig. 6.16 Typical connection for frequency
multiplier

Crystal Divided by
M Phase Lowpass
Oscillator Error
network detector filter amplifier

Divided by
N
vco
network
--

vco (N/M) %ac

Fig. 6.17 Block diagram of

frequency synthesizer
6.8.3 FM Demodulator Or-h
The PLL can be very easily used as an FM detector or demodulator. Fig. 6.18 shows
the block diagram of FM detector.

Phase Lowpass Eror

Vs detector filter
FM signal amplifier

VCO

Fig. 6.18 PLL as a FM detector

When the PLL is locked in on the FM signal, the VCO frequency follows the
instantaneous frequency of the FM signal, and the error voltage or VCO control voltage is
proportional to the deviation of the input frequency from the centre frequency. Therefore,
the a-c component of error voltage or control voltage of VCO will represent a true replica
of the modulating voltage that is applied to the FM carrier at the transmitter. The faithful
reproduction of modulating voltage depends on the linearity between the instantaneous
frequency deviation and the control voltage of VCO. It is also important to note that the
FM frequency deviation and the modulating frequency should remain in the locking range
of PLL to get the faithful replica of the modulating signal. If the product of the
modulation frequency fm and the frequency deviation exceeds the (A fc, the VCO will
not be able to follow the instantaneous
frequency variations of the FM signal.
6.8.4 Frequency Shift Keying (FSK) Demodulator
In digital data communication,
binary data is transmitted by means of a carrier
frequency. It uses wo different carrier frequencies for logic 1 and logic 0 states of binary
data signal. This type of data transmission is called
frequency shift keying (FSK). In this
data transmission, on the receiving end, two carrier
to get the
frequencies are converted into 1 and 0
original binary dàta. This process is called as FSKdemodulation.
A PLL be used as a FSK demodulator, as shown in the
can
the PLL demodulator for
Fig, 6.19. It is similar to
analog FM signals except for the addition of
a to
comparator
produce a reconstructed digital output signal.
 LPF-2

N Comparator
Phase
FSK
signal detector
A Amplifier LPF-1

VCO

Fig. 6.19 Frequency shift keying demodulator

Let us consider that there are two frequencies, one frequency (fi) is represented as "0"
and other frequency (f2) is represented as "1". If the PLL remain is locked into the FSK
signal at both fi and fz, the VCO control voltage which is also supplied to the comparator
will be given as

Vci= (f -fo )/k, and

Ve2=(f2 -fo) / kv , respectively
where k is the voltage to frequency transfer coefficient of the VCO.
The difference between the two control voltage levels will be A =( f -f ) / k .
The reference voltage for the comparator is derived from the additional low pass filter
and it is adjusted midway between Vci and Vcz. Therefore, for Vci and Vez, comparator
gives output '0' and '1', respectively.

6.8.5 AM Detection
A PLL can be used to demoduiate AM signals as shown in Fig. 6.20.

vco Multiplier Demodulated

AM PLL (phase output
input Oufput detector)
LPE

Phase
shift90

Fig. 6.20 PLL used as AM demodulator

 The PLL is locked to the carrier frequency of the incoming AM signal. Once locked
he output frequency of VCO is same as the carrier frequency, but it is in unmodulated
The modulated signal with 90° phase shift and the unmodulated carrier from output
of PLL are fed to the multiplier. Since VCO output is always 90° out of phase with the
incoming AM signal under the locked condition, both the signals applied to the multiplier
are in same phase. Therefore, the output of the multiplier contains both the sum and the
difference signals. The low pass filter connected at the output of the multiplier rejects high
frequency components gives demodulated output. As PLL follows the input frequencies
with high accuracy, a PLL AM detector exhibits a high degree of selectivity and noise
immunity which is not possible with conventional peak detector type AM modulators.

6.8.6 Frequency Translation

The frequency translation means shifting the frequency of an oscillator by a small
factor. Fig. 6.21 shows the block schematic for frequency translator using PLL.

Input
Mixer detectorH
Phase Error
amplifier

Offset o-

frequency f
vco
PLL

Fig. 6.21 Block schematic for frequency translator using PLL

It consists of mixer, low pass filter and the PLL. The input frequency f, which has to
be shifted is applied to the mixer. Another input to the mixer is the output voltage of
Vco, f. Therefore, the output of mixer contains the sum and difference signal (f, t f.)
The low pass filter connected at the output rejects the (f +f:) signal and gives
of mixer
only (f. - f) signal at the output. The (fo- f) signal is applied to the phase detector.
Another input for phase detector is the offset frequency i. In the locked mode, the VCOO
Output frequency is adjusted to make two input frequencies of phase detector equal. This
gives

-f, = fi and

f = f+f

by adjusting offset frequency fi we can shift the frequency of the oscillator to the
desired value.