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EDC Bits-2019-20

This document contains a summary of key concepts related to electronic devices and circuits. It includes 20 multiple choice questions covering topics like: 1. Calculating drift velocity of electrons in a material given scattering time and effective mass. 2. Identifying where the maximum electric field occurs in a reverse biased p-n junction diode. 3. Determining the appropriate plot (I vs V, log I vs log V, etc.) to produce a straight line for the static characteristic of a forward biased p-n junction. 4. Predicting whether the forward bias voltage across a PN junction will increase or decrease with a rise in temperature when the junction is biased with a constant current.

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Bhanu Kodali
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0% found this document useful (0 votes)
100 views

EDC Bits-2019-20

This document contains a summary of key concepts related to electronic devices and circuits. It includes 20 multiple choice questions covering topics like: 1. Calculating drift velocity of electrons in a material given scattering time and effective mass. 2. Identifying where the maximum electric field occurs in a reverse biased p-n junction diode. 3. Determining the appropriate plot (I vs V, log I vs log V, etc.) to produce a straight line for the static characteristic of a forward biased p-n junction. 4. Predicting whether the forward bias voltage across a PN junction will increase or decrease with a rise in temperature when the junction is biased with a constant current.

Uploaded by

Bhanu Kodali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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SUB: ELECTRONIC DEVICES AND CIRCUITS

YEAR&BRANCH: II ECE
UNIT-I

1. For a sample of GaAs scattering time is Tsc = 10−3 sec and electron effective mass mn = 0.067m. If electric
field of 1kv/m is applied, the drift velocity produced is (use m=9.1×10−31 kg) [ ]
a) 262.42 b) 26.24 c) 17.5m/sec d) 1.75m/sec
+¿¿
2. In a p n junction diode under reverse bias the magnitude of electric field is maximum at [ ]
a) the edge of the depletion region on p-side b) the edge of the depletion region on n-side
+¿¿
c) the p n junction d) the centre of the depletion region on the n-side.
3. The static characteristic of an adequately forward biased p-n junction is a straight line, if the plot is [ ]
a) log I Vs log V b) log I Vs V c) I Vs log V d) I Vs V
4. A Silicon pn junction biased with a constant current at room temperature, when the temperature is increased
by 100 C , the forward bias voltage across the PN junction. [ ]
a) increases by 60 mv b) decreases by 60mv c) increases by 25mv d) decreases by 25mv
5. The depletion capacitance, C J of an abrupt p-n junction with constant doping on either side
varies with R.B V R as [ ]
a) C J α V R b) C J α V −1
R
/2
c) C J α V −1
R d) C J α V −1
R /3

6. Zener diodes are primarily used as [ ]


a) Amplifiers b) voltage regulators c) rectifiers d) oscillators
7. The element having four valance electrons is [ ]
a) Gallium b) boron c) Germanium d) Aluminium
8. A PN junction acts as a [ ]
a) Controlled switch b) bidirectional switch
c) uni-directional switch d) None
9. Leakage current across PN junction is due to [ ]
a) Minority carriers b) majority carriers
c) Junction capacitance d) None
10. In an intrinsic semi conductor, the number of free electrons [ ]
a) Equals the number of holes b) is greater than number of holes
c) Is less than number of holes d) We cannot say

11. N- type semi conductors are [ ]


a) Negatively charged b) positively charged c) Electrically neutral d) None
12. The zener effect for BZX5.1V diode is valid at_____ [ ]
a) 6.1V b) 6V c) 5.1V d) 5V
13. The element that doesn’t have three valence electrons is_______ [ ]
a) Boron b) aluminum c) germanium d) gallium
14. The forbidden energy gap for germanium is____ [ ]
a) 0.12eV b) 0.32eV c) 0.72eV d) 0.92eV
15. The resistivity of a semi conductor [ ]
a) Increases as the temperature increases b) Decreases as temperature increases
c) remains constant even when temperature varies
d) Increases at low temperatures and remain constant at high temperatures
16. In a PN junction, the region containing the immobile acceptor and donor ions is [ ]
a) Resistive region b) active region c) depletion region d) ohmic region
17. The depletion region in a p-n diode is due to [ ]
a) Forward bias b) reverse bias
c) an area created by crystal doping d) rupture of covenant bond
18. A break down which is caused by cumulative multiplication of carriers due [ ]
to collisions under field influence is
a) avalanche break down b) zener break down c) voltage break down d) field break down
19. The frequency limit of Tunnel diode is [ ]
a) 104Hz b) 108Hz c) 1Hz d) 0.1Hz
20. The DIODE in which impurities are heavily doped is [ ]
a) LED b) VARACTOR diode c) PIN diode d) Tunnel diode

UNIT-II

1. A dc power supply has no-load voltage of 30V and a full-load voltage of 25v at a full-load
current of 1A, the output resistance and load regulation respectively are [ ]
a) 5Ω and 20 % b) 25 Ω and 20% c) 5Ω and 16.7 % d) 25Ω and 16.7%
2. The AC resistance of a forward biased p-n junction diode operating at a base voltage ‘V’ and
carrying current ‘I’ is [ ]
a) Zero b) A constant value dependent of V and I c) V/I d) ∆V/ ∆I
3. A rectifier is used to [ ]
a) convert AC voltage to DC voltage b) convert DC voltage to AC voltage
c) regulate voltage d) amplify voltage
4. For an ideal diode, Rf is [ ]
a) zero b) 1 c) infinite d) we cannot say
5. Ripple factor of a full-wave rectifier is [ ]
a) 1.21 b) 0.482 c) 0.406 d) 0.121
6. The avalanche effect is valid above
a) 10V b) 5V c) 2V d) 0.5V [ ]
7. The efficiency of a full-wave rectifier is
a) 40.6% b)81.2% c) 1.12% d) 48.2% [ ]
8. The efficiency of a half wave rectifier is [ ]
a) 40.6٪ b) 81.2٪ c) 1.12٪ d) 48.2٪

9. The ripple factor of inductor filter is [ ]


a) R∟ω/√2√3L b) R∟/√2√3L c) R∟/3√2 ωL d) R∟/√3 2 ωL

10. The PIV of a full wave rectifier is [ ]


a) Vm b)2Vm c) Vm/2 d) 3Vm

11. The ripple factor of capacitor filter is [ ]


a) 1/4√3 fC R∟ b) 1/4√3 C R∟ c) 1/4√2 fCR∟ d) 1/6√3 fC R∟

12.The form factor of a bridge rectifier is [ ]


a)1.57 b)0.482 c)0.812 d)1.11

13.The average value of DC current for half wave rectifier is [ ]


a)Im/2 b) Im/π c) 2Im/π d) Im/√2

14. Transformer utilization factor of half wave rectifier is [ ]


a) 0.693 b) 0.812 c) 0.287 d) 0.406

15. Bridge rectifier requires [ ]


a) 2 diodes b) 3 diodes c) 4 diodes d) 8diodes
16. The PIV of a half wave rectifier is [ ]
a) Vm b) 2Vm c) Vm/2 d) 3Vm

17. Transformer utilization factor of center tapped full wave rectifier is [ ]


a) 0.693 b) 0.812 c) 0.287 d) 0.406

18. The form factor of a half wave rectifier is [ ]


a) 1.57 b) 0.482 c) 0.812 d)1.11

19. The peak factor of a half wave rectifier is [ ]


a) 1.57 b)2 c) 1.414 d)1.11

20. The peak factor of a full wave rectifier is [ ]


a) 1.57 b) 2 c) 1.414 d) 1.11
.
UNIT-III
1. A bipolar junction transistor is in saturation region. Given V cc =10V, RC = 1k, h fc = 100 and V ce (sat) = 0.3V.
What is the collector current in saturation [ ]
a) 10mA b) 9.7mA c) 0mA d) 1mA

2. The current gain of a BJT is [ ]


a) gm r o b) gm / r o c) gm r π d) gm ¿ r π

3. The quiescent collector current I c of a transistor is increased by changing resistance. As a


result [ ]
a) gm will not be affected b) gm will decrease c) gm will increase
d) gm will increase or decrease depending upon bias stability

4. Which of the following is the exact expression for I CEO (i.e., collector to emitter current with
base open) in a junction transistor? [ ]
a) α I CBO b) (α/α-1) I CBO c) I CBO/1-α d) (1-α) I CBO
5. If an input signal ranges from 20µA - 40µA with an output signal ranging from
0.5mA – 1.5mA. What is the β ac ? [ ]
a) 0.05 b) 20 c) 50 d) 500
6. A collector collects [ ]
a) Electrons from the base in case PNP transistors
b) electrons from the emitter in case of PNP transistors
c) Holes from the base in case of NPN transistors
d) holes from the base in case of PNP transistors
7. A PNP transistors is made of [ ]
a) Silicon b) germanium c) either Si or Ge d) None
8. In a transistor the region that is very lightly doped and very thin is the [ ]
a) Emitter b) base c) collector d) None
9. In an NPN transistor when the emitter junction is forward biased and the collector junction
is reverse biased, the transistor will operate in [ ]
a) Active region b) saturation region c) cutoff region d) inverted region
10. The arrow head on a transistor symbol indicates [ ]
a) Direction of electron current in the emitter b) Direction of hole current in the emitter
c) Diffusion current in the emitter d) Drift current in the emitter
11. The largest current flow of a bipolar transistor occurs [ ]
a) In emitter b) in base c) in collector d) through emitter
12. A FET has a [ ]
a) Very high input resistance b) very low input resistance
c) High connection emitter junction d) forward biased PN junction
13. Most of the electrons in the base of an NPN transistor flow. [ ]
a) out of the base lead b) in to the collector c) in to the emitter d) ) in to the base supply

14. When a silicon diode is forward biased, what is VBE for a C-E configuration? [ ]
a) 0.7V b) voltage divider bias c) emitter voltage d) 0.4V
15. To operate properly, a transistor’s base-emitter junction must be forward biased with
reverse bias applied to which junction? [ ]
a) base-collector b) collector-base c) collector-emitter d) base- emitter
16. If a 2 mV signal produces a 2 V output, what is the voltage gain? [ ]
a) 100 b) 0.001 c) 1000 d) 0.004
17. A current ratio of IC/IE is usually less than one and is called: [ ]
a) alpha b) theta c) beta d) omega
18. A transistor may be used as a switching device or as a [ ]
a) tuning device b) fixed resistor c) rectifier d) variable resister
19. When transistors are used in digital circuits they usually operate in the [ ]
a) break down region b) linear region
c) active region d) saturation and cutoff regions
20. When an input delta of 2 V produces a transconductance of 1.5 mS, what is the drain current delta?
[ ]
a) 666mA b) 3mA c) 0.75mA d) 0.5Ma

UNIT-IV
1. A transistor is connected in CE configuration with V cc = 10V, the voltage drop across the
600Ω resistor in the collector circuit is 0.6V. If α=0.98 the base current is nearly [ ]
a) 6.12mA b) 2.08mA c) 0.98mA d) 0.02mA
2. For a junction FET in the pinch off region, as the drain voltage is increased, the drain current[ ]
a) becomes zero b) abruptly decreases
c) abruptly increases d) remains constant
3. The tranconductance of a JFET is equal to [ ]
2 I DSS 2 2 I DS I DSS V GS
|V P| √ DSS DS
a) - b) I I c) - d) (1- )
VP VP VP VP
4. An n-channel JFET has I DSS = 2mA and V P = -4V, its transconductance gm (in mA/V) when
applied gate to source voltage V GS = -2V [ ]
a) 0.25 V b) 0.5V c) 0.75 d) 1.0
5. In MOSFET devices the n-channel type is better than the p-channel type in the following
aspects. [ ]
a) it has better Noise immunity b) it is faster
c) It is TTL compatible d) it has better drive capability
6. The threshold voltage of an n-channel enhancement mode MOSFET is 0.5V.When the device
is biased at a gate voltage of 3V.Pinch off would occur at a drain voltage of [ ]
a) 1.5V b) 2.5V c) 3.5 V d) 4.5V

7. The early effect in a bi-polar junction transistor is caused by [ ]


a) fast turn-on b) fast turn-off c) large collector-base reverse bias
d) large emitter-base forward bas
8. The Q point on a load line may be used to determine: [ ]
a) Vcc b) Vc c) Ic d) Vb
9. The stability factor of a fixed bias is [ ]
a) 1+β b) 1-β c) β /(1-β) d) 1/(1-β)
10. Stability’ S’ is approximately unity for [ ]
a) collector-base bias b) fixed bias c) self bias d) none
11. Voltage-divider bias provides [ ]
a) A stable ‘Q’ point b) a Q point that easily changes in the transistor’s current gain
c) A Q point that is stable and easily changes in the transistor’s current gain
d) An unstable ‘Q’ point
12. The Q point of a transistor biasing current implies [ ]
a) zero bias b) no output c) no distortion d) no input signal
13. The biasing method which is considered independent of transistor βdc is [ ]
a) fixed bias b) collector feedback bias
c) voltage divider bias d) base bias with collector feedback
14. The best location for setting a Q point on dc load line of a FET amplifier is [ ]
a) saturation point b) mid-point c) cut-off point d)
15. The operating point variation is due to [ ]
a) ICO b) VBE c) β d) all
16. For normal amplification, the Q point should be established in the [ ]
a) Active region b) saturation region c) cut off region d) None
17. The power transistors the heat developed at the the collector junction may be
removed by the use of [ ]
a) Heat sink b) transistor with high β c) transistor with low β d) None
18. The early effect in BJT is caused due to [ ]
a) slow turn off b) fast turn off c) break down d) none
19. In fixed bias circuit if the base resister is shorted then [ ]
a) the transistor may get damaged b) the base voltage is zero
c) the collector voltage will be the supply voltage d) the collector current is zero
20. Thermistor having ________ temperature coefficient [ ]
a) positive b) negative c) zero d) neutral
UNIT-V
1. What is the phase difference between input and output signal in CE amplifier [ ]
a)0º b)45º c)180º d)90º
2. The voltage gain of CC amplifier is___ [ ]
a) < 1 b) >1 c) =1 d)None
3. A cascade amplifier comprises [ ]
a) CB and CC b) CB and CE c) CE and CB d) CC and CE
4. Which of the following is known as emitter follower [ ]
a) CE b) CC c) CB d) None
5 Which of the following is used for impedance matching [ ]
a)CE b) CB c)CC d) Cascade
6. Which of the following power amplifiers operate in least distortion [ ]
a) class A b) class B c) class C d) class D
7. Which of the following is normally used in cascading? [ ]
a) CE b) CB c) CC d) None
8. The β cutoff frequency is defined for____ [ ]
a)CE b) CB c) CC d) None
9. The ά cutoff frequency is defined for___ [ ]
a) CE b) CB c) CC d) None
10. The BJT amplifier which is having the highest output resistance is____ [ ]
a)CE b) CB c) CC d) None
11. A Transistor has hfe =27, then its hfc will be______ [ ]
a) 0,28 b) 0,028 c) 28 d) 2.8

12 Which of the following configurations has the lowest output impedance? [ ]


a) Fixed bias b) voltage divider c) emitter follower d) none
13. The lowest current gain of transistor amplifier is in _____ [ ]
a) CB b) CE c) CC d) CS
14. In CE amplifier stage on introducing a resistor RE in emitter circuit the input resistance____
a) increases b) decreases c) remain constant d) increases and then decreases [ ]
15. With source resistance of 1kΩ the output Impedance of CE amplifier is of order of______
a) kilo ohm b) mega ohm c) ohm d) giga ohm [ ]
16. The h fe of a typical transistor is of _________ [ ]
a) 94 b) 49 c) 1 d) 100
17. The highest voltage gain of transistor amplifier is ____________ [ ]
a) CE b) CB c) CC d) CS
18. Parameter hie of typical transistor is of order of _____ ohm [ ]
a) 1 b) 1000 c) 100 d) 10000
19. The lowest current gain of transistor amplifier is ________ [ ]
a) CB b) CE c) CC d) CS
20. With typical load resistance of 4KΩ the voltage gain of CC amplifier is of order of _____
a) 0.009 b) 0.099 c) 0.99 d) 0.00099 [ ]

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