0% found this document useful (0 votes)
18 views2 pages

Crash Dump

Uploaded by

D. Va
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
18 views2 pages

Crash Dump

Uploaded by

D. Va
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
You are on page 1/ 2

Unhandled SIG_SEGV in ''

caused by instruction swics 0xe851 (at b3aeca82), address 4


Version: r2.5.2.1a build 103
Reference: 83ECF5E4
Registers:
r00: 00000000
r01: 00000004
r02: 000FFFFF
r03: 00000004
r04: 7CEF180C
r05: 8C2E4F20
r06: B0C55124
r07: 00000000
r08: 7CEF1878
r09: B0C55124
r10: 138414E8
r11: 138414E8
r12: B2B6C70C
r13: 7CEF17E8
r14: B2B4B411

Emulated ARM9:
Mode 00, IRQ 00000000, CPSR 00000000, PC 00000000, cycles 00000000
r0: 00000000
r1: 00000000
r2: 00000000
r3: 00000000
r4: 00000000
r5: 00000000
r6: 00000000
r7: 00000000
r8: 00000000
r9: 00000000
r10: 00000000
r11: 00000000
r12: 00000000
r13: 00000000
r14: 00000000
r15: 00000000
Debug instruction count: 0

Emulated ARM7:
Mode 00, IRQ 00000000, CPSR 00000000, PC 00000000, cycles 00000000
r0: 00000000
r1: 00000000
r2: 00000000
r3: 00000000
r4: 00000000
r5: 00000000
r6: 00000000
r7: 00000000
r8: 00000000
r9: 00000000
r10: 00000000
r11: 00000000
r12: 00000000
r13: 00000000
r14: 00000000
r15: 00000000
Debug instruction count: 0

Translation cache details:


main: 0x840a9000 - 0x850a9000
main: 2079682560 + -2062905344 bytes
itcm: 0x850a9000 - 0x851a9000
itcm: 2062905344 + -2061856768 bytes
alternate: 0x851a9000 - 0x853a9000
alternate: 2061856768 + -2059759616 bytes

0 texture cache bytes allocated, 0 texture cache elements.

You might also like