Electronic Devices

BITS Pilani Dr. Navneet Gupta

Pilani Campus Department of Electrical and Electronics Engineering
 BITS Pilani
Pilani Campus

Course No. EEE F214/INSTR F214/ECE F214

Module-6
PN Junction: Small-Signal & Transient Response
Disclaimer

The content used in this presentation is collected from

various standard textbooks. The copyright is held with
respective publishers/authors. The content is used for
academic purpose only and to disseminate the
knowledge in the field of electronic devices.

Navneet Gupta

BITS Pilani, Pilani Campus

 Lecture-20
Rectifiers
Piecewise-linear approximations of junction diode characteristics

E0  Vbi
Improved
Characteristic

Ideal diode Ideal diode with an offset voltage Real diode

p-n junction : unilateral nature

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Prof. Navneet Gupta
Design of Junction Diodes for
rectifiers
 Should have I-V characteristics as close as possible to that of the
ideal diode.
 VBR should be large and offset voltage Eo in the forward direction
should be small.
 s Crit 2
• Band gap of a material VBR 
2qN
– ni is small for large Eg material
– Io decreases as Eg increases.
• Doping concentration on each side
– Influences Vbr, Vbi and R
Short diode:
Punch-through is a breakdown below the value of VBR

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Prof. Navneet Gupta BITS Pilani, Pilani Campus
 p+ - n - n+ junction diode

Figure 5—25
A p+- n - n+ junction diode: (a) device configuration; (b) zero-bias condition; (c)
reverse-biased to punch-through.
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Prof. Navneet Gupta
Example:

A Si p+n junction diode (built-in pot. = 0.956 V) has a donor density

of 1017 cm-3 and an n-region width of 1 micron. Does it breakdown
by avalanche or punch through?

W  44.25 106 cm

VR  15V

Prof. Navneet Gupta BITS Pilani, Pilani Campus

 Capacitance of p-n junctions
Due to the separation of positive and negative charges in the
depletion region, a capacitance is associated with the pn jn.

dQ s
Cdep  Cdep  ( F / cm2 )
dVR W

1 Wdep 2 2(Vbi  VR )
 
Cdep 2  s2 qN  S

Charge densities in the depletion region for

applied reverse-bias voltages of VR and VR +dVR From this C-V data can Na and Nd be determined? 8
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Example: Lecture-21

If the slope of the line in the previous slide is 2x1015 F-2 V-1cm-2 the intercept
is 0.84V, find the lighter and heavier doping concentrations Nl and Nh . Take
ni = 1010 cm-3

Nl  6 1015 cm3

Nh  1.8 1018 cm3

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Diffusion Capacitance
Recall… Injection of minority carriers under forward bias.

pn  pn 0  eV VT  1

dQp I p qI p
Cdiff .  Cdiff .   (F )
dV VT kT
Check under reverse bias condition
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TRANSIENT AND A-C
CONDITIONS

How junction behaves under ac conditions??

Two simultaneous variables: space and time

To illustrate it

Switching of a diode from its forward state to its reverse

state is analyzed

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Prof. Navneet Gupta
Effects of a step turn-off transient in a p+n diode

t /  p
Q p (t )  I p e
Qp (t  0)  I p , i(t  0)  0
When the current is suddenly
removed at t = 0, the diode has
a stored charge.
Some time is required for Qp(t)
to reach to zero.

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Prof. Navneet Gupta
What does one conclude?

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Turn-off transient
V goes to zero

p+ n
VF
t=0 IF 
R
1 2
VF VR
R R

VR
IR  
R
ts  storage delay time
trr  reverse recovery time
Prof. Navneet Gupta BITS Pilani, Pilani Campus
Contd…

Important points:
1. The junction remains FB for 0 < t < ts even though the VA is such
as to reverse bias the diode.
2. The t = ts point correlates with VA = 0

 IF 
tsd   p ln 1  
 IR 

Should be less

Add efficient recombination centers to the

bulk material.
Make lightly doped neutral region shorter
than a minority carrier diffusion length.

Prof. Navneet Gupta BITS Pilani, Pilani Campus

Non-Ideal Behaviour
Secondary Effects Lecture-22

 Effects of built-in potential and HIL

 Recombination/Generation takes place in SCR region
 Ohmic effects
 Effect of Graded junction

Prof. Navneet Gupta BITS Pilani, Pilani Campus

Effect of Built-in potential

Heavily doped diodes

For Si PN Diode

Turn-on voltage is higher at

lower temperature 18
Prof. Navneet Gupta BITS Pilani, Pilani Campus
Contd…

Built-in Potential for a heavily doped pn junction

Dramatic increase in the diode current near the

band gap voltage

Prof. Navneet Gupta BITS Pilani, Pilani Campus

High-Level Injection (HLI) Effect

As VA increases, the side of the junction which is more lightly doped

will eventually reach HLI:

 significant gradient in majority-carrier profile

Majority-carrier diffusion current reduces the diode current from the ideal case.

Prof. Navneet Gupta BITS Pilani, Pilani Campus

Approximate Analysis

 ( Ec  E fn ) / kT  ( E fp  Ev ) / kT
n  Nce p  Nve
Multiplying these two equations

 ( Ec  Ev )/ kT  ( E fn  E fp )/ kT
pn  N c N v e e

ni 2
pn  ni 2eqV / kT
Let us calculate its value for high level injection

Prof. Navneet Gupta BITS Pilani, Pilani Campus

Recombination and Generation in SCR

Ideal Condition  No recombination in the space charge region (SCR)

Real Condition  Recombination/Generation takes place in SCR region

Contribute forward current and reverse current

SCR Current

Prof. Navneet Gupta BITS Pilani, Pilani Campus

Contd…

pn  ni 2eqV / kT
Recombination requires the presence of both electrons and holes

Recombination rate is largest when: n  p  ni eqV / 2kT

ni
Net recombination (generation) rate: (eqV /2 kT  1)
 dep
τdep is the generation/
recombination lifetime in
the depletion layer.
Negative Zero Positive

Net Generation carriers swept into n Equilibrium Net recombination

& p region  additional current

Prof. Navneet Gupta BITS Pilani, Pilani Campus

 qniWdep
I  I 0 (e qV / kT
 1)  A (e qV / 2 kT  1)
τ dep

additional current = Space-Charge Region (SCR) current

Net Generation under reverse bias Net Recombination in Forward Bias

For reverse bias greater than several kT/q,

Prof. Navneet Gupta
Effect of Series Resistance
Ohmic Losses

 Rp  Rn
V  VA  IRS

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Prof. Navneet Gupta BITS Pilani, Pilani Campus
Summary: Deviations from
Ideal I-V

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Prof. Navneet Gupta BITS Pilani, Pilani Campus