Homework 3
Homework 3
3. Design an expanding opcode to allow all the following to be encoded in a 32-bit instruction:
15 instructions with two 12 bit addresses and one 4 bit register number
650 instructions with one 12 bit address and one 4 bit register number
6. Given the memory values below and a one address machine with an accumulator, what values do
the following instructions load into the accumulator?
Word 20 contains 40
Word 30 contains 50
Word 40 contains 60
Word 50 contains 70
a. LOAD IMMEDIATE 20
b. LOAD DIRECT 20
c. LOAD INDIRECT 20
d. LOAD IMMEDIATE 30
e. LOAD DIRECT 30
f. LOAD INDIRECT 30
10. Convert the following formulas from infix to reverse Polish notation
a. A+B+C+D-E
b. (A - B) * (C + D) + E
c. (A * B) + (C * D) + E
d. (A - B) * (((C – D * E) / F) / G) * H
a. AB–C+D*
b. AB / CD / +
c. ABCDE +**/
d. ABCDE * F /+ G – H / *+
14. Convert the following Boolean formulas from infix to reverse Polish notation
a. (A AND B) OR C
b. (A OR B) AND (A OR C)
c. (A AND B) OR (C AND D)
18. It is common in programming for a program to need to determine where a variable X is with
respect to the interval A to B. If a three address instruction were available with operands A, B, and X,
how many condition code bits would have to be set by this instruction?
23. For the 16 bit binary number 1001 0101 1100 0011, show the effect of
30. Assume that the monks in Hanoi can move 1 disk per minute (they are in no hurry to finish the job
because employment opportunities for people with this particular skill are limited in Hanoi). How long
will it take them to solve the entire 64 disk problem? Express your results in years.
32. A computer uses DMA to read from its disk. The disk has 64 512 byte sectors per track. The disk
rotation time is 16 msec. The bus is 16 bits wide, and bus transfers take 500 nsec each. The average
CPU instruction requires two bus cycles. How much is the CPU slowed down by DMA?