Data Sheet No. PD60174 Rev.

IR2184(4)(S)
HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation Packages
Fully operational to +600V
Tolerant to negative transient voltage 14-Lead PDIP
dV/dt immune IR21844
• Gate drive supply range from 10 to 20V 8-Lead SOIC
• Undervoltage lockout for both channels IR2184S
• 3.3V and 5V input logic compatible
• Matched propagation delay for both channels
• Logic and power ground +/- 5V offset. 8-Lead PDIP
• Lower di/dt gate driver for better noise immunity IR2184
• Output source/sink current capability 1.4A/1.8A 14-Lead SOIC
IR21844S
Description
The IR2184(4)(S) are high voltage,
high speed power MOSFET and IGBT IR2181/IR2183/IR2184 Feature Comparison
drivers with dependent high and low Cross-
side referenced output channels. Pro- Part
Input conduction
Dead-Time Ground Pins Ton/Toff
logic prevention
prietary HVIC and latch immune logic
CMOS technologies enable rugge- 2181 COM
HIN/LIN no none 180/220 ns
dized monolithic construction. The 21814 VSS/COM
2183 Internal 500ns COM
logic input is compatible with standard 21834
HIN/LIN yes
Program 0.4 ~ 5 us VSS/COM
180/220 ns
CMOS or LSTTL output, down to 3.3V 2184 Internal 500ns COM
IN/SD yes 680/270 ns
logic. The output drivers feature a high 21844 Program 0.4 ~ 5 us VSS/COM
pulse current buffer stage designed for
minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or
IGBT in the high side configuration which operates up to 600 volts.

Typical Connection
up to 600V

V CC

VCC VB
IN IN HO
SD SD VS TO
LOAD

COM LO

up to 600V

IR2184
HO
IR21844
VCC VCC VB
IN IN VS
TO
SD SD LOAD

DT
(Refer to Lead Assignments for correct
configuration). This/These diagram(s) show V SS VSS COM
RDT
electrical connections only. Please refer to LO
our Application Notes and DesignTips for
proper circuit board layout.

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IR2184(4) (S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.

Symbol Definition Min. Max. Units

VB High side floating absolute voltage -0.3 625
VS High side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
V
VLO Low side output voltage -0.3 VCC + 0.3
DT Programmable dead-time pin voltage (IR21844 only) VSS - 0.3 VCC + 0.3
VIN Logic input voltage (IN & SD) VSS - 0.3 VSS + 10
VSS Logic ground (IR21844 only) VCC - 25 VCC + 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PD Package power dissipation @ TA ≤ +25°C (8-lead PDIP) — 1.0
(8-lead SOIC) — 0.625
W
(14-lead PDIP) — 1.6
(14-lead SOIC) — 1.0
RthJA Thermal resistance, junction to ambient (8-lead PDIP) — 125
(8-lead SOIC) — 200
°C/W
(14-lead PDIP) — 75
(14-lead SOIC) — 120
TJ Junction temperature — 150
TS Storage temperature -50 150 °C
TL Lead temperature (soldering, 10 seconds) — 300

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage VS + 10 VS + 20
VS High side floating supply offset voltage Note 1 600
VHO High side floating output voltage VS VB
VCC Low side and logic fixed supply voltage 10 20
VLO Low side output voltage 0 VCC V

VIN Logic input voltage (IN & SD) VSS VSS + 5

DT Programmable dead-time pin voltage (IR21844 only) VSS VCC
VSS Logic ground (IR21844 only) -5 5
TA Ambient temperature -40 125 °C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.

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 IR2184(4) (S)

Dynamic Electrical Characteristics

VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.

Symbol Definition Min. Typ. Max. Units Test Conditions

ton Turn-on propagation delay — 680 900 VS = 0V
toff Turn-off propagation delay — 270 400 VS = 0V or 600V
tsd Shut-down propagation delay — 180 270
MTon Delay matching, HS & LS turn-on — 0 90 nsec
MToff Delay matching, HS & LS turn-off — 0 40
tr Turn-on rise time — 40 60 VS = 0V
tf Turn-off fall time — 20 35 VS = 0V
DT Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 280 400 520 RDT= 0
HO turn-off to LO turn-on (DTHO-LO) 4 5 6 µsec RDT = 200k
MDT Deadtime matching = DTLO - HO - DTHO-LO — 0 50 RDT=0
nsec
— 0 600 RDT = 200k

Static Electrical Characteristics

VBIAS (VCC, VBS) = 15V, VSS = COM, DT= VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol Definition Min. Typ. Max. Units Test Conditions

VIH Logic “1” input voltage for HO & logic “0” for LO 2.7 — — VCC = 10V to 20V
VIL Logic “0” input voltage for HO & logic “1” for LO — — 0.8 VCC = 10V to 20V
VSD,TH+ SD input positive going threshold 2.7 — — VCC = 10V to 20V
V
VSD,TH- SD input negative going threshold — — 0.8 VCC = 10V to 20V
VOH High level output voltage, VBIAS - VO — — 1.2 IO = 0A
VOL Low level output voltage, VO — — 0.1 IO = 0A
ILK Offset supply leakage current — — 50 VB = VS = 600V
µA
IQBS Quiescent VBS supply current 20 60 150 VIN = 0V or 5V
IQCC Quiescent VCC supply current 0.4 1.0 1.6 mA VIN = 0V or 5V
IIN+ Logic “1” input bias current — 5 20 IN = 5V, SD = 0V
µA
IIN- Logic “0” input bias current — 1 2 IN = 0V, SD = 5V
VCCUV+ VCC and VBS supply undervoltage positive going 8.0 8.9 9.8
VBSUV+ threshold
VCCUV- VCC and VBS supply undervoltage negative going 7.4 8.2 9.0
VBSUV- threshold
V
VCCUVH Hysteresis 0.3 0.7 —
VBSUVH
IO+ Output high short circuit pulsed current 1.4 1.9 — VO = 0V,
PW ≤ 10 µs
IO- Output low short circuit pulsed current 1.8 2.3 — A VO = 15V,
PW ≤ 10 µs

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IR2184(4) (S)

Functional Block Diagrams

VB

2184 UV
DETECT
R HO
R Q
PULSE
HV
FILTER
LEVEL S
VSS/COM SHIFTER
IN LEVEL VS
PULSE
SHIFT
GENERATOR

DEADTIME VCC

UV
+5V DETECT
LO

VSS/COM
SD LEVEL DELAY
SHIFT COM

VB

21844 UV
DETECT
R HO
R Q
PULSE
HV
FILTER
LEVEL S
VSS/COM SHIFTER
IN LEVEL VS
PULSE
SHIFT
GENERATOR

DT DEADTIME VCC

UV
+5V DETECT
LO

VSS/COM
SD LEVEL DELAY
SHIFT COM

VSS

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Lead Definitions
Symbol Description
IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2184 and VSS for IR21844)
SD Logic input for shutdown (referenced to COM for IR2184 and VSS for IR21844)
DT Programmable dead-time lead, referenced to VSS. (IR21844 only)
VSS Logic Ground (21844 only)
VB High side floating supply
HO High side gate drive output
VS High side floating supply return
VCC Low side and logic fixed supply
LO Low side gate drive output
COM Low side return

Lead Assignments

1 IN VB 8 1 IN VB 8
2 SD HO 7 2 SD HO 7

3 COM VS 6 3 COM VS 6

4 LO VCC 5 4 LO VCC 5

8-Lead PDIP 8-Lead SOIC

IR2184 IR2184S

1 IN 14 1 IN 14

2 SD VB 13 2 SD VB 13

3 VSS HO 12 3 VSS HO 12

4 DT VS 11 4 DT VS 11

5 COM 10 5 COM 10

6 LO 9 6 LO 9

7 VCC 8 7 VCC 8

14-Lead PDIP 14-Lead SOIC

IR21844 IR21844S

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IR2184(4) (S)

01-6014
8-Lead PDIP 01-3003 01 (MS-001AB)

INCHES MILLIMETERS
D B DIM
MIN MAX MIN MAX
A 5 FOOTPRINT A .0532 .0688 1.35 1.75
A1 .0040 .0098 0.10 0.25
8X 0.72 [.028]
b .013 .020 0.33 0.51
8 7 6 5 c .0075 .0098 0.19 0.25
6 H D .189 .1968 4.80 5.00
E E .1497 .1574 3.80 4.00
0.25 [.010] A
1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC
e1 .025 BASIC 0.635 BASIC
H .2284 .2440 5.80 6.20
K .0099 .0196 0.25 0.50
L .016 .050 0.40 1.27
6X e 3X 1.27 [.050]
8X 1.78 [.070] y 0° 8° 0° 8°

e1 K x 45°
A
C y

0.10 [.004]
A1 8X L 8X c
8X b
7
0.25 [.010] C A B

NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.

1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
A SUBSTRATE.
01-6027
8-Lead SOIC 01-0021 11 (MS-012AA)

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 IR2184(4) (S)

01-6010
14-Lead PDIP 01-3002 03 (MS-001AC)

01-6019
14-Lead SOIC (narrow body) 01-3063 00 (MS-012AB)

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IR2184(4) (S)

IN IN(LO)
50% 50%
SD
IN(HO)
ton tr toff tf

HO 90% 90%

LO
LO
HO 10% 10%
Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions

SD
50%
50% 50%
IN
tsd

HO 90% 90%
LO
HO DTLO-HO 10%

Figure 3. Shutdown Waveform Definitions LO 90%

DT HO-LO

10%
IN (LO)
MDT= DTLO-HO - DTHO-LO
50% 50%
IN (HO)
Figure 4. Deadtime Waveform Definitions
LO HO

10%

MT MT

90%

LO HO

Figure 5. Delay Matching Waveform Definitions

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 7/24/2001

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