5- CH 5 Arithmetic and Logic Instructions - ١٢٢٠١٩
5- CH 5 Arithmetic and Logic Instructions - ١٢٢٠١٩
Faculty of Engineering
Department of Electrical and Computer Engineering
ECE484– Microprocessors II
* Notes :
⁻ dst and src must be of the same type (size).
⁻ dst and src cannot both be memory locations.
⁻ Flags affected: AF, CF, OF, SF, ZF.
Examples :
Example :
MOV AL, 05H ; AL = 5 H ZF = 0 (result not zero)
ADD AL, 41H ; AL = 46H CF = 0 (no carry)
MOV AX, 32FAh AF = 0 (no half-carry)
MOV BX, 1F02h SF = 0 (result positive)
PF = 0 (odd parity)
ADD AL, BL
OF = 0 (no overflow)
ADD AL, 5 ; AL = 101H
Dr Abdullah Al Masrub ECE484 4
8086 Microprocessor
Arithmetic Instructions
* Notes :
⁻ dst and src must be of the same type (size).
⁻ dst and src cannot both be memory locations.
⁻ Flags affected: AF, CF, OF, SF, ZF.
Examples :
Example :
ZF = 0 (result not zero)
CF = 1 (borrow)
MOV AL , 27h AF = 1 (half- borrow)
MOV BL , 44h SF = 1 (result negative)
SUB AL , 5 ;AL=22 PF = 1 (even parity)
SUB AL , BL ;AL= – 22 = 1010 0010 OF = 0 (no overflow)
Examples :
Syntax :
INC dst
DEC dst
* Notes :
⁻ AF, OF, SF, and ZF are updated, but CF is not affected.
⁻ If an 8-bit dst containing FFH or a 16-bit dst containing FFFFH is
incremented, the result will be all 0’s with no carry.
⁻ If an 8-bit dst containing 00H or a 16-bit dst containing 0000H is
decremented, the result will be FFH or FFFFH with no carry (borrow).
Examples :
NEG :
The negate instruction replaces the number in a dst with its 2’s
complement.
This is done by subtracting the contents of operand from zero and the
result is returned to the operand.
The dst can be a register or a memory location.
It gives the same result as the invert each bit and add one algorithm.
The NEG instruction updates AF, SF, ZF, and OF.
Syntax :
NEG dst
Examples :
NEG AL ;Replace number in AL with its 2’s complement
NEG BYTE [BX] ;Replace byte at offset BX in DS with its 2’s complement
NEG WORD [BP] ;Replace word at offset BP in SS with its 2’s complement
NEG AL if AL= 00110101, 35H is replaced with its 2’s complement, AL=11001011.
MOV AX, 2CBh ; 715d
NEG AX ; AX = FD35H
Dr Abdullah Al Masrub ECE484 10
8086 Microprocessor
Arithmetic Instructions
CMP :
compares a byte/word in the specified src with a byte/word in the
specified dst.
The src can be an immediate number, a register, or a memory location.
The dst can be a register or a memory location.
The comparison is actually done by subtracting the src byte/word from
the dst byte/word.
The src and the dst are not changed, but the flags are set to indicate the
results of the comparison.
Syntax :
CMP dst, src
* Notes :
⁻ The src and the dst cannot both be memory locations.
⁻ AF, OF, SF, ZF, and CF are updated.
CMP :
Examples :
MUL :
This instruction multiplies an unsigned byte in some src with an unsigned
byte in AL register or an unsigned word in some src with an unsigned
word in AX register.
The src can be a register or a memory location.
Syntax :
MUL src
* Notes :
⁻ If the most significant byte of a 16-bit result or the most significant word
of a 32-bit result is 0, CF and OF will both be 0’s.
⁻ To multiply a byte with a word, it is necessary to move the byte into a
word location such as an extended register and fill the upper byte of the
word with all 0’s.
MUL :
* Algorithm :
AL AX
x r/m8 x r/m16
__________________ __________________
AX DX AX
MUL :
Examples :
MUL :
Examples :
Mov AL, 5h
Mov BL, 10h
Mul BL ;C= 0050h, CF = 0
(no overflow – CF is 0 because the upper half of AX is zero)
Mov AX , 2000H
Mov BX, 0100H
Mul BX ;DX:AX = 00200000h, CF = 1 because DX is not zero
IMUL :
This instruction multiplies a signed byte from some src with a signed
byte in AL or a signed word from some src with a signed word in AX.
The src can be a register or a memory location.
Syntax :
IMUL src
* Notes :
⁻ If the magnitude of the product does not require all the bits of the destination,
the unused byte/word will be filled with copies of the sign bit.
⁻ If the upper byte of a 16-bit result or the upper word of a 32-bit result contains
only copies of the sign bit (all 0’s or all 1’s), then CF and the OF will both be 0; If it
contains a part of the product, CF and OF will both be 1.
⁻ To multiply a signed byte with a signed word, it is necessary to move the byte
into a word location and fill the upper byte of the word with copies of the sign
bit. The CBW instruction can be used for this purpose.
IMUL :
Examples :
IMUL :
Examples :
MOV AL, -2
MOV BL, -4
IMUL BL ;AX =0008, CF=OF=0 when result fits into operand of IMUL.
MOV AL, 48
MOV BL, 4
IMUL BL ;AX = 00C0h, OF = 0, CF=0, AH is a sign extension of AL, so the
OF is cleared.
MOV AX , 8760h
MOV BX , 100h
IMUL BX ;DX = FF87h, AX = 6000h, OF = 1, CF=1, CF=OF= 1 if the answer
size >operand size, Zero other wise.
DIV :
used to divide an unsigned word by a byte or to divide an unsigned
double word (32 bits) by a word.
Syntax :
DIV src
* Notes :
⁻ When a word is divided by a byte, the word must be in AX register, and the
divisor can be in a register or a memory location. After the division, AL will
contain the 8-bit quotient, and AH will contain the 8-bit remainder.
⁻ When a double word is divided by a word, the high word of the double word
must be in DX and the low word in AX. The divisor can be in a register or a
memory location. After the division, AX will contain the 16-bit quotient and DX
will contain the 16-bit remainder.
⁻ If an attempt is made to divide by 0 or if the quotient is too large to fit in the
destination (greater than FFH / FFFFH), the 8086 will generate a type 0 interrupt.
⁻ To divide a byte by a byte, it is necessary to put the dividend byte in AL and fill
AH with all 0’s. Similarly, to divide a word by a word, it is necessary to put the
dividend word in AX and fill DX with all 0’s.
Dr Abdullah Al Masrub ECE484 20
8086 Microprocessor
Arithmetic Instructions
DIV :
* Algorithm :
DIV :
Examples :
Examples :
IDIV :
This instruction is used to divide a signed word by a signed byte or to divide a
signed double word by a signed word.
Syntax :
IDIV src
* Notes :
When dividing a signed word by a signed byte, the word must be in the AX
register and the divisor can be in an 8-bit register or a memory location.
After the division, AL will contain the signed quotient and AH will contain the
signed remainder.
The sign of the remainder will be the same as the sign of the dividend.
If an attempt is made to divide by 0, the quotient is greater than 127 (7FH) or
less than –127 (81H), the 8086 will automatically generate a type 0 interrupt.
IDIV :
When dividing a signed double word by a signed word, the high word of
the dividend (numerator) must be in the DX register and the low word in
the AX register.
The divisor can be in any other 16-bit register or memory location.
After the division, AX will contain a signed 16-bit quotient and DX will
contain a signed 16-bit remainder. The sign of the remainder will be the
same as the sign of the dividend.
Again, if an attempt is made to divide by 0, the quotient is greater than
+32,767 (7FFFH) or less than –32,767 (8001H), the 8086 will
automatically generate a type 0 interrupt.
To divide a signed byte by a signed byte, it is necessary to put the
dividend byte in AL and sign-extend AL into AH. The CBW instruction can
be used for this purpose.
Similarly, to divide a signed word by a signed word, it is necessary to put
the dividend word in AX and extend the sign of AX to all the bits of DX.
The CWD instruction can be used for this purpose.
IDIV :
Examples :
IDIV BL ;Signed word in AX / signed byte in BL; Quotient in AL, remainder in AH
IDIV BP ;Signed double word in DX and AX / signed word in BP, Quotient in AX,
remainder in DX
IDIV BYTE [BX] ;AX / byte at offset [BX] in DS
CMPSB/CMPSW :
used to compare a byte/word in one string with a byte/word in another string.
SI is used to hold the offset of the byte or word in the source string, and DI is
used to hold the offset of the byte or word in the destination string.
Syntax :
CMPSB
CMPSW
* Notes :
The AF, CF, OF, PF, SF, and ZF flags are affected by the comparison, but the two
operands are not affected.
After the comparison
If DF is reset, SI and DI will automatically be incremented by 1 for byte string
and by 2 for word string to point to the next element in the two strings.
If DF is set, then SI and DI will automatically be decremented by 1 for a byte
string and by 2 for a word string to point to the next element in the two
strings.
The string pointed to by SI must be in the data segment and the string pointed to
by DI must be in the extra segment.
The CMPS instruction can be used with a REPE or REPNE prefix to compare all the
elements of a string.
Dr Abdullah Al Masrub ECE484 27
8086 Microprocessor
Arithmetic Instructions
CMPSB/CMPSW :
Examples :
Assuming that (DS) =2000H, (SI) =1000H, (ES) =1200H, (DI) = 1A00H, (DF) =1,
content of 2000:1000=7AH, and content of 1200:1A00=8AH.
SCASB/ SCASW :
This instruction compares a byte in AL or a word in AX with a byte or a
word in ES pointed to by DI.
Syntax :
SCASB
SCASW
* Notes :
⁻ The string to be scanned must be in the extra segment, and DI must contain the
offset of the byte or the word to be compared.
⁻ If DF is cleared, then DI will be incremented by 1 for byte strings and by 2 for
word strings.
⁻ If DF is set, then DI will be decremented by 1 for byte strings and by 2 for word
strings.
⁻ SCAS affects AF, CF, OF, PF, SF, and ZF, but it does not change either the operand
in AL (AX) or the operand in the string.
SCASB/ SCASW :
Examples :
* Notes :
⁻ The source and the destination cannot both be memory locations.
⁻ CF and OF are both 0 after AND/OR/XOR/TEST.
⁻ PF, SF, and ZF are updated by the AND/OR/XOR/TEST instructions.
Examples :
AND BX, 00FFH ;Masks upper byte of BX, leaves lower byte unchanged.
AND BH, CL ;AND byte in CL with byte in BH; Result in BH.
AND CX, [SI] ;AND word in DS at offset [SI] with word in CX register.
Examples :
TEST AL, BH ;AND BH with AL. No result stored; Update PF, SF, ZF.
TEST BP, [BX] ;AND word at offset [BX] in DS with word in BP.
Example :
What is the result of executing the following sequence of instructions?
MOV AL, 01010101B
AND AL, 00011111B
OR AL, 11000000B
XOR AL, 00001111B
Solution :
The result can be summarized as follows:
MOV AL, 01010101B ;AL = 01010101
AND AL, 00011111B ;AL = 00010101
OR AL, 11000000B ;AL = 11010101
XOR AL, 00001111B ;AL = 11011010
NOT :
⁻ The NOT instruction inverts each bit (forms the 1’s complement) of a
byte or word in the specified dst.
⁻ The dst can be a register or a memory location.
Syntax :
NOT dst
Examples :
SHL dst, count ; Shift the Destination left by Count and fill the vacated bits
positions on the right with zeros. The MSB will be shifted into
CF. OF = 1 if CF and the current MSB are not the same.
CF MSB LSB 0
SAL dst, count ; (Shift Arithmetic Left) the Destination left by Count and fill
the vacated bits positions on the right with zeros. The MSB will be
shifted into CF. OF = 1 if CF and the current MSB are not the same.
CF MSB LSB 0
SHR dst, count ; Shift the Destination right by Count and fill the vacated bits
positions on the left with zeros. The LSB will be shifted into CF.
OF will be 1 if two MSBs are not both 0’s.
0 MSB LSB CF
SAR dst, count ; Shift the Destination right by Count and fill the vacated bits
positions on the left with the old MSB. The LSB will be shifted
into CF. OF will be 1 if two MSBs are not the same.
MSB MSB LSB CF
ROL dst, count ; Rotate the Destination left by Count. Each bit shifted out
from the leftmost bit goes back into the rightmost bit position.
MSB is placed as a new LSB and a new CF.
CF
ROR dst, count ; Rotate the Destination right by Count. Each bit shifted out
from the rightmost bit goes back into the leftmost bit position.
LSB is placed as a new MSB and a new CF.
CF
Examples :
MOV AL, 1Ch ;AL = 00011100b
ROR AL, 1 ;AL = 00001110b, CF=0.
RCL dst, count ; Rotate the Destination left by Count. The MSB of the
operand is rotated into the carry flag and the bit in the carry
flag is rotated around into LSB of the operand.
CF
Examples :
MOV BH, B3h ;CF=0, BH = 10110011
RCL BH, 1 ;CF=1, BH = 01100110, OF = 1 because MSB changed.
RCR dst, count ; Rotate the Destination right by Count. The LSB of the
operand is rotated into the carry flag and the bit in the carry
flag is rotated around into MSB of the operand.
CF
Examples :
STC ;CF = 1
MOV BL, 38h ;BL = 00111000
RCR BL, 1 ;BL = 10011100, CF =0, OF = 1 because MSB is changed to 1.
STC ;CF=1
MOV AL, 1Ch ;AL = 00011100b
RCR AL, 1 ;AL = 10001110b, CF=0.