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5- CH 5 Arithmetic and Logic Instructions - ١٢٢٠١٩

This document discusses arithmetic instructions for the 8086 microprocessor, including ADD, ADC, SUB, SBB, INC, DEC, NEG, CMP, and MUL. It provides the syntax and examples of using each instruction to perform arithmetic operations on registers and memory locations. It also notes which status flags each instruction affects.

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0% found this document useful (0 votes)
281 views

5- CH 5 Arithmetic and Logic Instructions - ١٢٢٠١٩

This document discusses arithmetic instructions for the 8086 microprocessor, including ADD, ADC, SUB, SBB, INC, DEC, NEG, CMP, and MUL. It provides the syntax and examples of using each instruction to perform arithmetic operations on registers and memory locations. It also notes which status flags each instruction affects.

Uploaded by

Boy az
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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ELMERGIB UNIVERSITY

Faculty of Engineering
Department of Electrical and Computer Engineering

ECE484– Microprocessors II

Instructor: Dr Abdullah Al Masrub


Arithmetic Instructions
8086 Microprocessor
Arithmetic Instructions

ADD and ADC:


 add a number from some src to a number in some dst and put the result
in the specified dst.
 The ADC also adds the status of the carry flag to the result.
 The source may be an immediate number, a register, or a memory
location.
 The destination may be a register or a memory location.
 Syntax :
ADD dst, src
ADC dst, src

 * Notes :
⁻ dst and src must be of the same type (size).
⁻ dst and src cannot both be memory locations.
⁻ Flags affected: AF, CF, OF, SF, ZF.

Dr Abdullah Al Masrub ECE484 3


8086 Microprocessor
Arithmetic Instructions

ADD and ADC:

 Examples :

ADD AL, 74H ;Add immediate number 74H to content of AL.


ADD DX, BX ;Add content of BX to content of DX.
ADD DX, [SI] ;Add word from mem. at offset [SI] to content of DX.
ADC CL, BL ;Add content of BL plus carry status to content of CL.
ADC AL, [BX] ;Add byte from memory at offset [BX] plus carry status to
content of AL .

 Example :
MOV AL, 05H ; AL = 5 H ZF = 0 (result not zero)
ADD AL, 41H ; AL = 46H CF = 0 (no carry)
MOV AX, 32FAh AF = 0 (no half-carry)
MOV BX, 1F02h SF = 0 (result positive)
PF = 0 (odd parity)
ADD AL, BL
OF = 0 (no overflow)
ADD AL, 5 ; AL = 101H
Dr Abdullah Al Masrub ECE484 4
8086 Microprocessor
Arithmetic Instructions

SUB and SBB :


 subtract the number in some src from the number in some dst and put
the result in the specified dst .
 The SBB instruction also subtracts the content of CF from the
destination.
 The source may be an immediate number, a register or memory location.
 The destination may be a register or a memory location
 Syntax :
SUB dst, src
SBB dst, src

 * Notes :
⁻ dst and src must be of the same type (size).
⁻ dst and src cannot both be memory locations.
⁻ Flags affected: AF, CF, OF, SF, ZF.

Dr Abdullah Al Masrub ECE484 5


8086 Microprocessor
Arithmetic Instructions

SUB and SBB :

 Examples :

SUB CX, BX ;CX – BX; Result in CX.


SBB CH, AL ;CH – AL – CF; Result in CH.
SUB AX, 3427H
SBB BX, [3427H] ;Subtract word at displacement 3427H and CF from BX.
SUB [BX], 04H ;Subtract 04 from byte at effective address [BX].
SBB CX, [BX] ;Subtract word at effective address [BX] and CF from CX.
SBB [BX], CX ;Subtract CX and CF from word in memory at EA [BX].

 Example :
ZF = 0 (result not zero)
CF = 1 (borrow)
MOV AL , 27h AF = 1 (half- borrow)
MOV BL , 44h SF = 1 (result negative)
SUB AL , 5 ;AL=22 PF = 1 (even parity)
SUB AL , BL ;AL= – 22 = 1010 0010 OF = 0 (no overflow)

Dr Abdullah Al Masrub ECE484 6


8086 Microprocessor
Arithmetic Instructions

SUB and SBB :

 Examples :

Dr Abdullah Al Masrub ECE484 7


8086 Microprocessor
Arithmetic Instructions

INC and DEC :


 The INC instruction adds 1 to a specified 8-bit or 16-bit register or to a
memory location.
 The DEC instruction subtracts 1 from a specified 8-bit or 16-bit register or
from a memory location..

 Syntax :
INC dst
DEC dst

 * Notes :
⁻ AF, OF, SF, and ZF are updated, but CF is not affected.
⁻ If an 8-bit dst containing FFH or a 16-bit dst containing FFFFH is
incremented, the result will be all 0’s with no carry.
⁻ If an 8-bit dst containing 00H or a 16-bit dst containing 0000H is
decremented, the result will be FFH or FFFFH with no carry (borrow).

Dr Abdullah Al Masrub ECE484 8


8086 Microprocessor
Arithmetic Instructions

INC and DEC :

 Examples :

Dr Abdullah Al Masrub ECE484 9


8086 Microprocessor
Arithmetic Instructions

NEG :
 The negate instruction replaces the number in a dst with its 2’s
complement.
 This is done by subtracting the contents of operand from zero and the
result is returned to the operand.
 The dst can be a register or a memory location.
 It gives the same result as the invert each bit and add one algorithm.
 The NEG instruction updates AF, SF, ZF, and OF.

 Syntax :
NEG dst

 Examples :
NEG AL ;Replace number in AL with its 2’s complement
NEG BYTE [BX] ;Replace byte at offset BX in DS with its 2’s complement
NEG WORD [BP] ;Replace word at offset BP in SS with its 2’s complement
NEG AL if AL= 00110101, 35H is replaced with its 2’s complement, AL=11001011.
MOV AX, 2CBh ; 715d
NEG AX ; AX = FD35H
Dr Abdullah Al Masrub ECE484 10
8086 Microprocessor
Arithmetic Instructions

CMP :
 compares a byte/word in the specified src with a byte/word in the
specified dst.
 The src can be an immediate number, a register, or a memory location.
 The dst can be a register or a memory location.
 The comparison is actually done by subtracting the src byte/word from
the dst byte/word.
 The src and the dst are not changed, but the flags are set to indicate the
results of the comparison.

 Syntax :
CMP dst, src

 * Notes :
⁻ The src and the dst cannot both be memory locations.
⁻ AF, OF, SF, ZF, and CF are updated.

Dr Abdullah Al Masrub ECE484 11


8086 Microprocessor
Arithmetic Instructions

CMP :

 Examples :

CMP AL, 01H ;Compare immediate number 01H with byte in AL


CMP BH, CL ;Compare byte in CL with byte in BH
CMP CX, [BX] ;Compare word in DS at offset [BX] with word at CX
CMP [BX], 49H ;Compare 49H with byte at offset [BX]

CMP CX, BX ;after comparison, values of CF, ZF, and SF will be as


follows:
CF ZF SF
CX = BX 0 1 0 Result of subtraction is 0
CX > BX 0 0 0 No borrow required, CF = 0
CX < BX 1 0 1 requires borrow, CF = 1

Dr Abdullah Al Masrub ECE484 12


8086 Microprocessor
Arithmetic Instructions

MUL :
 This instruction multiplies an unsigned byte in some src with an unsigned
byte in AL register or an unsigned word in some src with an unsigned
word in AX register.
 The src can be a register or a memory location.

 Syntax :
MUL src

 * Notes :
⁻ If the most significant byte of a 16-bit result or the most significant word
of a 32-bit result is 0, CF and OF will both be 0’s.
⁻ To multiply a byte with a word, it is necessary to move the byte into a
word location such as an extended register and fill the upper byte of the
word with all 0’s.

Dr Abdullah Al Masrub ECE484 13


8086 Microprocessor
Arithmetic Instructions

MUL :

 * Algorithm :

⁻ when operand is a byte (8-bit): AX = AL * operand.


AX = result, AL= multiplicand, operand = reg/mem (multiplier).
⁻ when operand is a word: (DX-AX) = AX * operand.
DX-AX= result, AX= multiplicand, operand=reg/mem (multiplier).
⁻ the product after a multiplication always double width product.

AL AX
x r/m8 x r/m16
__________________ __________________

AX DX AX

Dr Abdullah Al Masrub ECE484 14


8086 Microprocessor
Arithmetic Instructions

MUL :

 Examples :

MUL BH ;Multiply AL with BH; result in AX


MUL CX ;AX times CX; result high word in DX, low word in AX
MUL BYTE [BX] ;Multiply AL with byte in DS pointed to by [BX]

MOV AX, DATA_16 ;Load 16-bit multiplicand into AX


MOV CL, DATA_8 ;Load 8-bit multiplier into CL
MOV CH, 00H ;Set upper byte of CX to all 0’s
MUL CX ;AX times CX; 32-bit result in DX and AX

Dr Abdullah Al Masrub ECE484 15


8086 Microprocessor
Arithmetic Instructions

MUL :

 Examples :

MOV AL, C8H ;AL = 200d (decimal)


MOV BL, 4
MUL BL ;AX = 0320h (800d), CF = 1
(CF is 1 because the upper half of AX (AH) is not zero)

Mov AL, 5h
Mov BL, 10h
Mul BL ;C= 0050h, CF = 0
(no overflow – CF is 0 because the upper half of AX is zero)

Mov AX , 2000H
Mov BX, 0100H
Mul BX ;DX:AX = 00200000h, CF = 1 because DX is not zero

Dr Abdullah Al Masrub ECE484 16


8086 Microprocessor
Arithmetic Instructions

IMUL :
 This instruction multiplies a signed byte from some src with a signed
byte in AL or a signed word from some src with a signed word in AX.
 The src can be a register or a memory location.

 Syntax :
IMUL src

 * Notes :
⁻ If the magnitude of the product does not require all the bits of the destination,
the unused byte/word will be filled with copies of the sign bit.
⁻ If the upper byte of a 16-bit result or the upper word of a 32-bit result contains
only copies of the sign bit (all 0’s or all 1’s), then CF and the OF will both be 0; If it
contains a part of the product, CF and OF will both be 1.
⁻ To multiply a signed byte with a signed word, it is necessary to move the byte
into a word location and fill the upper byte of the word with copies of the sign
bit. The CBW instruction can be used for this purpose.

Dr Abdullah Al Masrub ECE484 17


8086 Microprocessor
Arithmetic Instructions

IMUL :

 Examples :

IMUL BH ;Signed byte in AL times signed byte in BH; signed


result in AX.
MOV CX, MULTIPLIER ;Load signed word in CX
MOV AL, MULTIPLICAND ;Load signed byte in AL
CBW ;Extend sign of AL into AH
IMUL CX ;Multiply AX with CX; Result in DX and AX

Dr Abdullah Al Masrub ECE484 18


8086 Microprocessor
Arithmetic Instructions

IMUL :

 Examples :

MOV AL, -2
MOV BL, -4
IMUL BL ;AX =0008, CF=OF=0 when result fits into operand of IMUL.

MOV AL, 48
MOV BL, 4
IMUL BL ;AX = 00C0h, OF = 0, CF=0, AH is a sign extension of AL, so the
OF is cleared.

MOV AX , 8760h
MOV BX , 100h
IMUL BX ;DX = FF87h, AX = 6000h, OF = 1, CF=1, CF=OF= 1 if the answer
size >operand size, Zero other wise.

Dr Abdullah Al Masrub ECE484 19


8086 Microprocessor
Arithmetic Instructions

DIV :
 used to divide an unsigned word by a byte or to divide an unsigned
double word (32 bits) by a word.
 Syntax :
DIV src

 * Notes :
⁻ When a word is divided by a byte, the word must be in AX register, and the
divisor can be in a register or a memory location. After the division, AL will
contain the 8-bit quotient, and AH will contain the 8-bit remainder.
⁻ When a double word is divided by a word, the high word of the double word
must be in DX and the low word in AX. The divisor can be in a register or a
memory location. After the division, AX will contain the 16-bit quotient and DX
will contain the 16-bit remainder.
⁻ If an attempt is made to divide by 0 or if the quotient is too large to fit in the
destination (greater than FFH / FFFFH), the 8086 will generate a type 0 interrupt.
⁻ To divide a byte by a byte, it is necessary to put the dividend byte in AL and fill
AH with all 0’s. Similarly, to divide a word by a word, it is necessary to put the
dividend word in AX and fill DX with all 0’s.
Dr Abdullah Al Masrub ECE484 20
8086 Microprocessor
Arithmetic Instructions

DIV :

 * Algorithm :

⁻ when operand is a byte: AL = AX / operand, AH = remainder.


⁻ If you want to divide a byte by a byte, you must first put the dividend
byte in AL and fill AH with all 0’s. The SUB AH, AH instruction is a quick
way to do.
⁻ when operand is a word: AX = (DX-AX) / operand, DX = remainder.
⁻ also when a double word is divided by a word, the most significant word of the
double word must be in DX and the least significant word of the double word
must be in AX.
⁻ After the division AX will contain the 16 –bit result (quotient) and DX will
contain a 16 bit remainder.

Dr Abdullah Al Masrub ECE484 21


8086 Microprocessor
Arithmetic Instructions

DIV :

 Examples :

DIV BL ;Divide word in AX by byte in BL; Quotient in AL, remainder in AH.


DIV CX ;Divide double word in DX and AX by word in CX; Quotient in AX,
remainder in DX.
DIV BYTE [BX] ;AX / (byte at effective address [BX])

MOV AX, 00CBH ;AX =203d


MOV BL, 4H
DIV BL ;AL = 32h (50d), AH = 3

MOV AL, 13H


MOV AH, 00H ;set AH value to zero,
MOV CL, 3H
DIV CL ;AL←6(quotient) ;AH←1(reminder)

Dr Abdullah Al Masrub ECE484 22


8086 Microprocessor
Arithmetic Instructions

CBW and CWD:


 The CBW instruction converts signed byte to signed word (copies the sign bit of
the byte in AL to all the bits in AH). AH is then said to be the sign extension of AL.
 The CWD instruction converts signed word to signed double word (copies the
sign bit of a word in AX to all the bits of the DX register). In other words, it
extends the sign of AX into all of DX

 Examples :

Let AX = 00000000 10011011 (–155 decimal)

CBW ;Convert signed byte in AL to signed word in AX


AX = 11111111 10011011 (–155 decimal)

Let DX = 00000000 00000000, and AX = 11110000 11000111 (–3897 decimal)

CWD ;Convert signed word in AX to signed double word in DX:AX


DX = 11111111 11111111 and AX = 11110000 11000111 (–3897 decimal)

Dr Abdullah Al Masrub ECE484 23


8086 Microprocessor
Arithmetic Instructions

IDIV :
 This instruction is used to divide a signed word by a signed byte or to divide a
signed double word by a signed word.

 Syntax :
IDIV src

 * Notes :
 When dividing a signed word by a signed byte, the word must be in the AX
register and the divisor can be in an 8-bit register or a memory location.
 After the division, AL will contain the signed quotient and AH will contain the
signed remainder.
 The sign of the remainder will be the same as the sign of the dividend.
 If an attempt is made to divide by 0, the quotient is greater than 127 (7FH) or
less than –127 (81H), the 8086 will automatically generate a type 0 interrupt.

Dr Abdullah Al Masrub ECE484 24


8086 Microprocessor
Arithmetic Instructions

IDIV :
 When dividing a signed double word by a signed word, the high word of
the dividend (numerator) must be in the DX register and the low word in
the AX register.
 The divisor can be in any other 16-bit register or memory location.
 After the division, AX will contain a signed 16-bit quotient and DX will
contain a signed 16-bit remainder. The sign of the remainder will be the
same as the sign of the dividend.
 Again, if an attempt is made to divide by 0, the quotient is greater than
+32,767 (7FFFH) or less than –32,767 (8001H), the 8086 will
automatically generate a type 0 interrupt.
 To divide a signed byte by a signed byte, it is necessary to put the
dividend byte in AL and sign-extend AL into AH. The CBW instruction can
be used for this purpose.
 Similarly, to divide a signed word by a signed word, it is necessary to put
the dividend word in AX and extend the sign of AX to all the bits of DX.
The CWD instruction can be used for this purpose.

Dr Abdullah Al Masrub ECE484 25


8086 Microprocessor
Arithmetic Instructions

IDIV :

 Examples :
IDIV BL ;Signed word in AX / signed byte in BL; Quotient in AL, remainder in AH
IDIV BP ;Signed double word in DX and AX / signed word in BP, Quotient in AX,
remainder in DX
IDIV BYTE [BX] ;AX / byte at offset [BX] in DS

8-bit division of –48 by 5 :


MOV AL ,-48d ; -48 = -30H = B8h (in 2’s complement)
CBW ; extend AL into AH (AX= FFB8)
MOV BL ,5
IDIV BL ;AL = -9, AH = -3
16-bit division of –48 by 5 :
MOV AX,-48d ;FFD0h
CWD ;extend AX into DX (DX-AX=FFFFFFD0)
MOV BX,5
IDIV BX ;AX = -9, DX = -3
Dr Abdullah Al Masrub ECE484 26
8086 Microprocessor
Arithmetic Instructions

CMPSB/CMPSW :
 used to compare a byte/word in one string with a byte/word in another string.
 SI is used to hold the offset of the byte or word in the source string, and DI is
used to hold the offset of the byte or word in the destination string.
 Syntax :
CMPSB
CMPSW
 * Notes :
 The AF, CF, OF, PF, SF, and ZF flags are affected by the comparison, but the two
operands are not affected.
 After the comparison
 If DF is reset, SI and DI will automatically be incremented by 1 for byte string
and by 2 for word string to point to the next element in the two strings.
 If DF is set, then SI and DI will automatically be decremented by 1 for a byte
string and by 2 for a word string to point to the next element in the two
strings.
 The string pointed to by SI must be in the data segment and the string pointed to
by DI must be in the extra segment.
 The CMPS instruction can be used with a REPE or REPNE prefix to compare all the
elements of a string.
Dr Abdullah Al Masrub ECE484 27
8086 Microprocessor
Arithmetic Instructions

CMPSB/CMPSW :
 Examples :

Assuming that (DS) =2000H, (SI) =1000H, (ES) =1200H, (DI) = 1A00H, (DF) =1,
content of 2000:1000=7AH, and content of 1200:1A00=8AH.

Execute the following instruction:

CMPSB ; compare the content of memory locations addressed by DS: SI


with the content of memory locations addressed by ES: DI.

∴ [DS:SI]-[ES:DI] = 7A-8A = F0H


CF=1, PF=1, AF=0, ZF=0, SF=1, OF=1
DF=1 and we compare a byte, Then (DI)=(DI)-1=19FF & (SI)=(SI)-1=0FFFH

Dr Abdullah Al Masrub ECE484 28


8086 Microprocessor
Arithmetic Instructions

SCASB/ SCASW :
 This instruction compares a byte in AL or a word in AX with a byte or a
word in ES pointed to by DI.

 Syntax :
SCASB
SCASW

 * Notes :
⁻ The string to be scanned must be in the extra segment, and DI must contain the
offset of the byte or the word to be compared.
⁻ If DF is cleared, then DI will be incremented by 1 for byte strings and by 2 for
word strings.
⁻ If DF is set, then DI will be decremented by 1 for byte strings and by 2 for word
strings.
⁻ SCAS affects AF, CF, OF, PF, SF, and ZF, but it does not change either the operand
in AL (AX) or the operand in the string.

Dr Abdullah Al Masrub ECE484 29


8086 Microprocessor
Arithmetic Instructions

SCASB/ SCASW :
 Examples :

MOV DI, OFFSET STRING


MOV AL, 0DH ;Byte to be scanned into AL
MOV CX, 80 ;CX used as element counter
CLD ;Clear DF, so that DI auto incremented
REPNE SCAS STRING ;Compare byte in string with byte in AL

Dr Abdullah Al Masrub ECE484 30


Logical Instructions
8086 Microprocessor
Logical Instructions

AND, OR, XOR, TEST :


 The AND instruction ANDs each bit in a src byte or word with the same
numbered bit in a dst byte or word. The result is put in the specified dst.
 The OR instruction ORs each bit in a src byte or word with the same numbered
bit in a dst byte or word. The result is put in the specified dst.
 The XOR instruction Exclusive-ORs each bit in a src byte or word with the same
numbered bit in a dst byte or word. The result is put in the specified dst.
 The TEST instruction ANDs the byte/word in the specified src with the byte/word
in the specified dst. Flags are updated, but neither operand is changed.
 The TEST instruction is often used to set flags before a conditional jump
instruction
 Syntax :
AND dst, src
OR dst, src
XOR dst, src
TEST dst, src

Dr Abdullah Al Masrub ECE484 32


8086 Microprocessor
Logical Instructions

AND, OR, XOR, TEST :

 * Notes :
⁻ The source and the destination cannot both be memory locations.
⁻ CF and OF are both 0 after AND/OR/XOR/TEST.
⁻ PF, SF, and ZF are updated by the AND/OR/XOR/TEST instructions.

 Examples :

AND BX, 00FFH ;Masks upper byte of BX, leaves lower byte unchanged.
AND BH, CL ;AND byte in CL with byte in BH; Result in BH.
AND CX, [SI] ;AND word in DS at offset [SI] with word in CX register.

OR BP, SI ;SI ORed with BP, result in BP, SI not changed.


OR BL, 80H ;BL ORed with immediate number 80H; sets MSB of BL to 1.
OR CX, [SI] ;CX ORed with word from effective address [SI].

Dr Abdullah Al Masrub ECE484 33


8086 Microprocessor
Logical Instructions

AND, OR, XOR, TEST :

 Examples :

XOR BP, DI ;Word in DI XORed with word in BP. Result in BP.


XOR WORD [BX], 00FFH ; XOR 00FFH with word at offset [BX] in DS.
Result in mem. location [BX]

MOV BX, 3D69h ; BX = 0011 1101 0110 1001b


MOV CX, 00FFh ; CX = 0000 0000 1111 1111 b
XOR BX, CX ; BX = 0011 1101 1001 0110b = 3D96H

TEST AL, BH ;AND BH with AL. No result stored; Update PF, SF, ZF.
TEST BP, [BX] ;AND word at offset [BX] in DS with word in BP.

MOV AL, 00000101b


TEST Al ,80H ;AND 80H with AL, ZF = 1

Dr Abdullah Al Masrub ECE484 34


8086 Microprocessor
Logical Instructions

AND, OR, XOR, TEST :

 Example :
What is the result of executing the following sequence of instructions?
MOV AL, 01010101B
AND AL, 00011111B
OR AL, 11000000B
XOR AL, 00001111B

 Solution :
The result can be summarized as follows:
MOV AL, 01010101B ;AL = 01010101
AND AL, 00011111B ;AL = 00010101
OR AL, 11000000B ;AL = 11010101
XOR AL, 00001111B ;AL = 11011010

Dr Abdullah Al Masrub ECE484 35


8086 Microprocessor
Logical Instructions

NOT :
⁻ The NOT instruction inverts each bit (forms the 1’s complement) of a
byte or word in the specified dst.
⁻ The dst can be a register or a memory location.

 Syntax :
NOT dst

 Examples :

NOT BX ;Complement content of BX register.


NOT BYTE [BX] ;Complement memory byte at offset [BX] in DS.

MOV AL, 1Bh ;AL = 00011011b


NOT AL ; AL = 11100100b
MOV DX, F038h ; DX =F038h
NOT DX ; DX = 0FC7h

Dr Abdullah Al Masrub ECE484 36


8086 Microprocessor
Logical Instructions

SHL, SAL, SHR, SAR :


 Shift instructions can perform two basic types of shift operations:
 the logical shift
 the arithmetic shift.
 Each of these operations can be performed to the left or to the right by number
of bit positions equal to Count.
 In the case of a multibit shift, the number of bit positions to be shifted is
specified by the value in CL.

SHL dst, count ; Shift the Destination left by Count and fill the vacated bits
positions on the right with zeros. The MSB will be shifted into
CF. OF = 1 if CF and the current MSB are not the same.
CF MSB LSB 0

MOV AL, 11100000b


SHL AL, 1 ; CF=1, AL = 11000000b, OF=0

Dr Abdullah Al Masrub ECE484 37


8086 Microprocessor
Logical Instructions

SHL, SAL, SHR, SAR :

SAL dst, count ; (Shift Arithmetic Left) the Destination left by Count and fill
the vacated bits positions on the right with zeros. The MSB will be
shifted into CF. OF = 1 if CF and the current MSB are not the same.
CF MSB LSB 0

SHR dst, count ; Shift the Destination right by Count and fill the vacated bits
positions on the left with zeros. The LSB will be shifted into CF.
OF will be 1 if two MSBs are not both 0’s.
0 MSB LSB CF

SAR dst, count ; Shift the Destination right by Count and fill the vacated bits
positions on the left with the old MSB. The LSB will be shifted
into CF. OF will be 1 if two MSBs are not the same.
MSB MSB LSB CF

Dr Abdullah Al Masrub ECE484 38


8086 Microprocessor
Logical Instructions

SHL, SAL, SHR, SAR :


 Examples :

SHL AX, 1 ;Assume (AX) = 1234H

SAR AX, CL ;Assume AX = 091AH and (CL) = 02H

Dr Abdullah Al Masrub ECE484 39


8086 Microprocessor
Logical Instructions

ROL, ROR, RCL, RCR :


 These instructions have the ability to rotate the contents of either an internal
register or a storage location in memory.
 The rotation that takes place can be from 1 to 255 bit positions to the left or to
the right.
 Moreover, in the case of a multibit rotate, the number of bit positions to be
rotated is specified by the value in CL.

ROL dst, count ; Rotate the Destination left by Count. Each bit shifted out
from the leftmost bit goes back into the rightmost bit position.
MSB is placed as a new LSB and a new CF.

CF

Dr Abdullah Al Masrub ECE484 40


8086 Microprocessor
Logical Instructions

ROL, ROR, RCL, RCR :

ROR dst, count ; Rotate the Destination right by Count. Each bit shifted out
from the rightmost bit goes back into the leftmost bit position.
LSB is placed as a new MSB and a new CF.

CF

 Examples :
MOV AL, 1Ch ;AL = 00011100b
ROR AL, 1 ;AL = 00001110b, CF=0.

USING 8-BIT SIGNED NUMBER:


MOV BH,3Fh ;BH= 0011 1111
ROR BH,4h ;BH= 1111 0011=F3h (-13d), CF=1 , OF=1

* OF=0 if first operand keeps original sign.


Dr Abdullah Al Masrub ECE484 41
8086 Microprocessor
Logical Instructions

ROL, ROR, RCL, RCR :

RCL dst, count ; Rotate the Destination left by Count. The MSB of the
operand is rotated into the carry flag and the bit in the carry
flag is rotated around into LSB of the operand.
CF

 Examples :
MOV BH, B3h ;CF=0, BH = 10110011
RCL BH, 1 ;CF=1, BH = 01100110, OF = 1 because MSB changed.

MOV AX, 1FA9 ;CF =1, AX = 00011111 10101001


MOV CL, 2
RCL AX, CL ;CF =0, AX = 01111110 10100110, OF=0

Dr Abdullah Al Masrub ECE484 42


8086 Microprocessor
Logical Instructions

ROL, ROR, RCL, RCR :

RCR dst, count ; Rotate the Destination right by Count. The LSB of the
operand is rotated into the carry flag and the bit in the carry
flag is rotated around into MSB of the operand.
CF

 Examples :
STC ;CF = 1
MOV BL, 38h ;BL = 00111000
RCR BL, 1 ;BL = 10011100, CF =0, OF = 1 because MSB is changed to 1.

STC ;CF=1
MOV AL, 1Ch ;AL = 00011100b
RCR AL, 1 ;AL = 10001110b, CF=0.

Dr Abdullah Al Masrub ECE484 43


8086 Microprocessor
Logical Instructions

ROL, ROR, RCL, RCR :


 Examples :
ROL AX, 1 ;Assume (AX) = 1234H

ROR AX, CL ;Assume AX = 1234H and (CL) = 04H

Dr Abdullah Al Masrub ECE484 44

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