Lesson Plan
Lesson Plan
PART- A UNIT 1 Sl no 1 2 3 4 5 6 7 8 Date Introduction to Embedded systems 1 Topics to be covered Introduction to Embedded systems 1 : embedded systems Processors embedded into a system Embedded hardware units and devices in a system Embedded software in a system Examples of embedded systems Embedded system-on-chip (soc) and use of VLSI circuit design technology Complex systems design and processors Design process in embedded system no of hours: 8 hrs
UNIT 2 Sl no 1 2 3 4 5 6 7 Date
no of hours: 7 hrs
Introduction to Embedded systems 2, devices -1: formalization of system design Design process and design examples classification of embedded systems Skills required for embedded systems designer, I/O types and examples Serial communication devices parallel device ports Sophisticated interfacing features in device ports
UNIT 3 Sl no 1 2 3 4 5 6 7 Date
Devices -2 communication buses for device networks Topics to be covered Wireless devices, timer and counting devices Watchdog timer , real time clock Network embedded systems Serial communication protocol Parallel bus device protocol Internet enabled systems Wireless and mobile systems protocols
no of hours: 7 hrs
I internals topics : UNIT- 1, UNIT-2 and first 4 topics from UNIT-3 PART B UNIT 5 Program modelling concepts, processes, threads and tasks Sl no 1 2 3 4 5 6 7 8 9 10 Date Topics to be covered Program models : DFG models State machine programming models for event controlled program flow State machine programming models for event controlled program flow contd..., Modelling of multiprocessor systems Multiple processes in an application Multiple threads in an application Tasks and tasks states Task and data Distinction between functions ISRs and tasks no of hours: 8 hrs no of hours: 10 hrs
UNIT 6 Real time Operating system-1 Sl no 1 2 3 4 5 6 7 8 Date Topics to be covered Operating system services Process management Timer functions and event functions Memory management Device, file management sytem I/O sub-systems management Interrupt routines in RTOS Handling of interrupt source calls
UNIT 7 Sl no 1 2 3 4 5 6 Date
no of hours: 6 hrs
Real time operating systems Basic design using an RTOS RTOS task Scheduling models RTOS task Scheduling models contd.., Interrupt latency and response times of the tasks as performance metrics OS security issues no of hours: 5 hrs
Introduction: host & target machines - (brief) Linking & locating software : (brief) Getting embedded software in to the target system : (brief) Issues in hardware-software desing and co-design : (brief) Testing on host machine, simulators : (brief)
UNIT 4 device drivers and interrupts service mechanism Sl no 1 2 3 4 5 Date Topics to be covered
no of hours: 5 hrs
ISR concepts, interrupt sources, interrupt serving mechanism Context and the periods for context- switching Classification of processors interrupt service mechanism from contextsaving angle Direct memory access Device drivers programming
Vidya vikas Institute of Engineering and Technology Department of Computer Science & Engineering Lesson plan -2011
Computer Networks-I
Subject code: 06CS55 No of hours/week: 04 Total no of Lecturer hours: 56 IA marks: 25 Exam marks: 100 Exam Hours: 03
PART- A UNIT 1 : Introduction Sl no 1 2 3 4 5 6 Date Topics to be covered Introduction to data communication, advantages & disadvantages and applications Networks: hardware & software concepts : the internet as a definition Protocols and standards: layered tasks, basics of OSI model The OSI model : layered approach, TCP/IP protocol suite no of hours: 11 hrs no of hours: 6 hrs
UNIT 2 data , signal and digital transmission Sl no 1 2 3 4 5 6 7 8 9 10 11 Date Topics to be covered Analog and digital signals : basics importance Transmission impairment Data rate limits Performance Digital-to-digital conversion Analog to-digital conversion Transmission modes
UNIT 3 Analog transmissions and multiplexing Sl no 1 2 3 4 5 6 Date Topics to be covered Digital-to-digital conversion Analog to-digital conversion Analog to-digital conversion Multiplexing Spread spectrum PART B UNIT 5 Data Link control Sl no 1 2 3 4 5 6 7 8 9 Date Topics to be covered
no of hours: 6 hrs
no of hours: 10 hrs
Functions of framing :for both noiseless and noisy channels Flow control : ARQ Flow control : Selective repeat Flow control: Error control: Error control: HDLC protocol Point-to point protocol Transition phases no of hours: 8 hrs
UNIT 6 Multiple Access, Ethernet Sl no 1 2 3 4 5 6 7 8 Date Topics to be covered Random Access Controlled access Controlled access Channelization Ethernet & IEEE standards Standard Ethernet and changes in the standard Fast Ethernet Gigabit Ethernet
UNIT 7 wireless LANS and connection of LANS Sl no 1 2 3 4 5 6 7 Date Topics to be covered IEEE 802.11 Bluetooth Connecting devices Backbone networks Virtual networks
no of hours: 7 hrs
UNIT 8 Other Technologies Sl no 1 2 3 4 Date Topics to be covered Cellular telephony, SONET/SDH architecture Frames, STS multiplexing ATM design goals & problems Architecture, switching layers
no of hours: 4 hrs
PART A UNIT 4 Transmission media Error detection and correction Sl no 1 2 3 4 Date Topics to be covered Twisted pair, coaxial cable , fiber optic cable radio waves microwaves, infrared -- brief Introduction to eroor detection/ correction Block coding, linear block coding Cyclic codes, checksum no of hours: 4hrs