INPUT/OUTPUT ORGANIZATION

INPUT/OUTPUT SUBSYSTEM

The I/O subsystem of a computer provides an efficient mode of communication between the
central system and the outside environment. It handles all the input-output operations of the
computer system.

PERIPHERAL DEVICES
Input or output devices that are connected to computer are called peripheral devices. These
devices are designed to read information into or out of the memory unit upon command from the
CPU and are considered to be the part of computer system. These devices are also called
peripherals.

For example: Keyboards, display units and printers are common peripheral devices.

There are three types of peripherals:

1. Input peripherals: Allows user input, from the outside world to the computer.

Example: Keyboard, Mouse etc.

2. Output peripherals: Allows information output, from the computer to the outside world.

Example: Printer, Monitor etc

3. Input-Output peripherals: Allows both input(from outside world to computer) as well

as, output(from computer to the outside world).

Example: Touch screen etc.

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INTERFACES
Interface is a shared boundary between two separate components of the computer system which
can be used to attach two or more components to the system for communication purposes.

There are two types of interface:

1. CPU Interface
2. I/O Interface

INPUT-OUTPUT INTERFACE
Peripherals connected to a computer need special communication links for interfacing with CPU.
In computer system, there are special hardware components between the CPU and peripherals to
control or manage the input-output transfers. These components are called input-output
interface units because they provide communication links between processor bus and
peripherals. They provide a method for transferring information between internal system and
input-output devices.

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MEMORY MAPPED I/O AND ISOLATED I/O
As a CPU needs to communicate with the various memory and input-output devices (I/O) as we
know data between the processor and these devices flow with the help of the system bus. There
are three ways in which system bus can be allotted to them :

1. Separate set of address, control and data bus to I/O and memory.
2. Have common bus (data and address) for I/O and memory but separate control lines.

3. Have common bus (data, address, and control) for I/O and memory.

In first case it is simple because both have different set of address space and instruction but
require more buses.

ISOLATED I/O

Then we have Isolated I/O in which we Have common bus(data and address) for I/O and
memory but separate read and write control lines for I/O. So when CPU decode instruction then
if data is for I/O then it places the address on the address line and set I/O read or write control
line on due to which data transfer occurs between CPU and I/O. As the address space of memory
and I/O is isolated and the name is so. The address for I/O here is called ports. Here we have
different read-write instruction for both I/O and memory.

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MEMORY MAPPED I/O
In this case every bus in common due to which the same set of instructions work for memory and
I/O. Hence we manipulate I/O same as memory and both have same address space, due to which
addressing capability of memory become less because some part is occupied by the I/O.

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Differences between memory mapped I/O and isolated I/O

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MODES OF I/O DATA TRANSFER
Data transfer between the central unit and I/O devices can be handled in generally three types of
modes which are given below:
1) Programmed I/O
2) Interrupt Initiated I/O
3) Direct Memory Access

1) Programmed I/O

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  Programmed I/O instructions are the result of I/O instructions written in computer
program. Each data item transfer is initiated by the instruction in the program.
 Usually the program controls data transfer to and from CPU and peripheral. Transferring
data under programmed I/O requires constant monitoring of the peripherals by the CPU.

 I/O device does not have direct access to memory.

 Requires execution of several instructions by the CPU.

2) Interrupt Initiated I/O

In the programmed I/O method the CPU stays in the program loop until the I/O unit indicates
that it is ready for data transfer. This is time consuming process because it keeps the processor
busy needlessly. This problem can be overcome by using interrupt initiated I/O. In this when the
interface determines that the peripheral is ready for data transfer, it generates an interrupt. After
receiving the interrupt signal, the CPU stops the task which it is processing and service the I/O
transfer and then returns back to its previous processing task.
Two types namely vectored interrupt and non vectored interrupt are available.

Priority Interrupt

System that establishes a priority over the various sources to determine which condition is to be
serviced first when two or more requests arrive simultaneously.
Polling

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Used to identify the highest priority source by software means.
Daisy chaining priority
Establishing priority consists of serial connection of all devices that request an interrupt.
Devices are placed in the order of highest priority first.

VAD

Vector address in the data bus used by the CPU during the device interrupt cycle.

DAISY CHAIN INTERRUPT

3) Direct Memory Access interface

Removing the CPU from the path and letting the peripheral device manage the memory buses
directly would improve the speed of transfer. This technique is known as DMA.
In this, the interface transfer data to and from the memory through memory bus. A DMA
controller manages to transfer data between peripherals and memory unit. Many hardware

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systems use DMA such as disk drive controllers, graphic cards, network cards and sound cards
etc. It is also used for intra chip data transfer in multi-core processors.
In DMA, CPU would initiate the transfer, do other operations while the transfer is in progress
and receive an interrupt from the DMA controller when the transfer has been completed.

DIRECT MEMORY ACCESS (DMA)

DMA stands for "Direct Memory Access" and is a method of transferring data from the
computer's RAM to another part of the computer without processing it using the CPU. While
most data that is input or output from your computer is processed by the CPU, some data does
not require processing, or can be processed by another device.
In these situations, DMA can save processing time and is a more efficient way to move data from
the computer's memory to other devices. In order for devices to use direct memory access, they
must be assigned to a DMA channel. Each type of port on a computer has a set of DMA channels
that can be assigned to each connected device. For example, a PCI controller and a hard drive
controller each have their own set of DMA channels.

DMA Transfer Types

Memory To Memory Transfer
In this mode block of data from one memory address is moved to another memory address. In
this mode current address register of channel 0 is used to point the source address and the current

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address register of channel is used to point the destination address in the first transfer cycle, data
byte from the source address is loaded in the temporary register of the DMA controller and in the
next transfer cycle the data from the temporary register is stored in the memory pointed by
destination address. After each data transfer current address registers are decremented or
incremented according to current settings. The channel 1 current word count register is also
decremented by 1 after each data transfer. When the word count of channel 1 goes to FFFFH, a
TC is generated which activates EOP output terminating the DMA service.
Auto initialize
In this mode, during the initialization the base address and word count registers are loaded
simultaneously with the current address and word count registers by the microprocessor. The
address and the count in the base registers remain unchanged throughout the DMA service.
After the first block transfer i.e. after the activation of the EOP signal, the original values of the
current address and current word count registers are automatically restored from the base address
and base word count register of that channel. After auto initialization the channel is ready to
perform another DMA service, without CPU intervention.
DMA Controller
The controller is integrated into the processor board and manages all DMA data transfers.
Transferring data between system memory and an 110 device requires two steps. Data goes from
the sending device to the DMA controller and then to the receiving device. The microprocessor
gives the DMA controller the location, destination, and amount of data that is to be transferred.
Then the DMA controller transfers the data, allowing the microprocessor to continue with other
processing tasks. When a device needs to use the Micro Channel bus to send or receive data, it
competes with all the other devices that are trying to gain control of the bus. This process is
known as arbitration. The DMA controller does not arbitrate for control of the BUS instead; the
I/O device that is sending or receiving data (the DMA slave) participates in arbitration. It is the
DMA controller, however, that takes control of the bus when the central arbitration control point
grants the DMA slave's request.

INPUT- OUTPUT PROCESSOR (IOP)

An input-output processor (IOP) is a processor with direct memory access capability. In this, the
computer system is divided into a memory unit and number of processors. Each IOP controls and

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manage the input-output tasks. The IOP is similar to CPU except that it handles only the details
of I/O processing. The IOP can fetch and execute its own instructions. These IOP instructions are
designed to manage I/O transfers only. Block Diagram Of I/O Processor: Below is a block
diagram of a computer along with various I/O Processors. The memory unit occupies the central
position and can communicate with each processor. The CPU processes the data required for
solving the computational tasks. The IOP provides a path for transfer of data between peripherals
and memory. The CPU assigns the task of initiating the I/O program. The IOP operates
independent from CPU and transfer data between peripherals and memory.

The communication between the IOP and the devices is similar to the program control method of
transfer. And the communication with the memory is similar to the direct memory access
method. In large scale computers, each processor is independent of other processors and any
processor can initiate the operation. The CPU can act as master and the IOP act as slave
processor. The CPU assigns the task of initiating operations but it is the IOP, who executes the
instructions, and not the CPU. CPU instructions provide operations to start an I/O transfer. The
IOP asks for CPU through interrupt. Instructions that are read from memory by an IOP are also
called commands to distinguish them from instructions that are read by CPU. Commands are
prepared by programmers and are stored in memory. Command words make the program for
IOP. CPU informs the IOP where to find the commands in memory.

CPU TO I/O COMMUNICATION

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The communication between CPU and IOP may take different forms depending on the particular
computer considered. The sequence of operations during CPU and IOP communication is shown
in figure.

 The CPU sends a test I/O instruction to IOP to test the IOP path.
 The responds by inserting a status word in memory location.

The CPU refers to the status word in memory. If everything is in order, the CPU sends the start
I/O instruction to start the I/O transfer.

 The IOP accesses memory for IOP program.

· The CPU can now continue with another program while the IOP is busy with the program. Both
programs refer to memory by means of DMA transfer.

 When the IOP terminates the execution of its program, it sends an interrupt request to the
CPU.

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  he CPU then issues a read I/O instruction to read the status from the IOP.

 The IOP transfers the status word to memory location.

· The status word indicates whether the transfer has been completed satisfactorily or if any error
has occurred during the transfer.

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