How to Isolate Signal and Power for I2C Interfaces

Anthony Viviano, Product Marketing Engineer, Isolation, Interface Group

Introduction:
Figure 1 shows the implementation of this method in
Inter-integrated circuit (I2C) bus communication is a an application with bidirectional data and unidirectional
two wire half duplex method for communication over clock using a three channel digital isolator such as the
short distances and has been widely adopted for a ISO7731. For multi-master systems requiring
variety of applications because of its simplicity. In bidirectional data and clock signals, the same methods
systems where the I2C bus is used to communicate explained in the application note can be used with a
between two domains of different potentials or where four channel digital isolator such as the ISO7742.
high voltages are present, galvanic isolation can be
used to protect circuitry and human operators as well The second method for isolating the I2C bus is to use
as break ground loops that can create noise that will an integrated solution such as the ISO154x family of
interfere with signal communication. devices. These integrated solutions use internal
circuitry combined with the digital isolator to achieve
Since digital isolators are inherently unidirectional, the same isolated I2C buffer functionality. The
implementing the bidirectional communication of the ISO1540 is designed for multi-master systems with
I2C bus presents numerous challenges for system bidirectional data and clock signals and the ISO1541 is
designers. This document will address the different designed for systems with bidirectional data and
methods available to isolate the I2C bus and how to unidirectional clock. If an application with bidirectional
provide isolated power for these solutions. data and unidirectional clock requires clock stretching
Signal isolation: function, it is recommended to use ISO1540 to achieve
clock stretching.
Signal isolation for the I2C bus can be achieved with
two methods. The first method is to use a digital
isolator with external circuitry to separate the VCC1 VCC2

bidirectional data path into two unidirectional channels. A

RPU1 B RPU2
After the bidirectional data is separated into
unidirectional signals, the digital isolator will modulate SDA1 SDA2
the input signal for each channel and pass the signal ISO1541
across the isolation barrier before demodulating the Cnode
Cbus
signal at the output. The application note Designing an C
D
Isolated I2C Bus interface by Using Digital Isolators GND1
explains in more detail the design considerations and VREF
GND2
methodology for separating the bidirectional I2C
signals into unidirectional signals to interface with the
digital isolator.
3.3 V 5V
Figure 2. ISO154x Method for Separating The
0.1 …F 1 16 0.1 …F
Bidirectional SDA Signal Into Unidirectional
2k
VCC1

ISO7731
VCC2
Isolation Channels
4.7 k 4.7 k
3 14
SCL1 SCL2

1 nF 2.49 k 3.12 k
7
EN1 EN2
10 Figure 2 shows a functional diagram of how the
(optional)
4 13
1.1 k
bidirectional serial data line (SDA) signal from the I2C
1.45 k 10 pF
(optional)
bus is internally separated into two unidirectional
MMBT3904 D2
signals that are isolated using the channels of the
digital isolator. The isolated I2C devices are designed
84.5 5 12
SDA1 SDA2

612 BAS40
GND1 GND2 to interface with a low capacitance I2C node on side 1
and a fully loaded I2C bus with up to 400 pF on side 2.
2, 8 9, 15
BAS40

GND1 GND2
The arrangement and connection of internal
unidirectional channels creates a closed signal loop
Figure 1. Discrete Implementation for Isolated I2C that is prone to latch-up. This latch-up condition is
with a Digital Isolator prevented by implementing an output buffer (B) whose
output low-level is raised by a diode drop to

SLLA417A – August 2018 – Revised October 2018 How to Isolate Signal and Power for I2C Interfaces Anthony Viviano, Product Marketing 1
Submit Documentation Feedback Engineer, Isolation, Interface Group
Copyright © 2018, Texas Instruments Incorporated
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approximately 0.75 V, and the input buffer (C) that transformer integrated into the chip provides a typical
consists of a comparator with defined hysteresis. The efficiency of around 50% and can provide up to 650
comparator's upper and lower input thresholds then mW of isolated power. With the integrated power
distinguish between the low potential from SDA1 and solution, since the transformers are smaller in size,
the potential from output buffer B. switching frequencies are higher, leading to higher
emissions as compared to the discrete solution. These
Each solution for isolating the signal in an I2C system
emissions can be reduced by stitching capacitors as
will have trade-offs. The discrete solution using a
shown in the application note, Low-Emission Designs
digital isolator provides more freedom in part selection
With ISOW7841 Integrated Signal and Power Isolator.
with the ISO7731 or ISO7742 both available in multiple
Figure 4 shows the implementation of ISOW7842 in a
package options with different isolation ratings to fit the
system with bidirectional data and a unidirectional
specific use case; however, this solution also has the
clock. The same methodology used to separate the
drawback of needing external circuitry that occupies
SDA signal can be applied to the clock signal if
more board space . The integrated solution with
bidirectional clock is needed.
ISO1540 or ISO1541 will occupy less board space and
require less design efforts than the discrete solution, 3.3 V
0.1 …F 1 16 0.1 …F
5V

but is only available in limited package and isolation 2k

VCC VISO

rating options. 3
ISOW7842
14
SCL1 SCL2

Power Isolation: 1 nF 2.49 k 3.12 k SEL

10

(optional) 1.1 k

Regardless of the method chosen to isolate the I2C 1.45 k 10 pF

4 13

signal, an isolated power supply will be required to MMBT3904

(optional)
D2

power the secondary side of the digital isolator or 84.5 5 12

SDA1
isolated I2C buffer. The first solution for providing
SDA2

612 BAS40
GND1 GND2

isolated power is to use a circuit similar to Figure 3, BAS40

2, 8 9, 15

which uses the SN6501 transformer driver to drive a GND1 GND2

transformer in a push pull configuration. The benefit of

this solution is that it provides greater than 80% Figure 4. Isolated I2C Solution for Signal and
efficiency and the transformer and LDO can be Power Using ISOW7842
selected to optimize for specific design considerations.
The SN6501 provides up to 1.5 W of power and can
Conclusion:
be replaced with the SN6505 for up to 5 W if isolated
power is needed for additional devices. There are many methods to isolate signal and power
for an I2C system and the correct choice will depend
4
GND D2
3 4 8 1
IN OUT
TPS76350
5
on the specific application requirements. Isolated I2C
SN6501
VCC
2 3
2
7
6
3
EN buffers such as the ISO154x family make design easy
5 D1
1 1 5
2
GND NC
4
by integrating all of the external circuitry needed to
GND
isolate the SDA and SCL signals while preventing
3.3 V 1
VCC1 VCC2
8 3.3 V latch up and complying with the I2C standard. In some
VDD
RPU1 RPU2 cases, it may be beneficial to have the flexibility of
7
MCU_SDA
Cnode
2
SDA1 SDA2
Cbus
numerous packages and isolation ratings available. A
MCU
3
ISO1541
6
discrete solution using the ISO77xx series of digital
MCU_SCL SCL1 SCL2
isolators offers this flexibility and can still achieve the
same isolated I2C functionality as the integrated
DGND
4 5
GND1 GND2

Digital Galvanic ISO

solution, when designed correctly.
Ground Isolation Barrier Ground

For isolated power the key trade-off is efficiency

Figure 3. Isolated I2C Solution for Signal and versus board space. The SN6501 solution provides a
Power with ISO1541 compact, low noise, and high efficiency solution for
generating isolated power. For applications where
The second solution for providing isolated power in the further board space reduction is desired, the
I2C system is to replace the digital isolator in the ISOW7842 solution simplifies design and reduces
discrete approach to signal isolation solution with board space compared to the first solution. A system
ISOW7842. The ISOW7842 device is a digital isolator designer must weigh the trade-offs of each solution for
with integrated signal and power isolation in a 16 pin isolating signal and power in an isolated I2C system to
SOIC package. The advantage of this device is that it determine the best fit for their particular application.
greatly reduces board space by integrating the
transformer, transformer driver, and LDO. The small
solution size comes with a trade off in efficiency as the

2 How to Isolate Signal and Power for I2C Interfaces Anthony Viviano, Product Marketing SLLA417A – August 2018 – Revised October 2018
Engineer, Isolation, Interface Group Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
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