Eee424 1 DC-DC
Eee424 1 DC-DC
t t t t
t t t t
DC-DC Converters are used to convert the unregulated DC input
into a controlled DC output at a desired voltage level.
Battery
,,
LOAD
AC Uncontrolled DC DC DC
Filter DC-DC
Diode Capacitor Converter
Line voltage Rectifier (Unregulated) (Unregulated) (Regulated)
VControl
They are needed because unlike AC, DC can’t simply be stepped
up or down using a transformer.
Pout
Efficiency (%) = Pin = Pout + Plosses
Pin
DC-DC converters are commonly used in applications requiring
regulated DC power such as :
Computers,
Medical instrumentation,
Communication devices,
Television receivers,
Battery chargers,
Electric Vehicles,
Mp3 Player,
Car Navigation Systems,
Digital Cameras
1) The desired output voltage is less than the input voltage
5 V Buck CPU
3 V
Mainboard Required
Converter
1.5 V Boost 5 V
Battery Converter Required
12 V Cuk -12 V
Battery Converter Required
V
Vc
Vr
0
Vc
Vg Comparator
Vg
ON ON Vr
0 t
kT T OFF OFF
V V
Vin = 12 V Step-Down Vout = 5 V
Buck
t t
iL ic
Vg +
- D C R
Duty
L
1
2 iL ic
+
Vg _
D C R
L L
iL ic iL ic
+
Vg _
C R D C R
Off State
Knowing the inductor voltage, we can now find the inductor current
diL(t)
VL(t) = L
dt
diL(t) VL(t) Vg – V
Solve for the slope =
dt L L
D C R V(t)
Small Ripple Approximation
-
VL(t) –V
Knowing the inductor voltage, we can now find the inductor current
diL(t)
VL(t) = L
dt
diL(t) -V The inductor
Solve for the slope current changes
dt L with an essentially
constant slope
VL(t)
Vg – V
DTs (1-D)Ts
t
–V 1
Ts =
fs
iL(t)
iL(DTs)
V
D=
I Vg
iL(0) Vg – V -V
L L
t
DTs Ts
iL(t)
iL(DTs)
I
Vg – V -V
L L
t
DTs Ts
Vg – V
= DTs
L
Vc
V
DTs Ts t
Vc = V (Vg-V) Vg D (1-D)
Vc = Vc =
8fsC 8LCf2V 8LCf2
g
Vg
TON TOFF
0
DTs Ts t
is
i2
i1
0
DTs Ts t
In this simulation it will be observed output voltage
waveform, inductor current and inductor voltage waveforms
according to the given values :
Input voltage : Vg = 20 V,
Output voltage : V = 12 V,
Switching frequency : fs = 10 kHz,
Inductance : L = 800 uH,
Capacitance : C = 50 uF,
Load resistance : R = 10 Ω.
Duty Cycle : %60
0.8 [mH]
IL
S
Vs V
Is
VL
10 [ohm]
50 [uF]
R=0
VD D
Vg = 20 V
Ref A
IL VD
B Compar- VL Vs
ator
V Is
Main : Graphs
IL V VL VD Vs Is
2.00
1.80
1.60
1.40
1.20
y
1.00
0.80
0.60
0.40
0.20
0.04425 0.04430 0.04435 0.04440 0.04445 0.04450 0.04455 0.04460 0.04465 0.04470 ...
...
...
Main : Graphs
IL V VL VD Vs Is
15.0
10.0
5.0
0.0
y
-5.0
-10.0
-15.0
-20.0
0.06896 0.06898 0.06900 0.06902 0.06904 0.06906 0.06908 0.06910 0.06912 0.06914 ...
...
...
Main : Graphs
IL V VL VD Vs Is
12.80
12.60
12.40
12.20
12.00
y
11.80
11.60
11.40
11.20
0.0115 0.0116 0.0117 0.0118 0.0119 0.0120 0.0121 ...
...
...
Main : Graphs
IL V VL VD Vs Is
30.0
25.0
20.0
15.0
10.0
y
5.0
0.0
-5.0
-10.0
-15.0
0.06128 0.06130 0.06132 0.06134 0.06136 0.06138 0.06140 0.06142 0.06144 0.06146 ...
...
...
Main : Graphs
IL V VL VD Vs Is
2.50
2.00
1.50
1.00
y
0.50
0.00
-0.50
-1.00
0.03555 0.03560 0.03565 0.03570 0.03575 0.03580 0.03585 0.03590 0.03595 0.03600 0.03605 ...
...
...
Main : Graphs
IL V VL VD Vs Is
21.50
21.00
20.50
20.00
y
19.50
19.00
18.50
0.000 0.050 0.100 0.150 0.200 0.250 0.300 ...
...
...
Main : Graphs
ref tri PWM
1.40
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
-0.40
0.0836 0.0838 0.0840 0.0842 0.0844 0.0846 0.0848 0.0850 ...
...
...
Main : Graphs
ref tri PWM
1.40
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
0.08360 0.08365 0.08370 0.08375 0.08380 0.08385 0.08390 0.08395 0.08400 0.08405 0.08410 ...
...
...
The buck dc-dc converter has an output voltage of Vg=12 V. The
required average output voltage is VL=5 V at R=500 Ω and the peak to
peak output ripple voltage is 20 mV. The switching frequency is 25 kHz.
If the peak-to-peak ripple current of inductor is limited to 0.8 A.
Determine:
V V
Step-Up Vout = 12 V
Vin = 5 V
Boost
t t
L D
iL ic
+
Vg - C R
Duty
L D
iL 1 ic
+
Vg _
2 C R
L L D
iL iL ic
Vg +
- Vg _+
C R
Off State
iL(t) L
+
+ VL(t) - ic(t) ia(t)
+
Vg _
C R V(t)
VL = Vg
ic = -V/R ic = - ia
a) Switch in Position 2
Inductor Voltage and capacitor current with small ripple
approximation :
iL(t) L D
+ VL(t) - +
ic(t) ia(t)
+
Vg _ C V(t)
R
VL = Vg - V
ic = iL - V/R ic = iL - ia
VL(t)
Vg
Vg
DTs (1-D)Ts
t
Vg – V
Vg – V
1
Ts =
fs
Vg(t)
Vg V - Vg
D=
V
t
DTs Ts
iL(t)
iL(DTs)
I
Vg Vg - V
L L
t
DTs Ts
diL(t) VL(t) Vg
= =
dt L L
diL(t) VL(t) Vg - V
= =
dt L L
iL(t)
iL(DTs)
Vg Vg - V
L L
t
DTs Ts
t
DTs Ts
Vg
V= where (DTs = TON )
1- D
V - Vg
D=
V
V(t)
V
-V I V
-
RC C RC
t
DTs Ts
Capacitor voltage slope during subinterval 1 :
ic (t) -V
dVc (t) = =
C RC
ic (t) I V
dVc (t) = = -
C C RC
V(t)
V Vc
-V 1 V
-
C RC
RC
t
DTs Ts
Change in capacitor voltage during subinterval 1 is :
V
Vc = DTS
RC
iL - i a
0
t
- ia
ia (t)
ia
DTs Ts t
In this simulation, it will be observed output voltage waveform,
inductor current, inductor voltage and capacitor current waveforms
according to the given values :
Input voltage : Vg = 5 V,
Output voltage : V = 12.5 V,
Switching frequency : fs = 10 kHz,
Inductance : L = 150 uH,
Capacitance : C = 200 uF,
Load resistance : R = 10 Ω.
Duty Cycle : %60
150 [uH]
IL Id
D
Vs V
Ic
VL
10 [ohm]
R=0
200 [uF]
Vg = 5 V
Ref A
IL Vs
B Compar- VL Id
ator
V Ic
Main : Graphs
IL V VL Vs Ic Id
6.0
5.0
4.0
3.0
y
2.0
1.0
0.0
0.04200 0.04205 0.04210 0.04215 0.04220 0.04225 0.04230 0.04235 0.04240 ...
...
...
Main : Graphs
IL V VL Vs Ic Id
10.0
5.0
0.0
y
-5.0
-10.0
-15.0
0.09125 0.09130 0.09135 0.09140 0.09145 0.09150 0.09155 ...
...
...
Main : Graphs
IL V VL Vs Ic Id
14.50
14.00
13.50
13.00
12.50
y
12.00
11.50
11.00
10.50
0.0654 0.0655 0.0656 0.0657 0.0658 0.0659 0.0660 ...
...
...
Main : Graphs
IL V VL Vs Ic Id
5.0
4.0
3.0
2.0
1.0
y
0.0
-1.0
-2.0
-3.0
-4.0
0.06000 0.06005 0.06010 0.06015 0.06020 0.06025 0.06030 0.06035 0.06040 ...
...
...
Main : Graphs
IL V VL Vs Ic Id
5.075
5.050
5.025
5.000
y
4.975
4.950
4.925
4.900
0.000 0.050 0.100 0.150 0.200 0.250 0.300 0.350 ...
...
...
Main : Graphs
IL V VL Vs Ic Id
5.0
4.0
3.0
2.0
y
1.0
0.0
-1.0
0.06070 0.06075 0.06080 0.06085 0.06090 0.06095 0.06100 0.06105 ...
...
...
Main : Graphs
ref tri PWM
1.40
1.20
1.00
0.80
0.60
0.40
y
0.20
0.00
-0.20
-0.40
-0.60
0.0514 0.0516 0.0518 0.0520 0.0522 0.0524 0.0526 0.0528 0.0530 ...
...
...
Main : Graphs
ref tri PWM
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
0.0513 0.0514 0.0515 0.0516 0.0517 0.0518 ...
...
...
A boost regulator in below figure has an input voltage of Vs=5 V. The
average output voltage Vo=15 V and the average load current Ia=0.5 A. The
switching frequency is 25 kHz. If L=150 µH and C=220 µF. Determine:
a) The duty cycle D,
b) The ripple current of inductor,
c) The peak current of inductor,
d) The ripple voltage of filter capacitor ΔVc.
L D1
iL ic
+
Vs - C R
Duty
a) The duty cycle
𝑽𝒈 𝟓 𝟐
𝑫 = 𝟏 − = 𝟏 − = = 𝟎.𝟔𝟔𝟕
𝑽 𝟏𝟓 𝟑
𝑽𝒈 𝟓 𝟐 𝟏
∆𝒊𝑳 = 𝑫𝑻𝒔 = 𝒙 𝒙 = 𝟎.𝟖𝟗 𝑨
𝑳 𝟏𝟓𝟎𝒙𝟏𝟎−𝟔 𝟑 𝟐𝟓𝟎𝟎𝟎
c) The peak current of inductor
∆𝒊𝑳 𝟎.𝟖𝟗
𝒊𝒑,𝑳 = 𝒊𝑳 + = 𝟏.𝟓 + = 𝟏.𝟗𝟒𝟓 𝑨
𝟐 𝟐
𝒊𝒂𝑫 𝟎.𝟓𝒙𝟐/𝟑
∆𝑽𝒄 = = −𝟔
= 𝟔𝟎.𝟔𝟏 𝒎𝑽
𝒇𝑪 𝟐𝟓𝒌𝒙𝟐𝟐𝟎𝒙𝟏𝟎
A boost converter is operating at fixed frequency of 100 kHz with a constant
switch duty cycle and is fed by a 100 V low-ripple dc source and delivers 150 V
at a nominal power output of 300 W. The inductor has a peak-to-peak current
that is 100 % of the average current. The output voltage ripple is negligible.
ic
Vg +
iL C R
- L
Duty
1
2
Vg +
iL C R
- L
Vg iL R
+
C iL C R
- L L
Off State
+ +
ia(t)
iL(t)
ic(t)
+
Vg _
VL(t) L C R V(t)
- -
VL = Vg
ic = V/R ic = - ia
b) Switch in Position 2
+
ia(t) +
VL(t) iL (t)
L C R V(t)
- -
VL = V
ic = iL + V/R ic = iL - ia
VL(t)
Vg
DTs (1-D)Ts
t
V
1
Ts =
fs
Vg(t)
Vg V
D=
V - Vg
t
DTs Ts
iL(t)
iL(DTs)
I
Vg V
L L
t
DTs Ts
Inductor current slope during subinterval 1 :
diL(t) VL(t) Vg
= =
dt L L
diL(t) VL(t) V
= =
dt L L
iL(t)
iL(DTs)
Vg V
L L
t
DTs Ts
t
DTs Ts
Vg D
V= - where (DTs = TON )
1-D
V
D=
V - Vg
V(t)
V
V I V
+
RC C RC
t
DTs Ts
Capacitor voltage slope during subinterval 1 :
ic (t) V
dVc (t) = =
C RC
ic (t) I V
dVc (t) = = +
C C RC
V(t)
V Vc
V I V
+
C RC
RC
t
DTs Ts
Change in capacitor voltage during subinterval 1 is :
-V Ia
Vc = DTS Vc = DTS
RC C
iL - i a
0
t
- ia
is (t)
iL (t)
0
DTs Ts t
In this simulation, it will be tried to observe output voltage
waveform, inductor current, inductor voltage and capacitor
current waveforms according to the given values :
Input voltage : Vg = 12 V,
Output voltage : V = -8 V,
Switching frequency : fs = 25 kHz,
Inductance : L = 150 uH,
Capacitance : C = 220 uF,
Load resistance : R = 3 Ω.
Duty Cycle : % 40
D
S
Ia
Vs V
VD
IL
Ic
Is
3 [ohm]
R=0
150 [uH]
220 [uF]
Vg = 12 V
VL
V Vs Ic
Ref A
B Compar- VL IL VD
ator
Is
Main : Graphs
IL V VL Vs VD Ic Is
7.0
6.0
5.0
4.0
y
3.0
2.0
1.0
0.0
0.01906 0.01908 0.01910 0.01912 0.01914 0.01916 0.01918 0.01920 0.01922 0.01924 ...
...
...
Main : Graphs
IL V VL Vs VD Ic Is
15.0
10.0
5.0
0.0
y
-5.0
-10.0
-15.0
0.05052 0.05054 0.05056 0.05058 0.05060 0.05062 0.05064 0.05066 ...
...
...
Main : Graphs
IL V VL Vs VD Ic Is
-7.00
-7.20
-7.40
-7.60
-7.80
y
-8.00
-8.20
-8.40
-8.60
-8.80
0.07372 0.07375 0.07377 0.07380 0.07382 0.07385 0.07387 0.07390 0.07392 0.07395 ...
...
...
Main : Graphs
IL V VL Vs VD Ic Is
4.0
3.0
2.0
1.0
0.0
y
-1.0
-2.0
-3.0
-4.0
0.04064 0.04066 0.04068 0.04070 0.04072 0.04074 0.04076 ...
...
...
Main : Graphs
IL V VL Vs VD Ic Is
12.075
12.050
12.025
12.000
y
11.975
11.950
11.925
11.900
0.000 0.050 0.100 0.150 0.200 0.250 0.300 ...
...
...
Main : Graphs
IL V VL Vs VD Ic Is
8.0
7.0
6.0
5.0
4.0
3.0
y
2.0
1.0
0.0
-1.0
-2.0
0.08145 0.08148 0.08150 0.08153 0.08155 0.08157 0.08160 0.08162 0.08165 0.08167 ...
...
...
Main : Graphs
IL V VL Vs VD Ic Is
25.0
20.0
15.0
10.0
y
5.0
0.0
-5.0
0.08060 0.08062 0.08064 0.08066 0.08068 0.08070 0.08072 0.08074 0.08076 ...
...
...
A buck-boost regulator has an input voltage of Vs=12V. The duty cycle k=0.25
and the switching frequency is 25 kHz. The inductance L=150 µH and the
filter capacitance C=220 µF. The average load current Ia=1.25 A. Determine:
a) The average output voltage
b) The peak-to-peak output voltage ripple
c) The peak current of the transistor Ip
𝑰𝒂𝒙𝑫 𝟏. 𝟐𝟓𝒙𝟎. 𝟐𝟓
𝑰𝒔 = = = 𝟎. 𝟒𝟏𝟔𝟕 𝑨
𝟏 − 𝑫 𝟏 − 𝟎. 𝟐𝟓
𝑰𝒔 ∆𝑰 𝟎.𝟒𝟏𝟔𝟕 𝟎.𝟖
𝑰𝒑 = + = + = 𝟐.𝟎𝟔𝟕
𝑫 𝟐 𝟎.𝟐𝟓 𝟐
A buck-boost converter operating at 125 kHz has a +50 V low-ripple dc input
and has an output of -50 V into a resistive load of 25 Ω. The inductor has a
peak-to-peak current of 8 A (this implies that the converter is in the
continuous-discontinuous boundary condition). The output voltage ripple is
negligible. The switching transistor is implemented using MOSFET technology.
L1 C1 iC1 L2
+
iL1 + VC1 - iL2
Vg +
VC2 C2 R
-
D
iC2 ia
-
Duty
L1 C1 L2
iC1
iL1 1 iL2
Vg + C2 R
-
2 D
iC2
ia
L1 C1 L2 L1 C1 L2
iC1 iC1
it off.
- The capacitor C1 discharges its
energy to the circuit formed by
C2, L2 and load.
Off State L1 C1 L2
L1 C1 L2
+
iC1 iL2
iL1
Vg +
- C2 R V
iC2 ia -
a) Switch in Position 2
L1 C1 L2
+
iC1 iL2
iL1
R V
Vg C2
+
-
D
iC2 ia
-
VL1(t)
Vg
DTs (1-D)Ts
t
Vg – VC1
VL2(t)
V + VC1
DTs (1-D)Ts
t
V
iL1(t)
iL1(DTs)
IL1
Vg Vg-VC1
L1 L1
t
DTs Ts
diL1(t) VL1(t) Vg
= =
dt L L1
IL2
V+VC1 V
L2 L2
t
DTs Ts
diL2(t) VL2(t) V
= =
dt L2 L2
iC1(t)
iL2 iL2
t
DTs Ts
- iL1
iC1 = iL2
iC1 = - iL1
iC2(t)
DTs Ts
iC2 = iL2 - ia
iC2 = iL2 - ia
iC2(t)
ia
DTs Ts t
We know that output current is equal to :
-V
ia =
R
VC2
V
t
DTs Ts
Vg
V = -D
(1-D)
iL2 Vg D
Vc2 = Vc2 =
8fsC2
8fs2C2L2
VC1(t)
VC1 Vc1
iL2 -iL1
C1 C1
t
DTs Ts
Capacitor voltage slope during subinterval 1 :
VC1
Vc1
iL2 -iL1
C1 C1
t
DTs Ts
iL2
Vc1 = DTs
C1
In this simulation, it will be observed output voltage waveform,
inductor current waveforms, inductor voltage waveforms and
capacitor current waveforms according to the given values :
Input voltage : Vg = 12 V,
Output voltage : V = -8 V,
Switching frequency : fs = 25 kHz,
Energy transfer Capacitance : C1 = 200 uF
Energy transfer Inductance : L1 = 180 uH
Filter Inductance : L2 = 150 uH,
Filter Capacitance : C2 = 80 uF,
Load resistance : R = 3 Ω.
Duty Cycle : % 40
180 [uH] 200 [uF] 150 [uH]
IL1
IC1 IL2
Vs V
VC1
VL1
VL2
3 [ohm]
80 [uF]
D
VC2
S
R=0
Vg = 12 V
IC2
Ia
: Co...
Vs IC1 IL2 Main ... <null>
Ref A Ref
1
0
V VL1 VL2 VC2 0.402698
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
12.075
12.050
12.025
12.000
y
11.975
11.950
11.925
11.900
0.000 0.050 0.100 0.150 0.200 0.250 0.300 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
3.00
2.75
2.50
2.25
2.00
y
1.75
1.50
1.25
1.00
0.75
0.08358 0.08360 0.08362 0.08364 0.08366 0.08368 0.08370 0.08372 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
4.00
3.50
3.00
2.50
y
2.00
1.50
1.00
0.08346 0.08348 0.08350 0.08352 0.08354 0.08356 0.08358 0.08360 0.08362 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
20.0
15.0
10.0
5.0
y
0.0
-5.0
-10.0
-15.0
0.075150 0.075170 0.075190 0.075210 0.075230 0.075250 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
20.0
15.0
10.0
5.0
y
0.0
-5.0
-10.0
-15.0
0.075150 0.075170 0.075190 0.075210 0.075230 0.075250 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
5.0
4.0
3.0
2.0
1.0
y
0.0
-1.0
-2.0
-3.0
0.091910 0.091930 0.091950 0.091970 0.091990 0.092010 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
1.25
1.00
0.75
0.50
0.25
0.00
y
-0.25
-0.50
-0.75
-1.00
-1.25
0.08140 0.08142 0.08144 0.08146 0.08148 0.08150 0.08152 0.08154 0.08156 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
20.100
20.050
20.000
y
19.950
19.900
19.850
19.800
0.09988 0.09990 0.09992 0.09994 0.09996 0.09998 0.10000 0.10002 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
-7.900
-7.950
-8.000
y
-8.050
-8.100
-8.150
0.07955 0.07960 0.07965 0.07970 0.07975 0.07980 0.07985 0.07990 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
-7.900
-7.950
-8.000
y
-8.050
-8.100
-8.150
0.07955 0.07960 0.07965 0.07970 0.07975 0.07980 0.07985 0.07990 ...
...
...
Main : Graphs
Vs IL1 VL1 IC1 VC1 VL2 IL2 IC2 VC2 V Ia
12.0
10.0
8.0
6.0
4.0
y
2.0
0.0
-2.0
-4.0
-6.0
0.0650 0.0700 0.0750 0.0800 0.0850 0.0900 0.0950 0.1000 ...
...
...
Main : Graphs
ref tri PWM
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
0.0572 0.0573 0.0574 0.0575 0.0576 0.0577 0.0578 0.0579 ...
...
...
Main : Graphs
ref tri PWM
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
0.05720 0.05722 0.05724 0.05726 0.05728 0.05730 0.05732 0.05734 0.05736 0.05738 ...
...
...
The input voltage of a Cuk converter in Figure, Vs=12 V. The duty cycle D=0.25
and the switching frequency is 25 kHz. The filter inductance is L2=150 µH and
filter capacitance is C2=220 µF. The energy transfer capacitance is C1=200 µF
and inductance L1=180 µH.The average load current is Ia=1.25 A. Determine:
a) the average output voltage Va;
b) the average input current Is;
c) the peak-to-peak ripple current of inductor L1, ΔI1;
d) the peak-to-peak ripple voltage of capacitor C1, ΔVc1;
e) the peak-to-peak ripple voltage of capacitor L2, ΔI2; and
f) the peak-to-peak ripple voltage of capacitor C2, ΔVc2;
g) the peak current of the transistor Ip.
L1 C1 iC1 L2
+
iL1 + VC1 - iL2
Vs +
VC2 C2 R
-
D
iC2 ia
-
Duty
a) 𝑫𝑽𝒔 𝟎. 𝟐𝟓𝒙𝟏𝟐
𝑽𝒂 = − =− = −𝟒 𝑽
𝟏−𝑫 𝟏 − 𝟎. 𝟐𝟓
𝑫𝑰𝒂 𝟏. 𝟐𝟓𝒙𝟎. 𝟐𝟓
b) 𝑰𝒔 = = = 𝟎. 𝟒𝟐 𝑨
𝟏 − 𝑫 𝟏 − 𝟎. 𝟐𝟓
𝑽𝒔 𝒙𝑫 𝟏𝟐𝒙𝟎. 𝟐𝟓
c) ∆𝑰𝟏 = = = 𝟎. 𝟔𝟕 𝑨
𝒇𝒙𝑳𝟏 𝟐𝟓𝟎𝟎𝟎𝒙𝟏𝟖𝟎𝒙𝟏𝟎−𝟔
𝑰𝒔 (𝟏 − 𝑫) 𝟎. 𝟒𝟐𝒙(𝟏 − 𝟎. 𝟐𝟓)
d) ∆𝑽𝒄𝟏 = = = 𝟔𝟑 𝒎𝑽
𝒇𝑪𝟏 𝟐𝟓𝟎𝟎𝟎𝒙𝟏𝟓𝟎𝒙𝟏𝟎−𝟔
DC/DC
V = R*I
DC/DC
V=0
N1 : N2 D
.
Vg +
C
-
R
.
Duty
A two-winding inductor
Symbol is same as transformer, but function differs significantly
Transformer isolation
Minimization of current and voltage stresses when a large
step – up or step – down conversion ratio is needed - use
transformer turns ratio
Isolate inductor windings: the flyback
buck-boost converter: converter
Lm C R V
Vg + .
-
-
1
2
VLm = Vg -V
ic =
R
ig = i
a) Switch in Position 2
D
1:n +
- -
i ic
ig . i/n
Lm V/n V2 C R V
Vg + .
- + + -
N2
n=
N1
VLm = -V/n i V
ic = -
n R
ig = 0
VLm(t)
Vg
DTs (1-D)Ts
t
– V/n
ic(t) i V
-
n R
-V
R
V(t)
V
V
t
DTs Ts
Vg n D
V=
(1-D)
V(t)
V
V
t
DTs Ts
The output configuration for the flyback converter is the same as for the buck-boost converter, so the
output ripple voltages for the two converters are also the same.
A flyback converter of has the following circuit parameters: D
N1 : N2
+
Vg=24 V . ic
N1/N2=1/3 V0
Lm C R
Lm=500 uH
V + .
R=5 ohm g - -
C=200 uF
f=40 kHz 1
V0=5 V 2
Determine (a) the required duty ratio D; (b) the output voltage ripple. Assume
that all components are ideal
In this simulation, It will be tried to observe output voltage
waveform, inductor voltage waveform, capacitor current and input
current waveform according to the given values :
Input voltage : Vg = 24 V,
Output voltage : V = 12 V,
Switching frequency : fs = 40 kHz
Transformer ratio : 24V:8V
Capacitance : C = 200 uF
Magnetizing Inductance : Lm = 400 uH
Load resistance : R = 5 Ω.
Duty Cycle : % 60
Ig
400 [uH] VL #1 #2
Ic
200 [uF]
5 [ohm]
R=0
S V
Vg = 24 V Main ... Main ...
Ref V
1
0
0.599048 11.9121
Ref A
Ig VL
B Compar-
ator
V Ic
Main : Graphs
Ig Ic V VL
40
30
20
10
0
y
-10
-20
-30
-40
-50
0.07746 0.07748 0.07750 0.07752 0.07754 0.07756 0.07758 ...
...
...
Main : Graphs
Ig Ic V VL
4.0
3.0
2.0
1.0
y
0.0
-1.0
-2.0
-3.0
0.07160 0.07162 0.07164 0.07166 0.07168 0.07170 0.07172 0.07174 0.07176 ...
...
...
Main : Graphs
Ig Ic V VL
13.50
13.00
12.50
12.00
y
11.50
11.00
10.50
0.0694 0.0695 0.0696 0.0697 0.0698 0.0699 0.0700 ...
...
...
Main : Graphs
Ig Ic V VL
3.50
3.00
2.50
2.00
1.50
y
1.00
0.50
0.00
-0.50
0.07626 0.07628 0.07630 0.07632 0.07634 0.07636 0.07638 0.07640 0.07642 0.07644 0.07646 ...
...
...
Main : Graphs
ref tri PWM
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
0.07076 0.07078 0.07080 0.07082 0.07084 0.07086 0.07088 0.07090 ...
...
...
Main : Graphs
ref tri PWM
1.20
1.00
0.80
0.60
y
0.40
0.20
0.00
-0.20
0.07076 0.07078 0.07080 0.07082 0.07084 0.07086 0.07088 0.07090 ...
...
...
D3 I3
VD3 N3
V3
is I2 D1 L IL
VL
N1 N2
Lm V1 C R Vo
iLm V2 D2 Vx
Vs
S Vsw
(a)
(b)
(c)
where I L ( DT ) is the inductor current at t DT, when the switch is turned off.
Following voltage gain relation :
Vo n
2D
Vin n1
Current and voltage waveforms for the forward converter
• The additional winding nr is known as tertiary winding
• If the winding ratio nr/n1 < 1, then it is possible to have a
duty cycle that exceeds 50%
(a) (b)
(c)
Three ways to draw a single-ended forward converter with a core reset circuit
115
D3 I3
VD3 N3
V3
is I2 D1 L IL
VL
N1 N2
Lm V1 C R Vo
iLm V2 D2 Vx
Vs
S Vsw
VD3 N3
V3
is I2 L IL
VL
N1 N2
V1=Vs C R Vo
iLm V2 = Vs(N2/N1) = Vx
𝑽𝟏 = 𝑽 𝒔
Vs S Vsw
𝑵𝟐 𝑵𝟐
𝑽𝟐 = 𝑽 𝟏 = 𝑽𝒔 The voltage
𝑵𝟏 𝑵𝟏
across D3 is
𝑵𝟑 𝑵𝟑 showing that D3
𝑽𝟑 = 𝑽 𝟏 = 𝑽𝒔
𝑵𝟏 𝑵𝟏 is OFF. A positive
V2 forward-biases
𝑽𝑫𝟑 = −𝑽𝒔 −𝑽𝟑 < 0 D1 and reverse-
biases D2.
D3 I3
VD3 N3
V3
is I2 L IL
VL
N1 N2
V1=Vs C R Vo
iLm V2 = Vs(N2/N1) = Vx
Vs S Vsw
𝑵𝟐 𝒅𝒊𝑳
𝑽𝑳 = 𝑽 𝟐 − 𝑽𝒐 = 𝑽𝒔 − 𝑽𝒐 = 𝑳
𝑵𝟏 𝒅𝒕
𝑵𝟐 𝑫𝑻
∆𝒊𝑳 𝒄𝒍𝒐𝒔𝒆𝒅 = 𝒗𝒔 − 𝑽𝟎
𝑵𝟏 𝑳
𝑽𝒔 𝑫𝑻
∆𝒊𝑳 =
𝑳𝒎
I3
N3
V3
is L IL
VL
N1 N2
Lm V1 C R Vo
iLm V2 Vx=0
Vs S Vsw
𝑽𝟑 = −𝑽𝒔
𝑵𝟏 𝑵𝟏
𝑽 𝟏 = 𝑽𝟑 = −𝑽𝒔
𝑵𝟑 𝑵𝟑
𝑵𝟐 𝑵𝟐
𝑽 𝟐 = 𝑽𝟑 = −𝑽𝒔
𝑵𝟑 𝑵𝟑
I3
N3
V3
is L IL
VL
N1 N2
Lm V1 C R Vo
iLm V2 Vx=0
𝒅𝒊𝑳
𝑽𝑳 = −𝑽𝒐 = 𝑳
Vs S Vsw 𝒅𝒕
𝑵𝟑
𝒔𝑫𝑻 𝟏 + <𝑇
𝑵𝟏
𝑵𝟑
𝑫 𝟏+ <1
𝑵𝟏
∆𝑽𝒐 𝟏−𝑫
= 𝟐
𝑽𝒐 𝟖𝑳𝑪𝒇
When the switch is closed, energy is transferref from the source to the load
through the transformer. The voltage on the transformer secondary is a pulsed
waveform, and the output is analyzed like that of the buck dc-dc converter. Energy
stored in the magnetizing inductance while the switch is closed can be returned to
the input source via a third transformer winding while the switch is open.
The forward converter has the followinf parameters:
D3 I3
VD3 N3
Vs=48 V V3
R=10 Ὡ is I2 D1 L IL
L=0.4 mH N2
VL
N1
Lm=5 mH Lm iLm V1 V2 D2 Vx
C R Vo
f=35 kHz Vs
N1/N2=1.5
S Vsw
N1/N3=1D=0.4
(a) Determine the output voltage, the maximum and minimum currents in L, and
the output voltage ripple.
(b) Determine the peak current in the transformer primary winding. Verify that
magnetizing current is reset to zero during each switching period. Assume all
components are ideal.
What happens when D > 0.5
iLm
ΔiLm
DT t0 T
ΔTx
iLm
ΔiLm
DT T
ΔTx
In this simulation, It will be observed output voltage waveform,
inductor voltage waveform, capacitor current and input current
waveform according to the given values :
Input voltage : Vg = 20 V,
Output voltage : V = 8 V,
Switching frequency : fs = 40 kHz
Transformer ratio : 8V:8V:8V
Capacitance : C = 100 uF
Magnetizing Inductance : Lm = 5 uH
Load resistance : R = 8 Ω.
Duty Cycle : % 40
a) Calculate Dmax.
b) When D=0.4, calculate the turns ratio N1:N2.
c) When N1:N2 is as calculated in (b), what is the lowest
input voltage if Vo is to be kept equal to 6 V?
In the following, D=0.4;
e) Calculate the voltage over the transistor during the Toff.
f) Sketch v1 and vsw.
g) For Io=10 A, sketch iD1 and iD2.
h) Sketch isw, i1, i3 and im.
• Flyback:
– Lowest cost
– Least number of
components
– Transformer used as
an energy storage unit
– High output ripple and noise
– Poor load regulation
• Forward Converter:
– Low Cost
– Low output ripple and
noise
– More components
compared to flyback converter,
but more reliable
– Transformer does not need to act
as an energy storage unit
Another dc-dc converter that has transformer isolation is the push
pull converter shown in Figure.
D1 L IL
Np:Ns
VL
Vp2 P2 S2 Vs2 C R Vo
Vx
Vp1 P1 S1 Vs1
Vs
(b)
(c)
Figure: Push-Pull Converter (a) Switching sequence; (b) Voltage Vx; and (c) Current in L
a) Mode 1 : Sw1 is OFF, Sw2 is ON
D1 L IL
Np:Ns
VL
Vp2 P2 S2 Vs2 C R Vo
Vx
Vp1 P1 S1 Vs1
Vs
𝑵𝑺
𝑽𝒑𝟏 = 𝑽𝒔 𝑽𝑿 = 𝑽𝑺𝟐 = 𝑽𝑺
𝑵𝑷
𝑵𝒔
𝑽𝒔𝟏 = 𝑽𝒔 𝑵𝑺
𝑵𝒑 𝑽𝑳 = 𝑽𝑿 − 𝑽𝑶 = 𝑽𝑺 − 𝑽𝑶
𝑵𝑺 𝑵𝑷
𝑽𝒔𝟐 = 𝑽𝒔
𝑵𝑷
Assuming a constant output voltage Vo, the voltage across L is a constant,
resulting in a linearly increasing current in L. In the interval when Sw1 is closed,
the change in current in L is
𝑽𝒔 (𝑵𝒔 𝑵𝒑) − 𝑽𝒐
∆𝒊𝑳 𝒄𝒍𝒐𝒔𝒆𝒅 = 𝑫𝑻
𝑳
b) Mode 2 : Sw1 is ON, Sw2 is OFF
D1 L IL
Np:Ns
VL
Vp2 P2 S2 Vs2 C R Vo
Vx
Vp1 P1 S1 Vs1
D2 is forward-biased
Vs
D1 is reverse-biased
Sw1 Sw2 Vsw D2
𝑵𝑺
𝑽𝒑𝟐 = −𝑽𝒔 𝑽𝑿 = −𝑽𝑺𝟐 = 𝑽𝑺
𝑵𝑷
𝑵𝒔
𝑽𝒔𝟏 = −𝑽𝒔 𝑵𝑺
𝑵𝒑 𝑽𝑳 = 𝑽𝑿 − 𝑽𝑶 = 𝑽𝑺 − 𝑽𝑶
𝑵𝑷
𝑵𝑺
𝑽𝒔𝟐 = −𝑽𝒔
𝑵𝑷
c) Mode 3 : Sw1 is OFF, Sw2 is OFF
D1 L IL
Np:Ns
VL
Vp2 P2 S2 Vs2 C R Vo
Vx
Vp1 P1 S1 Vs1
Vs
With both switches open, the current in each of the primary windings is zero. The
current in the filter inductor L must maintain continuity, resulting in both D1 and D2
becoming forward-biased. Inductor current divides evenly between the transformer
secondary windings.
c) Mode 3 : Sw1 is OFF, Sw2 is OFF
D1 L IL
Np:Ns
VL
Vp2 P2 S2 Vs2 C R Vo
Vx
Vp1 P1 S1 Vs1
Vs
𝑽𝒔 (𝑵𝒔 𝑵𝒑 ) − 𝑽𝒐 𝑽𝒐 𝟏
𝑫𝑻 + −𝑫 𝑻=𝟎
𝑳 𝑳 𝟐
Solving the net change in inductor current over one period must be zero for steady-
state operation,
𝑵𝒔
𝑽𝒐 = 𝟐𝑽𝒔 𝑫
𝑵𝒑
Ripple voltage on the output is derived in a manner similar to buck converter. The
output ripple for the push pull converter is
∆𝑽𝒐 𝟏 − 𝟐𝑫
=
𝑽𝒐 𝟑𝟐𝑳𝑪𝒇𝟐
In this simulation, It will be observed output voltage waveform,
inductor voltage waveform, capacitor current and input current
waveform according to the given values :
Input voltage : Vs = 30 V,
Output voltage : Vo = 9 V,
Switching frequency : fs = 4 kHz
Transformer ratio : 1 kV:2kV
Capacitance : C = 300 uF
Inductance : Lm = 0.9 mH
Load resistance : R = 6 Ω.
Duty Cycle : % 30
A push pull converter has the following parameters:
D1 L IL
Np:Ns
Vs=30 V VL
D=0.3
L=0.5 mH Vp1 P1 S1 Vs1
R=6 Ω Vs
f=10 kHz
Determine Vo, the maximum and minimum values of iL, and the output ripple
voltage. Assume all components are ideal.
𝑵𝒔 𝟏
𝑽𝒐 = 𝟐𝑽𝒔 𝑫 = 𝟐 𝟑𝟎 𝟎. 𝟑 = 𝟗 𝑽
𝑵𝒑 𝟐
𝑽𝒐 𝟗
𝒊𝑳 = = = 𝟏. 𝟓 𝑨
𝑹 𝟔
𝑽𝒐 𝟏 𝟗 𝟎. 𝟓 − 𝟎. 𝟑
∆𝒊𝑳 = −𝑫 𝑻= = 𝟎. 𝟑𝟔 𝑨
𝑳 𝟐 𝟎. 𝟓 𝟏𝟎 −𝟑 (𝟏𝟎𝟎𝟎𝟎)
∆𝒊𝑳 ∆𝒊𝑳
𝒊𝑳,𝒎𝒂𝒙 = 𝒊𝑳 + = 𝟏. 𝟔𝟖 𝑨 𝒊𝑳,𝒎𝒂𝒙 = 𝒊𝑳 − = 𝟏. 𝟑𝟐 𝑨
𝟐 𝟐
∆𝑽𝒐 𝟏 − 𝟐𝑫 𝟏 − 𝟐(𝟎. 𝟑)
= = = 𝟎. 𝟎𝟎𝟓 = 𝟎. 𝟓 %
𝑽𝒐 𝟑𝟐𝑳𝑪𝒇𝟐 𝟑𝟐 𝟏𝟎𝟎𝟎𝟎 𝟐 𝟎. 𝟓 𝟏𝟎 −𝟑 𝟓𝟎 (𝟏𝟎)−𝟔
[1] Power Electronics ; Converters, Applications and Design,
Second Edition ; Ned Mohan, Tore M. Undeland, William
P. Robbins, 1995.