Intro LabVIEW FPGAv4
Intro LabVIEW FPGAv4
• Programming FPGAs
• Why Are They Useful?
• NI FPGA Hardware
• Common Applications for FPGAs
• How to Learn More
FPGA Technology
Programmable
Interconnects
Logic
Blocks
I/O Blocks
FPGA Logic Implementation
Implementing Logic on FPGA: F = {(A+B)CD} E
A
B
C
D
Demo
• Filter
LabVIEW FPGA Code Abstraction
Counter Analog I/O I/O with DMA
FPGA
• Simple I/O
Agenda
• Programming FPGAs
• Why Are They Useful?
• NI FPGA Hardware
• Common Applications for FPGAs
• How to Learn More
Why Are They Useful?
• True Parallelism – Provides parallel tasks and pipelining
A
B
C
D
Z
W X Y
High Reliability and Determinism
Decision Making in Software Multiple Software Layers
Application Software
Operating System
Calculation
Driver API
Hardware
~25 ms
UUT Response
Outputs
High Reliability and Determinism
Decision Making in Hardware
Highest
Application Software
Operating System
Determinism
Calculation
Driver API
Hardware
25 ns*
UUT Response
Outputs
• High-speed control
• Custom DAQ
• Digital communication protocols
• Sensor simulation
• Onboard processing and data reduction
Common Applications
• High-speed control
• Custom DAQ
• Digital communication protocols
• Sensor simulation
• Onboard processing and data reduction
• Coprocessing
High-Speed Control
• High-speed control
• Custom DAQ
• Digital communication protocols
• Sensor simulation
• Onboard processing and data reduction
Customize Your DAQ Device
• High-speed control
• Custom DAQ
• Digital communication protocols
• Sensor simulation
• Onboard processing and data reduction
Digital Communication
Example – SPI
Common Applications
• High-speed control
• Custom DAQ
• Digital communication protocols
• Sensor simulation
• Onboard processing and data reduction
Sensor Simulation and FPGA
• Fully customizable hardware – Many types of sensors
• Parallelism – Many sensors on chip with no interference
• Strict timing requirements – Deterministic or highly
realistic
• Onboard processing – Engineering units to sensor signals
Sensor Signals
Common Applications
• High-speed control
• Custom DAQ
• Digital communication protocols
• Sensor simulation
• Onboard processing and data reduction
Onboard Processing and Data
Reduction
Built-In I/O Processing Output
• Analog voltages • Encoding/decoding • DMA preprocessed data
• Digital communications • Filtering/averaging • Streaming from input to
• Sensor signals • Modulation/ output without host
demodulation involvement
• Decimation
• Stream processing DMA to
Input Host
Process Output
Intellectual Property (IP)
FFT
DC/RMS
Waveform Averaging
Digital filtering
Windowing
Resampling
LabVIEW FPGA Math
IPNet Signal Processing
ni.com/ipnet
Data Manipulation and Transfer
RF and Communications
Digital Protocols
Data Acquisition
Signal Generation
Control
Sensor Simulation
More than 200 IP cores and examples
HDL-Based IP in LabVIEW FPGA
• HDL Interface Node
Inline HDL integration
• Component-Level IP Node
Parallel HDL integration
How to Learn More
Questions?
ni.com/fpga ni.com/training
2 Day LabVIEW FPGA
Module Course