8255
8255
D0 D0
D7
D7 PA0
A7
A0 A0 PA7
A1
A6 A1
8255
IOR RD PB0
A5
IOW WR PB7
A4
RESET OUT RESET PC0
A3
PC7
A2
CS
8255 PPI
• The INTEL 8255 is a 40 pin IC having total 24 I/O pins.
consisting of 3 numbers of 8 –bit parallel I/O ports
(i.e. PORT A, PORT B,PORT C). The ports can be
programmed to function either as a input port or as
a output port in different operating modes. It
requires 4 internal addresses and has one logic LOW
chip select pin. Its main functions are to interface
peripheral devices to the microprocessor. Basically
used for parallel data transfer. operates in mainly
two modes.
• (1) Bit Set Reset Mode (BSR Mode).
• (2) I/O Mode.
Block Diagram of 8255 PPI
POWER +5V PA
SUPPLIES Ground GROUP A
GROUP A
PORT A (8)
CONTROL PA7-PA0
Bidirectional
Data Bus
D7- D0 GROUP A PCU
DATA BUS
BUFFER PORT C
8 Bit UPPER (4) PC7-PC4
Internal
Data Bus
GROUP B PCL
PORT C
LOWER (4) PC3-PC0
READ/
RD
WR WRITE
GROUP B PB
A0 CONTROL GROUP B
A1
LOGIC CONTROL
RESET PORT B (8)
PB7-PB0
cs
Function of Blocks
BLOCK FUNCTION OF BLOCK
It is used to interface the internal data bus of 8255 to the system data bus by
Data Bus Buffer reading and writing operations.
It accepts the input from the address bus and issues commands to the individual
Read/write group blocks. also issues appropriate enabling signals to access the required
Control logic data/control words/status words.
8255 Pin
Diagram
Function of Pins
PIN FUNCTION OF PIN
These are bidirectional, tri-state data bus lines are connected to the system data bus. They
are used to transfer data and control word from microprocessor (8085) to 8255 or receive
D0-D7 (Data Bus) data or status word from 8255 to the 8085.
These are 8 Bit bidirectional I/O pins used to send data to output device and to receive data
from input device. It functions as an 8 Bit data output latch/buffer when used in output
PA0-PA7 (Port A) mode and as an 8 Bit data input latch/buffer when used in input mode.
These are 8 Bit bidirectional I/O pins used to send data to output device and to receive data
from input device. It functions as an 8 Bit data output latch/buffer when used in output
PB0-PB7 (Port B) mode and as an 8 Bit data input latch/buffer when used in input mode.
Function of Pins
PIN FUNCTION OF PIN
These are 8 bit bidirectional I/O pins divided into two groups PCL (PC3-PC) and PCU (PC7-
PC4).these groups can individually transfer data in or out when programmed for simple I/O,
PC0-PC7 and used as handshake signals when programmed for handshake or
(Port C) bidirectional modes.
When this pin is low, the CPU can read data in the ports or the status word through the data
RD bus buffer.
When this pin is low, the CPU can write data on the ports or in the control register through
WR the data bus buffer.
This pin can be enabled for data transfer operation between the CPU and 8255.
CS
This pin is used to reset 8255.i.e control register gets cleared and all the ports are set to the
RESET input mode.
Function of Pins
PIN FUNCTION OF PIN
A0-A1 The selection of input port and control word register is done by using A0 and A1 pins In
conjunction with RD and WR pins.
A1 A0 RD WR CS Operations
1 1 0 1 0 ILLEGAL CONDITION
PORT B
1=I/P, 0=O/P
MODE SELECTION
0 = MODE 0
1 = MODE 1
GROUP A
PORT C (UPPER) 1=I/P,
0=O/P
PORT A
1=I/P, 0=O/P
MODE SELECTION
00 = MODE 0
01 = MODE 1
1X = MODE 2
MODE SET FLAG
1 = ACTIVE
Control Word Format in BSR Mode
0 D6 D5 D4 D3 D2 D1 D0
BIT SET/RESET
1 = SET
2 = RESET
DON’T CARE
BIT SELECT
0 1 2 3 4 5 6 7
0 1 0 1 0 1 0 1 B0
0 0 1 1 0 0 1 1 B1
0 0 0 0 1 1 1 1 B2
• Solution:
1 0 0 1 1 0 0 0
= 98H
Program:
MVI A,98H ; LOAD CONTROL WORD
• Solution:
1 0 1 0 1 1 1 0
= AEH
Program:
MVI A,AEH ; LOAD CONTROL WORD
Solution:
1 0 0 0 0 0 0 0
= 80H
Solution:
1 0 0 1 1 0 1 1
= 9BH