Week 5 Lecture Slides
Week 5 Lecture Slides
1
The 8051 Microcontroller
Santanu Chattopadhyay
Electronics and Electrical Communication Engineering
2
8051 Basic Component
• 4K bytes internal ROM
• 128 bytes internal RAM
• Four 8-bit I/O ports (P0 - P3).
• Two 16-bit timers/counters
• One serial interface
CPU RAM ROM
CPU
OSC Bus
4 I/O Ports Serial
Control
P0 P2 P1 P3 TXD RXD
Addr/Data
Other 8051 featurs
• Only 1 On chip oscillator (external crystal)
• 6 interrupt sources (2 external , 3 internal, Reset)
• 64K external code (program) memory(only read)PSEN
• 64K external data memory(can be read and write) by RD,WR
• Code memory is selectable by EA (internal or external)
• We may have External memory as data and code
Embedded System
(8051 Application)
• What is Embedded System?
– An embedded system is closely
integrated with the main system
– It may not interact directly with the
environment
– For example – A microcomputer in a car
ignition control
An embedded product uses a microprocessor or microcontroller to do one task
only
There is only one application software that is typically burnt into ROM
Examples of Embedded Systems
• Keyboard
• Printer
• video game player
• MP3 music players
• Embedded memories to keep configuration information
• Mobile phone units
• Domestic (home) appliances
• Data switches
• Automotive controls
Three criteria in Choosing a Microcontroller
• meeting the computing needs of the task efficiently and cost
effectively
– speed, the amount of ROM and RAM, the number of I/O ports and
timers, size, packaging, power consumption
– easy to upgrade
– cost per unit
• availability of software development tools
– assemblers, debuggers, C compilers, emulator, simulator, technical
support
• wide availability and reliable sources of the microcontrollers
Comparison of the 8051 Family Members
• ROM type
– 8031 no ROM
– 80xx mask ROM
– 87xx EPROM
– 89xx Flash EEPROM
• 89xx
– 8951
– 8952
– 8953
– 8955
– 898252
– 891051
– 892051
• Example (AT89C51,AT89LV51,AT89S51)
– AT= ATMEL(Manufacture)
– C = CMOS technology
– LV= Low Power(3.0v)
Comparison of the 8051 Family Members
89XX ROM RAM Timer Int Source IO pin Other
8951 4k 128 2 6 32 -
8952 8k 256 3 8 32 -
891051 1k 64 1 3 16 AC
892051 2k 128 2 6 16 AC
Foot Print
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST
(RXD)P3.0
9 8051 32 P0.7(AD7)
10 31 EA/VPP
(TXD)P3.1 11 (8031) 30 ALE/PROG
(INT0)P3.2 12 (8751) 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 (8951) 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
IMPORTANT PINS (IO Ports)
• One of the most useful features of the 8051 is that it contains
four I/O ports (P0 - P3)
• Port 0 (pins 32-39):P0(P0.0~P0.7)
– 8-bit R/W - General Purpose I/O
– Or acts as a multiplexed low byte address and data bus for external memory design
• Port 1 (pins 1-8) :P1(P1.0~P1.7)
– Only 8-bit R/W - General Purpose I/O
• Port 2 (pins 21-28):P2(P2.0~P2.7)
– 8-bit R/W - General Purpose I/O
– Or high byte of the address bus for external memory design
• Port 3 (pins 10-17):P3(P3.0~P3.7)
– General Purpose I/O
– if not using any of the internal peripherals (timers) or external interrupts.
• Each port can be used as input or output (bi-direction)
Port 3 Alternate Functions
8051 Port 3 Bit Latches and I/O Buffers
Hardware Structure of I/O Pin
Read latch Vcc
TB2
Load(L1)
TB1
Read pin
Hardware Structure of I/O Pin
• Each pin of I/O ports
– Internally connected to CPU bus
– A D latch store the value of this pin
• Write to latch=1:write data into the D latch
– 2 Tri-state buffer:
• TB1: controlled by “Read pin”
– Read pin=1:really read the data present at the pin
• TB2: controlled by “Read latch”
– Read latch=1:read value from internal latch
– A transistor M1 gate
• Gate=0: open
• Gate=1: close
Writing “1” to Output Pin P1.X
Read latch Vcc
Load(L1)
Read pin
Writing “0” to Output Pin P1.X
Read latch Vcc
Read pin
Reading “High” at Input Pin
Reading “Low” at Input Pin
Port 0 with Pull-Up Resistors
Vcc
10 K
P0.0
Port
DS5000 P0.1
8751 P0.2
P0.3
8951 P0.4 0
P0.5
P0.6
P0.7
IMPORTANT PINS
• PSEN (out): Program Store Enable, the read signal for external
program memory (active low).
• ALE (out): Address Latch Enable, to latch address outputs at Port0
and Port2
• EA (in): External Access Enable, active low to access external
program memory locations 0 to 4K
• RXD,TXD: UART pins for serial I/O on Port 3
• XTAL1 & XTAL2: Crystal inputs for internal oscillator.
Pins of 8051
• Vcc(pin 40):
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND(pin 20):ground
• XTAL1 and XTAL2(pins 19,18):
– These 2 pins provide external clock.
– Way 1:using a quartz crystal oscillator
– Way 2:using a TTL oscillator
– Example 4-1 shows the relationship between XTAL and
the machine cycle.
XTAL Connection to 8051
• Using a quartz crystal oscillator
• We can observe the frequency on the XTAL2
pin. C2
XTAL2
30pF
C1
XTAL1
30pF
GND
XTAL Connection to an External Clock Source
• Solution:
31
EA/VPP
X1
10 uF 30 pF
X2
RST
9
8.2 K
RESET Value of Some 8051 Registers:
Pins of 8051
Multiplexing
the address
(low-byte)
and data
bus
Address Multiplexing for External Memory
Accessing
external
code
memory
Read Timing for External Code Memory
Accessing 1K External Data Memory
Interface
to 1K
RAM
Timing for MOVX instruction
External code memory
WR
RD
PSEN OE
ALE G 74LS373 CS
P0.0 D A0
P0.7 A7
D0
EA D7
P2.0 A8
P2.7 A15
8051
ROM
External data memory
WR WR
RD RD
PSEN
ALE G 74LS373 CS
P0.0 D A0
P0.7 A7
D0
EA D7
P2.0 A8
P2.7 A15
RAM
8051
Overlapping External Code and Data Spaces
Overlapping External Code and Data Spaces
Overlapping External Code and Data Spaces
Allows the RAM to be
written as data memory, and
read as data memory as well as code memory.
DATA registers
CONTROL registers
Timers
Serial ports
Interrupt system Addresses 80h – FFh
Analog to Digital converter
Digital to Analog converter Direct Addressing used to
Etc. access SPRs
Bit Addressable RAM
Summary
of the 8051
on-chip
data
memory
(RAM)
Bit Addressable RAM
Summary
of the 8051
on-chip
data
memory
(Special
Function
Registers)
SFR Memory Map
Register Banks
COUNT EQU 30
~
~
mov R4, #COUNT
MOV DPTR,#MYDATA
~
~
0RG 200H
MYDATA:DB “INDIA”