Introduction to VLSI

Technology

Presentation by
P. KARUPPANAN
Assistant Professor,
Department of Electronics and Communication Engineering
Motilal Nehru National Institute of Technology Allahabad
Email: [email protected]
Outline of the Presentation
1. History of Electronics

2. What is Integrated circuit

3. Classifications of ICs

4. VLSI Design Process Domain

5. Features of ICs and Limitation of ICs

6. Top 10 VLSI Companies in India

7. Syllabus and Reference Books 2

 History of Electronics
1900 - Radio
1904 Vacuum Diode (John Flaming)
1906 Triode (Lee De Forrest)
1925 - Television
1927 Long distance telephone (AT&T)
1935 Commercial selenium rectifiers and photodiodes
1946 Mini vacuum tubes ENIAC - First computer
1947 First transistor - John Bardeen, Brattain, (William Shockley)
1949 Single crystal transistor (Gordon Teal)
1951 Production of point contact transistors
1953 JFET by George F. Dacey
1954 Silicon junction transistor (Texas Instruments)
1958 First IC- Jack Kilby (Texas Inst.) & Robert Noyce (Fairchaild Sem.)
1960 MOSFET ( Mohamed Atalla and Dawon Kahng at Bell Labs)
1965 CMOS Technology
1971 Microprocessor (INTEL)
1976 -77 Intel first one-chip microcontroller, the 8048 (MCS-48)
1978: Intel introduces the 8086 microprocessor chip
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1980: Intel introduces 8051 (Harvard architecture)
 A Brief History of Electronics

Vacuum tubes Point contact Bipolar Junction First Integrated

• These devices Germanium Transistor (BJT) Circuit
would control the transistor • In 1950, Shockley • In 1958, Jack Kilby
flow of electrons in • 1947, John developed the first of Texas
vacuum. Baden, William Bipolar Junction Instruments
• Boeing B-29 would Shockley and Transistor (BJT)
consist of 300- • two bipolar
1000 vacuum
Watter Brattain transistors
tubes. Each of Bell labs connected on a
additional discovered this single piece of
component would silicon, thereby
reduce the initiating the
reliability and “Silicon Age”
increase trouble-
shooting time.
 Integrated circuit
IC is a small semiconductor-based electronic device consisting of
fabricated transistors, Diodes, resistors and capacitors.
A circuit of transistors, Diodes, resistors, and capacitors constructed on a
single semiconductor wafer, in which the components are interconnected
to perform a given function. Ex- amplifier, oscillator,
timer, microprocessor or even computer memory.
VLSI is the process of integrating or embedding hundreds of thousands
of transistors on a single silicon semiconductor microchip.

Limitation
Is it possible to integrate Inductors on-chip?
Inductors can be implanted in the chip (Spiral inductors & Bond-
wires inductors) they have two limiting drawbacks:
1. low Quality factor
2. low Henry value
Not available in all packaging technologies: however, its in the
research progress… 5
6
 Monolithic ICs
monolithic is derived from Greek words “mono” meaning one or single and
Lithos meaning stone. -> built into a single crystal refers to a single chip of
semiconductor material, on top of which all the active and passive components
are interconnected.
Monolithic ICs are the most common types. Its cost of production is cheap
and is reliable. Used as amplifiers, voltage regulators, in AM receivers, and in
computer circuits.
Limitations:- The insulation between the components is poor, Low power
rating, fabrication of insulators is not that possible. The passive components
that are fabricated inside the IC will be if small value. For higher values they
have to be connected externally to the IC pins.

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 Hybrid or Multi chip ICs
➢Fabricated by interconnecting more than one individual chips.
➢The active components are diffused transistors or diodes.
➢The passive components are the diffused resistors or capacitors on a
single chip.
➢These components are connected by metalized patterns.
➢Hybrid ICs are widely used for high power-amplifier applications
from 5W to more than 50W. Its performance is better than that of
monolithic ICs.

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 Thin and Thick Film ICs:
In thin or thick film ICs, passive components such as resistors,
capacitors are integrated but the diodes and transistors are connected as
separate components to form a single and a complete circuit.

Thick and thin ICs have similar characteristics and appearance.

Method of deposition of films distinguished Thin ICs from Thick ICs.

Thin-Film IC is fabricated (two
methods: vacuum evaporation &
cathode sputtering) by depositing
films of conducting material on the
surface of a glass or ceramic base.

Thick-Film IC pattern is obtained on

a ceramic substance by using a
manufacturing process called silk-
screen printing technique. 9
10
 Digital Integrated Circuits

Analog IC
Mixed Signal ICs
Digital Integrated Circuits: These types of ICs work
on the basic digital system i.e. two defined level which
is 0’s and 1’s (in other words, Low and High or ON and
OFF respectively).
Microprocessor and Micro controller is the example
of Digital ICs which contains of million of flip flops and
logic gates.
Linear or Analog Integrated Circuits: Analog ICs work by processing continuous
signals i.e. analog signal. OP-AMP, 555 Timer and Sensors are the example of Analog
ICs. Used for amplification, filtering, modulation, demodulation etc.

Mixed Signal ICs: Mixed Signal Integrated Circuit is a kind of ICs where both Digital
and Analog ICs are combine on a single chip.0
 IC Technology based on Transistor
1. MOS
❖ CMOS
❖ PMOS-only
❖ NMOS-only
2. Bipolar
❖ Transistor-transistor logic (TTL)
❖ Integrated Injection Logic (I 2 L)
3. Gallium Arsenide (GaAs)
4. Silicon Germanium
5. BiCMOS
6. Superconducting technologies

Technology generation defined by Feature size: Size of the smallest features on an IC,
usually the length of the transistor channel.
Leading obstacles in reducing feature size is Photolithographic tools.

Moore's Law
# of transistors in IC will double every 18 months.
# Minimum transistor feature size must decrease by a factor of 0.7 every three years
# The cost of building a semiconductor FAB is doubling every three to four years. 12
 Why Technology Scaling ?
➢ Battery-operated portable gadgets increased -> hearing aids,
cellular phone, laptops etc.

➢ Battery storage capacity increase 30% ONLY in every five years .

Not sufficient to handle portable devices.

➢ basic requirements - less area, high Speed, lower power

consumption and cheaper development.

➢ By making transistors smaller, more circuits can be fabricated on

the silicon wafer and become cheaper.

➢ The reduction in channel length enables faster switching

operations since less time is needed for the current to flow from
drain to source.
 Why Technology Scaling ?
➢ Smaller transistor leads to smaller capacitance. This
causes a reduction in transistor delay. As dynamic
power is proportional to capacitance, the power
consumption also reduces. This reduction of transistor
size is called scaling.

➢ Each time a transistor is scaled, we say a new

technology node has been introduced. The minimum
channel length of transistor is called the technology
node. For example, 0.18 micrometer, 0.13 micrometer,
90 nanometer etc.

➢ The scaling improves cost, performance and power

consumption with every new generation of technology.
 Why MOS not BJT in Integration ?
BJT is more static power dissipation. Power is drawn even when the
circuit is not switching. This limits the maximum numbers of transistors
that can be integrated into a single silicon chip.

In 1963, F. Wanlass and C. Sah of Fairchild unveiled the first logic gate
in which n-channel and p-channel transistors were used in a
complementary symmetric circuit configuration. This is what is
known as CMOS today. It draws almost zero static power dissipation.

Early ICs used NMOS technology, because the NMOS process was
fairly simple, less expensive and more devices could be packed into a
single chip compared to CMOS technology. The first microprocessor
was announced by Intel in 1971.
 NMOS & CMOS
As static power dissipation of NMOS transistor is
more compared to CMOS, the power consumption of
NMOS ICs became a serious issue in the 1980s as thousands
of transistors were integrated into a single chip.

Due to features like low power, reliable

CMOS performance and high speed, CMOS technology
would adopt and replace NMOS and bipolar
technology for nearly all digital applications.

1. Scaling and improvement in processing technologies have

led to continuous enhancement in circuit speeds
2. Improvement in packaging densities of chips.
3. Performance-to-cost ratios of microelectronics-based products
 Overview of Processing Technologies
► Although a number of processing technologies are available, the
majority of the production is done with traditional CMOS.

► Other processes are limited to areas where CMOS is not very suitable
(like high speed RF applications)
 Scale of Integration
►VLSI is the process of creating an IC by combining hundreds of
thousands of transistors or devices into a single chip.

1958 2018
IC’s----FF’s IC’s

More than
2
Transistor 1 Billion
Transistor

Dual Core+ Core I7 (2015): 1.9billion and 22nm

➢ This scale of growth has resulted from a continuous scaling of transistors
and other improvements in the Silicon manufacturing process.

► 1965: Gordon Moore(Intel cofounder) - The number of transistors in a

dense integrated circuit will be doubled about every 18 months
Based on Device Count – IC in which ALL the passive and
active components are fabricated into a single chip.
Based on the number of components to be integrated, they were
classified as SSI to ULSI
No of
Name Year Transistors No Examples
Components.
Logic Gates like
SSI 1964 1 to 100 1 to 12
NAND, OR, etc
Counter, Encoder,
MSI 1968 100 to 1000 13 to 99
Decoder, Multiplexer,
LSI 1971 1000 to 20,000 100 to 9,999 8-bit uP, 8-bit uC, etc
16-bit uP, 32-bit uP,
20,000 to 10,000 to
VLSI 1980 64-bit uP, Embedded
10,00,000 99,999
System, FPGA
Special Purpose
10,00,000 and 100,000 and
ULSI 1984 Processor, SOC,
more more
NOC, IOT, etc 19
VLSI Design Process Domain

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VLSI - Design Flow

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 IC Fabrication

►The fabrication steps are

sequenced to form three
dimensional regions that act as
transistors and interconnects that
form the network
Chip Fabrication Processes
 Chip Fabrication Processes
►„Silicon Wafer Manufacturing„(CZ, FZ, Bridgeman..)

►Wafer Processing
• Deposition/Epitaxial Growth (MBE, MOCVD…)
• Oxidation…
• Patterning/Lithography
• Removal/Etching
• Diffusion and ion implantation…
• Annealing/Activation of the implanted dopants. …

►Metallization„(Sputtering..)

►Testing, Assembly and Packaging

 Wafer Processing
In semiconductor device fabrication, the various processing steps fall
into four general categories:
► Deposition,
► Removal,
► Patterning, and
► Modification of electrical properties.

► Deposition is any process that grows, coats, or otherwise

TRANSFERS A MATERIAL ONTO THE WAFER. Available
technologies include physical vapor deposition (PVD), chemical
vapor deposition (CVD), electro-chemical
deposition (ECD), molecular beam epitaxy (MBE) and more
recently, atomic layer deposition (ALD) among others
► Removal is any process that removes material from the wafer;
examples include ETCH processes (either wet or dry) and chemical-
mechanical planarization (CMP).
 Wafer Processing (cont..)
► Patterning is the shaping or altering of deposited materials, and
is generally referred to as LITHOGRAPHY. For example, in
conventional lithography, the wafer is coated with a chemical called
a photoresist; then, a machine called a STEPPER focuses, aligns,
and moves a mask, exposing select portions of the wafer below to
short wavelength light; the exposed regions are washed away by a
developer solution. After etching or other processing, the remaining
photoresist is removed by plasma ashing.

► Modification of electrical properties has historically

entailed doping transistor sources and drains (originally by
DIFFUSION furnaces and later by ION IMPLANTATION). These
doping processes are followed by furnace annealing or, in advanced
devices, by rapid thermal ANNEALING (RTA); annealing serves to
activate the implanted dopants. Modification is frequently achieved
by OXIDATION, which can be carried out to create semiconductor-
insulator junctions.
IC Terminology
Chip/Die - small part of the wafer on which the IC will be fabricated.
Wafer – a semiconductor material in rectangular/circular shape where large
number of the ICs are been fabricated.
Encapsulations – Put a cap over the IC and seal it in an inert atmosphere.
Bonding – Attach wires to IC.

Features of Integrated Circuit

➢Smaller in size and hence portable.
➢Less vulnerable to variations in physical parameters.
➢Due to the absence of parasitic capacitance, operating speed is high.
➢Low power consumption and hence they can be operated using batteries.
➢The absence of soldered joints makes the ICs more reliable.
➢Simpler design and standard packaging.

Limitation for different types of Ics

➢Limited power rating and It operates at low voltage
➢High grade of PNP is not possible and It produces noise during operation
➢Its components such as resistors and capacitors are voltage dependent
➢It is delicate i.e it cannot withstand rough handling etc. 27
 IC fabrication in India
1. Semi-Conductor Laboratory (SCL) at Chandigarh,. DOS is a R&D
Unit engaged in Design, Development, Fabrication, Assembly,
Packaging, Testing & Reliability Assurance of ASICs and Opto-
Electronic / Imaging & Micro Electro Mechanical System (MEMS)
Devices.
2. SCL is also engaged in Hi-Rel Board Fabrication and Component
Screening for ISRO Units (Bangalore) and Assembly of Radiosonde
for Atmospheric Studies.
3. Mini fab labs are present at IIT Bombay and IISc Bengaluru.
Those are under the centre for microelectronics.
4. Government has planned to setup fabrication labs in India. One
ongoing project is at Gujarat/Maharastra, which is setup by NRIs,
HSMC (hindustan semiconductor manuracturing company).
5. Intel planning semiconductor manufacturing unit in India as govt
rolls out incentives (₹76,000-crore policy boost for semiconductor
and display manufacturing ecosystem) 28
 Top 10 VLSI Companies in India
1 | Texas Instruments ->Corporate office – Dallas, United State | Establishment –1951 |

2 | Analog Device Inc. -> Corporate office – Norwood, USA | Establishment – 1965 |

3 | Cypress Semiconductor Corporation -> Corporate office – San Jose, USA | 1982 |

4 | Broadcom Corporation - > Corporate office – Irvine, USA | Establishment – 1991 |

5 | Cisco Systems -> Corporate office – San Jose, USA | Establishment – 1984 |
……………………………………………………………………………………………………
6 | Bit Mapper Integration Technologies Private Limited
Corporate office – Pune, Maharashtra | Establishment – 1985 |

7 | Horizon Semiconductors
Corporate office – Bangalore, Karnataka | Establishment – 1815|

8 | Einfochips limited
Corporate office – Ahmadabad, Gujarat | Establishment – 1994 |

9 | Trident Tech Labs -> Corporate office – New Delhi, India | Establishment – 2000 |
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10 | HCL technologies -> Corporate office – Noida, Uttar Pradesh | Establishment – 1991 |
 Syllabus
EC-2203 VLSI Technology and Process Modelling (3 - 1 - 0) 4 Credits
Crystal growth & wafer preparation. Processing considerations: Chemical cleaning,
getting the thermal Stress factors etc.
Epitaxy: Vapors phase Epitaxy Basic Transport processes & reaction kinetics, doping &
auto doping, equipments, & safety considerations, buried layers, epitaxial defects, molecular
beam epitaxy, equipment used, film characteristics, SOI structure.
Oxidation: Growth mechanism & kinetics, Silicon oxidation model, interface
considerations, orientation dependence of oxidation rates thin oxides. Oxides. Oxidation
technique &systems dry & wet oxidation. Masking properties of SiO2.
Diffusion: Diffusion from a chemical source in vapour form at high temperature, diffusion
from doped oxide source, diffusion from an ion implanted layer.
Lithography: Optical Lithography: optical resists, contact & proximity printing, projection
printing, electron lithography: resists, mask generation. Electron optics: roster scans &
vector scans, variable beam shape. X-ray lithography: resists & printing, X ray sources &
masks. Ion lithography.
Etching: Reactive plasma etching, AC & DC plasma excitation, plasma properties,
chemistry & surface interactions, feature size control & apostrophic etching, ion enhanced &
induced etching, properties of etch processing. Reactive Ion Beam etching, Specific etches
processes: poly/polycide. Trench etching,
Text: Sze, " Modern Semiconductor Device Physics", John Wiley & Sons, 2000.
References: B.G. Streetman, "Solid State Electronics Devices", Prentice Hall, 2002. 2.
Chen, "VLSI Technology" Wiley, March 2003.
 Tests and References
►5 assignments and 5 quizzes .
►At least 30-35 Lecture
►Copies of chapters will be provided when appropriate
►Recommended book:
► VLSI Technology by S. M. SZE
► Silicon VLSI Technology by Plummer
► VLSI Fabrication Principles – S.K Gandhi
► The Science & Engineering of Microelectronic
Fabrication – Stephen A Campbell, 2nd Oxford
University Press.
► Other references: Will be provided in due time.
Thank You

Any ???

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