Microprocessor &

Interfacing LAB
(BECP 501)

LAB MA NUAL

V SEMESTER

Department of Electronics & Communication

Engineering, Roorkee Institute of Technology,
Roorkee
DO’S and DON’T S in Laboratory
• Come fully prepared for the experiment in the laboratory.
• Check for appropriate power supply before connecting to the equipment.
• Decide the appropriate range of the measuring instruments on the basis of quantity to be
measured.
• Make the connections without connecting the leads to the supply.
• Re-check the connections and show it to the teacher/instructor before switching on the
power supply to the circuit.
• Energize the circuit only with the permission of the teacher/instructor.
• After the experiment, disconnect the connection sand put back the connecting wires/leads
at appropriate place.
• Return all the apparatus to the lab-staff.
• In case of shock, switch-off the power supply immediately.
• Strictly follow the Instructions.
• Avoid loose connections.
• Don’t touch the main power supply leads with bare hand and avoid body earth.
• Don’t use the mobile phones during laboratory.
 LIST OF EXEPRIMENTS

Sl .No. Name of the Experiments

1 To Perform Addition and Multiplication of two 8 bit
numbers.

2 To find the maximum value in an array.

3
To perform BCD To HEX Conversion and HEX to BCD
Conversion.

4
To Design Counter Using Timer

5 Programming with 8086-16 bit, 32 bit Multiplication /

Division.

6
Interfacing with 8085/8086-8279, 8255.

7 Interfacing with 8085/8086-8279, 8251.

8
Stepper motor Interfacing and Seven Segment Display
Interfacing using 8051.
 EXPERIMENT-1(A)

AIM:-To Perform Addition and Multiplication of two 8 bit numbers

ALGORITHM:

1) Start the program by loading the first data into Accumulator.

2) Move the data to a register (B register).
3) Get the second data and load into Accumulator.
4) Add the two register contents.
5) Check for carry.
6) Store the value of sum and carry in memory location. 7) Terminate the program.

Flow Chart:
PROGRAM:

MVI C, 00 Initialize C register to 00

LDA 4150 Load the value to Accumulator.
MOV B, A Move the content of Accumulator to B register.
LDA 4151 Load the value to Accumulator.
ADD B Add the value of register B to A
JNC LOOP Jump on no carry.
INR C Increment value of register C
LOOP: STA 4152 Store the value of Accumulator (SUM).
MOV A, C Move content of register C to Acc.
STA 4153 Store the value of Accumulator (CARRY)
HLT Halt the program.

OBSERVATION:

Input: 80 (4150)
80 (4251)
Output: 00 (4152)
01 (4153)

RESULT:

Thus the program to add two 8-bit numbers was executed.

 EXPERIMENT-1(B)

AIM:-To perform the multiplication of two 8 bit numbers using 8085.

ALGORITHM:

1) Start the program by loading HL register pair with address of memory location.
2) Move the data to a register (B register).
3) Get the second data and load into Accumulator.
4) Add the two register contents.
5) Check for carry.
6) Increment the value of carry.
7) Check whether repeated addition is over and store the value of product and
carry in memory location.
8) Terminate the program.

PROGRAM:

MVI D, 00 Initialize register D to 00

MVI A, 00 Initialize Accumulator content to 00
LXI H, 4150
MOV B, M Get the first number in B - reg INX
H
MOV C, M Get the second number in C- reg.
LOOP: ADD B Add content of A - reg to register B.
JNC NEXT Jump on no carry to NEXT.
INR D Increment content of register D
NEXT: DCR C Decrement content of register C.
JNZ LOOP Jump on no zero to address
STA 4152 Store the result in Memory
MOV A, D
STA 4153 Store the MSB of result in Memory
HLT Terminate the program.

OBSERVATION:
 Input: FF (4150)
FF (4151)
Output: 01 (4152)
FE (4153)

RESULT:

Thus the program to multiply two 8-bit numbers was executed.

 EXPERIMENT-2

AIM:- To find the maximum value in an array.

ALGORITHM:

1) Load the address of the first element of the array in HL pair

2) Move the count to B – reg. 3) Increment the pointer
4) Get the first data in A – reg. 5)
Decrement the count.
6) Increment the pointer
7) Compare the content of memory addressed by HL pair with that of A - reg.
8) If Carry = 0, go to step 10 or if Carry = 1 go to step 9 9) Move the content of
memory addressed by HL to A – reg.
10) Decrement the count
11) Check for Zero of the count. If ZF = 0, go to step 6, or if ZF = 1 go to next step.
12) Store the largest data in memory.
13) Terminate the program.

PROGRAM:

LXI H,4200 Set pointer for array

MOV B,M Load the Count
INX H
MOV A,M Set 1st element as largest data
DCR B Decrement the count
LOOP: INX H
CMP M If A- reg > M go to AHEAD
JNC AHEAD
MOV A,M Set the new value as largest
AHEAD: DCR B
JNZ LOOP Repeat comparisons till count =
0
STA 4300 Store the largest value at 4300
HLT
OBSERVATION:

Input: 05 (4200) ----- Array

Size
0A (4201)
F1 (4202)
1F (4203)
26 (4204)
FE (4205)

Output: FE (4300)

RESULT:

Thus the program to find the largest number in an array of data was executed
 EXPERIMENT-3(A)

AIM:- To perform BCD To HEX Conversion and HEX to BCD Conversion.

ALGORITHM:

1) Initialize memory pointer to 4150 H

2) Get the Most Significant Digit (MSD)
3) Multiply the MSD by ten using repeated addition
4) Add the Least Significant Digit (LSD) to the result obtained in previous step
5) Store the HEX data in Memory

FLOW CHART
PROGRAM:

LXI H,4150
MOV A,M Initialize memory pointer
ADD A MSD X 2
MOV B,A Store MSD X 2
ADD A MSD X 4
ADD A MSD X 8
ADD B MSD X 10 INX H Point to LSD
ADD M Add to form HEX
INX H
MOV M,A Store the result HLT

OBSERVATION:

Input: 4150 : 02 (MSD)

4151 : 09 (LSD)

Output: 4152 : 1D H

RESULT:

Thus the program to convert BCD data to HEX data was executed.
 EXPERIMENT-3(B)

AIM:-To convert given Hexa decimal number into its equivalent BCD number using 8085
instruction set

ALGORITHM:

1) Initialize memory pointer to 4150 H

2) Get the Hexa decimal number in C - register
3) Perform repeated addition for C number of times
4) Adjust for BCD in each step
5) Store the BCD data in Memory

PROGRAM:

LXI H,4150 Initialize memory pointer

MVI D,00 Clear D- reg for Most significant
Byte
XRA A Clear Accumulator
MOV C,M Get HEX data
LOOP2: ADI 01 Count the number one by one
DAA Adjust for BCD count
JNC LOOP1
INR D
LOOP1: DCR C
JNZ LOOP2
STA 4151 Store the Least Significant Byte
MOV A,D
STA 4152 Store the Most Significant Byte
HLT
OBSERVATION:

Input: 4150 : FF

Output: 4151 : 55 (LSB)

4152 : 02 (MSB)

RESULT: Thus the program to convert HEX data to BCD data was executed.

EXPERIMENT-6(A)

AIM: Interfacing with 8085/8086-8279, 8253.

APPARATUS REQUIRED:

1) 8085 Microprocessor toolkit.

2) 8253 Interface board.
3) VXT parallel bus.
4) Regulated D.C power supply.
5) CRO.
MODE 0-Interrupt On Terminal Count:-

The output will be initially low after mode set operation. After loading the counter, the
output will remain low while counting and on terminal count, the output will become high
until reloaded again.
Let us see the channel in mode0. Connect the CLK 0 to the debounce circuit and
execute the following program.

PROGRAM:
MVI A, 30H ;Channel 0 in mode 0.
OUT CEH
MVI A, 05H ;LSB of count.
OUT C8H
MVI A, 00H ;MSB of count.
OUT C8H
HLT

It is observed in CRO that the output of channel 0 is initially low. After giving ‘x’ clock
pulses, we may notice that the output goes high.

MODE 1-Programmable One Shot:-

 After loading the count, the output will remain low following the rising edge of the
gate input. The output will go high on the terminal count. It is retriggerable; hence the
output will remain low for the full count after any rising edge of the gate input.

The following program initializes channel 0 of 8253 in Mode 1 and also initializes
triggering of gate. OUT 0 goes low as clock pulses and after triggering It goes back to
high level after five clock pulses. Execute the program and give clock pulses through the
debounce logic and verify using CRO.

PROGRAM:
MVI A, 32H ;Channel 0 in mode 1.
OUT CEH ;
MVI A, 05H ;LSB of count.
OUT C8H
MVI A, 00H ;MSB of count.
OUT C8H
OUT DOH ;Trigger Gate 0.
HLT

MODE 2-Rate Generator:

It is a simple divide by N counter. The output will be low for one period of the input
clock. The period from one output pulse to next equals the number of input count in the
count register. If the count register is reloaded between output pulses, the present period
will not be affected, but the subsequent period will reflect a new value.

MODE 3-Square Generator:

It is similar to mode 2 except that the output will remain high until one half of the count
and goes low for the other half provided the count is an even number. If the count is odd
the output will be high for (count +1)/2 counts. This mode is used for generating baud rate
of 8251.

PROGRAM:

MVI A, 36H ;Channel 0 in mode 3.

 OUT CEH ;
MVI A, 0AH ;LSB of count.
OUT C8H
MVI A, 00H ;MSB of count.
OUT C8H
HLT

We utilize mode 3 to generate a square wave of frequency 150 kHz at Channel 0.Set the
jumper so that the clock of 8253 is given a square wave of Frequency 1.5 MHz. This
program divides the program clock by 10 and thus the Output at channel 0 is 150 KHz.

MODE 4-Software Triggered Strobe:

The output is high after the mode is set and also during counting. On Terminal count, the
output will go low for one clock period and becomes high again. This mode can be used
for interrupt generation.

MODE 5-Hardware Triggered Strobe:

Counter starts counting after rising edge of trigger input and the output goes low for one
clock period. When the terminal count is reached, the counter is retrigerrable. On terminal
count, the output will go low for one clock period and becomes high again. This mode can
be used for interrupt generation.

RESULT:

Thus the 8253 PIT was interfaced to 8085 and the operations for mode 0, Mode 1 and
mode 3 was verified.
 EXPERIMENT-7(A)
AIM: Interfacing with 8085/8086-8279, 8251

APPARATUS REQUIRED:

1) 8085 Microprocessor toolkit.

2) 8279 Interface board.
3) VXT parallel bus.
4) Regulated D.C power supply.

PROGRAM:

START: LXI H,4130H

MVI D,0FH ;Initialize counter.
MVI A,10H
OUT C2H ;Set Mode and Display.
MVI A,CCH ;Clear display.
OUT C2H
MVI A,90H ;Write Display
OUT C2H
LOOP: MOV A,M
OUT C0H
CALL DELAY
INX H
DCR D
JNZ LOOP
JMP START
 DELAY: MVI B, A0H
LOOP2: MVI C, FFH
LOOP1: DCR C
JNZ LOOP1
DCR B
JNZ LOOP2
RET

Pointer equal to 4130 .FF repeated eight times.

4130 - FF
4131 –FF
4132 –FF
4133 –FF
4134 –FF
4135 –FF
4136 –FF
4137 –FF
4138 –98
4139 –68
413A -7C
413B -C8
413C -1C
413D -29
413E -FF
413F -FF

RESULT:

Thus 8279 controller was interfaced with 8085 and program for rolling display was
executed successfully.
 EXPERIMENT-7(B)
AIM: Interfacing with 8085/8086-8279, 8251.

THEORY:
The 8251 is used as a peripheral device for serial communication and is programmed by
the CPU to operate using virtually any serial data transmission technique. The USART
accepts data characters from the CPU in parallel format and then converts them into a
continuous serial data stream for transmission. Simultaneously, it can receive serial data
streams and convert them into parallel data characters for the CPU. The CPU can read the
status of USART ant any time. These include data transmission errors and control signals.

Prior to starting data transmission or reception, the 8251 must be loaded with a set
of control words generated by the CPU. These control signals define the complete
functional definition of the 8251 and must immediately follow a RESET operation.
Control words should be written into the control register of 8251. These control words are
split into two formats:

1. MODE INSTRUCTION WORD

2. COMMAND INSTRUCTION WORD

1. MODE INSTRUCTION WORD

This format defines the Baud rate, Character length, Parity and Stop bits required to work
with asynchronous data communication. By selecting the appropriate baud factor sync
mode, the 8251 can be operated in Synchronous mode.

Initializing 8251 using the mode instruction to the following conditions

 8 Bit data
No Parity
Baud rate Factor (16X)
1 Stop Bit

gives a mode command word of 01001110 = 4E (HEX)

MODE INSTRUCTION - SYNCHRONOUS MODE

S2 S1 EP PEN L2 L1 B2 B1

BAUD RATE FACTOR

0 1 0 1
0 0 1 1
SYNC MODE (1X) (16X) (64X)

CHARACTR LENGTH
0 1 0 1
0 0 1 1
6 7
5 BITS BITS BITS 8 BITS

PARITY ENABLE
1= ENABLE 0 = DISABLE

EVEN PARITY GEN/CHECK

0 =ODD 1 = EVEN

NUMBER OF STOP BITS

0 1 0 1
0 0 1 1
1.5
INVALID 1 BIT BIT 2 BIT
 MODE INSTRUCTION - ASYNCHRONOUS MODE

S2 S1 EP PEN L2 L1 B2 B1

CHARACTER LENGTH
0 1 0 1
0 0 1 1
5 BITS 6 BITS 7 BITS 8 BITS

PARITY ENABLE
1= ENABLE 0 = DISABLE

EVEN PARITY GEN/CHECK

0 =ODD 1 = EVEN

EXTERNAL SYNC DETECTS

1 = SYSDET IS AN INPUT
0 = SYSDET IS AN IOUTPUT

SINGLE CHARACTER SYNC

1 = SINGLE SYNC CHARACTER
0 = DOUBLE SYNC CHARACTER

2. COMMAND INSTRUCTION WORD

This format defines a status word that is used to control the actual operation of 8251. All
control words written into 8251 after the mode instruction will load the command
instruction.

The command instructions can be written into 8251 at any time in the data block
during the operation of the 8251. to return to the mode instruction format, the master reset
bit in the command instruction word can be set to initiate an internal reset operation which
automatically places the 8251 back into the mode instruction format. Command
instructions must follow the mode instructions or sync characters.

Thus the control word 37 (HEX) enables the transmit enable and receive enable
bits, forces DTR output to zero, resets the error flags, and forces RTS output to zero.

EH IR RTS ER SBRK RXE DTR TXEN

TRANSMIT ENABLE
1=Enable 0 = Disable

DATA TERMINAL READY

HIGH will force DTR
Output to Zero

RECEIVE ENABLE
1=Enable 0 = Disable

SEND BREAK CHARACTER

1 = Forces TXD LOW 0 =
Normal Operation

ERROR RESET
1=Reset Error Flags
PE,OE,FE

REQUEST TO SEND
HIGH will force RTS
Output to Zero

INTERNAL RESET
HIGH Returns 8251 to
Mode Instruction Format

ENTER HUNT MODE

 1= Enable a Search for
Sync Characters( Has
No Effect in Async mode)

COMMAND INSTRUCTION FORMAT

ALGORITHM:

1. Initialise timer (8253) IC

2. Move the mode command word (4E H) to A -reg
3. Output it to port address C2
4. Move the command instruction word (37 H) to A -reg
5. Output it to port address C2
6. Move the the data to be transferred to A -reg
7. Output it to port address C0
8. Reset the system
9. Get the data through input port address C0
10. Store the value in memory
11. Reset the system

PROGRAM:
MVI A,36H
OUT CEH
MVI A,0AH
OUT C8H
MVI A,00
OUT C8H
LXI H,4200
MVI A,4E
OUT C2
MVI A,37
OUT C2
MVI A,41
OUT C0
RST 1

ORG 4200
IN C0
STA 4500
RST 1
OBSERVATION:

Output: 4500 41

RESULT:

Thus the 8251 was initiated and the transmission and reception of character was
done successfully.

Experiment-8(A)

AIM : -Stepper motor Interfacing and Seven Segment Display Interfacing using 8051.

APPARATUS REQUIRED:

• 8051 Trainer Kit

• Stepper Motor Interface Board
• Seven segment display

THEORY:

A seven segment display consists of seven LEDs arranged in the form of a squarish’8′
slightly inclined to the right and a single LED as the dot character. Different characters
can be displayed by selectively glowing the required LED segments. Seven segment
displays are of two types, common cathode and common anode. In common cathode
type , the cathode of all LEDs are tied together to a single terminal which is usually
labeled as ‘com‘ and the anode of all LEDs are left alone as individual pins labeled as a,
b, c, d, e, f, g & h (or dot) . In common anode type, the anode of all LEDs are tied
 together as a single terminal and cathodes are left alone as individual pins. The pin out
scheme and picture of a typical 7 segment LED display is shown in the image below.
.

ALGORITHM:

1. Digit drive pattern of a seven segment LED display is simply the different logic
combinations of its terminals ‘a’ to ‘h‘ in order to display different digits and dcharacters.

2. The common digit drive patterns (0 to 9) of a seven segment display are shown in the table
below
3. The circuit diagram shown above is of an AT89S51 microcontroller based 0 to 9 counter
which has a 7 segment LED display interfaced to it in order to display the count.
4. This simple circuit illustrates two things. How to setup simple 0 to 9 up counter using
8051 and more importantly how to interface a seven segment LED display to 8051 in order
to display a particular result.
5. The common cathode seven segment display D1 is connected to the Port 1 of the
microcontroller (AT89S51) as shown in the circuit diagram. R3 to R10 are current limiting
resistors. S3 is the reset switch and R2,C3 forms a debouncing circuitry
 PROGRAM:

ORG 000H //initial starting address

START: MOV A,#00001001B // initial value of
accumulator
MOV B,A
MOV R0,#0AH //Register R0 initialized as counter which counts from 10 to 0
LABEL: MOV A,B
INC A
MOV B,A
MOVC A,@A+PC // adds the byte in A to the program counters address
MOV P1,A ACALL DELAY // calls the delay of the timer
DEC R0//Counter R0 decremented by 1
MOV A,R0 // R0 moved to accumulator to check if it is zero in next instruction.
JZ START //Checks accumulator for zero and jumps to START. Done to check if
counting has been finished.
SJMP LABEL DB 3FH // digit drive pattern for 0
DB 06H // digit drive pattern for 1
DB 5BH // digit drive pattern for 2
DB 4FH // digit drive pattern for 3
DB 66H // digit drive pattern for 4
DB 6DH // digit drive pattern for 5
DB 7DH // digit drive pattern for 6
DB 07H // digit drive pattern for 7
DB 7FH // digit drive pattern for 8
DB 6FH // digit drive pattern for 9
DELAY: MOV R4,#05H // subroutine for delay
WAIT1: MOV R3,#00H
WAIT2: MOV R2,#00H
WAIT3: DJNZ R2,
WAIT3:DJNZ R3,WAIT2
DJNZ R4,WAIT1

Experiment-8(B)

AIM : -Stepper motor Interfacing and Seven Segment Display Interfacing using 8051.

APPARATUS REQUIRED:
  8051 Trainer Kit
 Stepper Motor Interface Board
 Seven segment display

THEORY:

A motor in which the rotor is able to assume only discrete stationary angular position is
a stepper motor. The rotor motion occurs in a stepwise manner from one equilibrium
position to next.

The motor under our consideration uses 2 – phase scheme of operation. In this scheme,
any two adjacent stator windings are energized. The switching condition for the above
said scheme is shown in Table.

Clockwise A nti - Clockwise

A1 B1 A2 B2 A1 B1 A2 B2
1 0 0 1 1 0 1 0
0 1 0 0 0 1 0 1
0 1 0 1 0 1 0 0
1 0 1 0 1 0 0 1

In order to vary the speed of the motor, the values stored in the registers R1, R2, R3 can be
changed appropriately.

ALGORITHM:

1. Store the look up table address in DPTR

2. Move the count value (04) to one of the register (R0)
3. Load the control word for motor rotation in accumulator
4. Push the address in DPTR into stack 5. Load FFC0 in to DPTR.
6. Call the delay program
7. Send the control word for motor rotation to the external device.
8. Pop up the values in stack and increment it.
9. Decrement the count in R0. If zero go to next step else proceed to step 3.
10. Perform steps 1 to 9 repeatedly.

PROGRAM:
 ORG 4100
START: MOV DPTR,#4500H
MOV R0,#04
AGAIN: MOVX A,@DPTR
PUSH DPH
PUSH PDL
MOV DPTR,#FFC0H
MOV R2, 04H
MOV R1,#FFH
DLY1: MOV R3, #FFH
DLY: DJNZ R3,DLY
DJNZ R1,DLY1
DJNZ R2,DLY1
MOVX @DPTR,A
POP DPL
POP DPH
INC DPTR
DJNZ R0,AGAIN
SJMP START

DATA:

4500: 09, 05, 06, 0A

RESULT:- Stepper motor Interfacing and Seven Segment Display Interfacing using 8051
is Studied.