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Computer Organization Sept 2021

This document contains a practice exam for a Computer Organization course. It consists of 10 multiple choice questions across 5 units: 1. The first question asks about error correction using Hamming Codes and comparing r's complement and (r-1)'s complement representations. 2. The second question asks about the significance of ASCII codes and fixed point representation. 3. Subsequent questions cover topics like half and full adders, ring counters, binary multiplication, division algorithms, microprogramming, control unit design, cache design, memory addressing and asynchronous data transfer. 4. Students must answer 5 questions, selecting one from each unit, covering topics on data representation, basic logic gates, arithmetic circuits, processor design

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DANDEM SAIRAM
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47 views

Computer Organization Sept 2021

This document contains a practice exam for a Computer Organization course. It consists of 10 multiple choice questions across 5 units: 1. The first question asks about error correction using Hamming Codes and comparing r's complement and (r-1)'s complement representations. 2. The second question asks about the significance of ASCII codes and fixed point representation. 3. Subsequent questions cover topics like half and full adders, ring counters, binary multiplication, division algorithms, microprogramming, control unit design, cache design, memory addressing and asynchronous data transfer. 4. Students must answer 5 questions, selecting one from each unit, covering topics on data representation, basic logic gates, arithmetic circuits, processor design

Uploaded by

DANDEM SAIRAM
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code No: R201216 R20 SET - 1

I B. Tech II Semester Regular Examinations, September- 2021


COMPUTER ORGANIZATION
(Com. To CSE, IT)
Time: 3 hours Max. Marks: 70
Answer any five Questions one Question from Each Unit
All Questions Carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
UNIT-I
1. a) Explain how Hamming Code is used for Error Correction. (7M)
b) Compare r’s complement and (r-1)’s complement by taking two examples. (7M)
Or
2. a) Discuss the significance of ASCII code with few examples. (7M)
b) What is fixed point Representation? Explain with examples. (7M)
UNIT-II
3. a) Explain how a half-adder can be realized by using one X-OR gate and one AND (7M)
gate.
b) Explain the combinatorial circuit design with an example. (7M)
Or
4. a) Explain the disadvantage of constructing a full adder with two half adders. (7M)
b) Discuss the features of the Ring counter with an example. (7M)
UNIT-III
5. a) Explain the hardware implementation of the Binary multiplier. (7M)
b) What are the features of the decimal athemetic unit? Explain the same with an (7M)
example.
Or
6. a) Construct the flow chart and explain the division algorithm with an example. (7M)
b) What are the various floating-point arithmetic operations available? Explain the (7M)
same with an example.
UNIT-IV
7. a) State the purpose of the micro program with an example. (7M)
b) Explain the implementation of do-while, repeat-until with an example. (7M)
Or
8. a) What are the steps involved in the design of the control unit? Explain. (7M)
b) Explain how string operations can be performed in 8086. Discuss the importance (7M)
of far and near procedures with suitable examples.
UNIT-V
9. a) Explain the various elements of cache design in detail. (7M)
b) A two-way set associate cache has lines of 16 bytes and a total size of 8 Kbytes. (7M)
The 64-Mbyte main memory is byte-addressable. Show the format of primary
memory addresses.
Or
10 a) A set-associative cache consists of 64 lines or slots, divided into four-line sets. (7M)
Main memory consists of 4K blocks of 128 words each. Show the format of main
memory addresses.
b) Explain the process of asynchronous data transfer with an example. (7M)

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